IRF630

® IRF630 IRF630FP N - CHANNEL 200V - 0.35Ω - 9A - TO-220/FP MESH OVERLAY ™ MOSFET TYPE IRF630 IRF630F P s s s s V DSS 200 V 200 V R DS(on) < 0.40 Ω < 0.40 Ω ID 9A 9A TYPICAL RDS(on) = 0.35 Ω EXTREMELY HIGH dV/dt CAPABILITY VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED 3 1 2 1 2 3 DESCRIPTION This power MOSFET is designed using he company’s consolidated strip layout-based MESH OVERLAY™ process. This technology matches and improves the performances compared with standard parts from various sources. TO-220 TO-220FP APPLICATIONS s HIGH CURRENT SWITCHING s UNINTERRUPTIBLE POWER SUPPLY (UPS) s DC/DC COVERTERS FOR TELECOM, INDUSTRIAL, AND LIGHTING EQUIPMENT. I NTERNAL SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol V DS V DGR V GS ID ID I DM ( • ) P tot dv/dt( 1) V ISO Ts tg Tj Parameter IRF630 Drain-source Voltage (VGS = 0) Drain- gate Voltage (R GS = 20 k Ω ) G ate-source Voltage Drain Current (continuous) at Tc = 25 o C Drain Current (continuous) at Tc = 100 C Drain Current (pulsed) T otal Dissipation at Tc = 25 o C Derating Factor Peak Diode Recovery voltage slope Insulation W ithstand Voltage (DC) Storage Temperature Max. Operating Junction Temperature o Value IRF630F P 200 200 ± 20 9 5.7 36 75 0.6 5  -65 to 150 150 9(**) 5.7(**) 36 25 0.20 5 2000 Un it V V V A A A W W /o C V/ns V o o C C (•) Pulse width limited by safe operating area ( 1) ISD ≤ 9A, di/dt ≤ 300 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX First Digit of the Datecode Being Z or K Identifies Silicon Characterized in this Datasheet (**) Limited only by Maximum Temperature Allowed February 1999 1/9 IRF630/FP THERMAL DATA TO-220 R thj -case R thj -amb R thc-sink Tl Thermal Resistance Junction-case Max 1.67 62.5 0.5 300 TO-220FP 4.17 o o o C/W C/W C/W o C Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature F or Soldering Purpose AVALANCHE CHARACTERISTICS Symbo l IAR E AS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 o C, ID = IAR , V DD = 50 V) Max Value 9 160 Unit A mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l V (BR)DSS I DSS IGSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 µ A V GS = 0 Min. 200 1 50 ± 100 Typ. Max. Unit V µA µA nA V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating Gate-body Leakage Current (VDS = 0) V GS = ± 20 V T c = 125 oC ON (∗) Symbo l V GS(th) R DS(on) I D(o n) Parameter Gate Threshold Voltage V DS = V GS Static Drain-source On Resistance On State Drain Current V GS = 10V Test Con ditions ID = 250 µ A ID = 5 A 10 Min. 2 Typ. 3 0.35 Max. 4 0.40 Unit V Ω A V DS > ID(o n) x R DS(on )ma x V GS = 10 V DYNAMIC Symbo l g f s (∗ ) C iss C os s C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Con ditions V DS > ID(o n) x R DS(on )ma x V DS = 25 V f = 1 MHz ID = 5 A V GS = 0 Min. 3 Typ. 4 540 90 35 700 120 50 Max. Unit S pF pF pF 2/9 IRF630/FP ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l t d(on) tr Qg Q gs Q gd Parameter Turn-on Time Rise Time Total G ate Charge Gate-Source Charge Gate-Drain Charge Test Con ditions V DD = 100 V I D = 4.5 A R G = 4.7 Ω V GS = 10 V (see test circuit, figure 3) V DD = 160 V ID = 9 A VGS = 10 V Min. Typ. 10 15 31 7.5 9 Max. 14 20 45 Unit ns ns nC nC nC SWITCHING OFF Symbo l tr (Voff) tf tc Parameter Off-voltage Rise T ime Fall T ime Cross-over Time Test Con ditions V DD = 160 V I D = 9 A R G = 4.7 Ω VGS = 10 V (see test circuit, figure 5) Min. Typ. 12 12 25 Max. 17 17 35 Unit ns ns ns SOURCE DRAIN DIODE Symbo l ISD I SDM (• ) V SD ( ∗ ) t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 9 A V GS = 0 170 0.95 11 I SD = 9 A di/dt = 100 A/µ s o Tj = 150 C V DD = 50 V (see test circuit, figure 5) Test Con ditions Min. Typ. Max. 9 36 1.5 Unit A A V ns µC A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area Safe Operating Area for TO-220 Safe Operating Area for TO-220FP 3/9 IRF630/FP Thermal Impedance for TO-220 Thermal Impedance for TO-220FP Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance 4/9 IRF630/FP Gate Charge vs Gate-source Voltage Capacitance Variations Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/9 IRF630/FP Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 IRF630/FP TO-220 MECHANICAL DATA DIM. MIN. A C D D1 E F F1 F2 G G1 H2 L2 L4 L5 L6 L7 L9 DIA. 13.0 2.65 15.25 6.2 3.5 3.75 0.49 0.61 1.14 1.14 4.95 2.4 10.0 16.4 14.0 2.95 15.75 6.6 3.93 3.85 0.511 0.104 0.600 0.244 0.137 0.147 E mm TYP. MAX. 4.60 1.32 2.72 1.27 0.70 0.88 1.70 1.70 5.15 2.7 10.40 0.019 0.024 0.044 0.044 0.194 0.094 0.393 MIN. 0.173 0.048 0.094 4.40 1.23 2.40 inch TYP. MAX. 0.181 0.051 0.107 0.050 0.027 0.034 0.067 0.067 0.203 0.106 0.409 0.645 0.551 0.116 0.620 0.260 0.154 0.151 A C D1 L2 F1 D G1 Dia. F2 F L5 L7 L6 L9 L4 G H2 P011C 7/9 IRF630/FP TO-220FP MECHANICAL DATA DIM. MIN. A B D E F F1 F2 G G1 H L2 L3 L4 L6 L7 Ø 28.6 9.8 15.9 9 3 4.4 2.5 2.5 0.45 0.75 1.15 1.15 4.95 2.4 10 16 30.6 10.6 16.4 9.3 3.2 1.126 0.385 0.626 0.354 0.118 mm TYP. MAX. 4.6 2.7 2.75 0.7 1 1.7 1.7 5.2 2.7 10.4 MIN. 0.173 0.098 0.098 0.017 0.030 0.045 0.045 0.195 0.094 0.393 0.630 1.204 0.417 0.645 0.366 0.126 inch TYP. MAX. 0.181 0.106 0.108 0.027 0.039 0.067 0.067 0.204 0.106 0.409 A B L3 L6 L7 F1 ¯ F D G1 E H F2 123 L2 L4 8/9 G IRF630/FP Information furnished is believed to be accurate and reliable. However, STMicroelect onics assumes no responsibil ity for the consequences r of use of such information nor for any infringement of patents or other rights of third partes which may result from its use. No license is i granted by implication or otherwise under any patent or patent rights of STMicroelectro nics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all informaton previously supplied. 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