ISO8200B
Datasheet
Galvanic isolated octal high-side smart power solid state-relay
Features
Product status link
ISO8200B
Product summary
Package
Packing
ISO8200B
Product label
RDS(on) (1)
IOUT (1)
Vcc
ISO8200B
Vcc- 45 V
0.12 Ω
0.7 A
45 V
•
•
•
•
•
•
•
•
•
•
Parallel input interface
Direct and synchronous control mode
High common mode transient immunity
Output current: 0.7 A per channel
Short-circuit protection
Channel overtemperature protection
Thermal independence of separate channels
Common output disable pin
Case overtemperature protection
Loss of GNDcc and Vcc protection
•
•
Undervoltage shutdown with auto-restart and hysteresis
Overvoltage protection (Vcc clamping)
•
•
•
•
•
•
•
•
Very low supply current
Common fault open-drain output
5 V and 3.3 V TTL/CMOS compatible I/Os
Fast demagnetization of inductive loads
Reset function for IC output disable
ESD protection
IEC 61000-4-2, IEC 61000-4-4, IEC 61000-4-5 and IEC 61000-4-8 compliant
UL1577 certification
ISO8200BTR
Power SO36
Tube
Vdemag (1)
1. Per channel.
PowerSO-36
Order code
Type
Tape & Reel
Applications
•
•
•
•
Programmable logic control
Industrial PC peripheral input/output
Numerical control machines
Drivers for all types of loads (resistive, capacitive, inductive)
Description
The ISO8200B is a galvanic isolated 8-channel driver featuring a very low supply
current. It contains 2 independent galvanic isolated voltage domains (Vcc for the
power stage and Vdd for the digital stage). Additional embedded functions are: loss of
GND protection, undervoltage shutdown with hysteresis, and reset function for
immediate power output shutdown.
DS9322 - Rev 11 - October 2019
For further information contact your local STMicroelectronics sales office.
www.st.com
ISO8200B
IC is intended to drive any kind of load with one side connected to ground. Active
channel current limitation combined with thermal shutdown, (independent for each
channel), and automatic restart, protect the device against overload and short-circuit.
In overload conditions, if junction temperature overtakes threshold, the channel
involved is turned off and on again automatically after the IC temperature decreases
below a reset threshold. If this condition causes case temperature to reach TCR limit
threshold, the overloaded channel is turned off and it only restarts when case and
junction temperature decrease down to the reset thresholds. Non-overloaded
channels continue operating normally. An internal circuit provides an OR-wired nonlatched common FAULT indicator signaling the channel OVT. The FAULT pin is an
open-drain active low fault indication pin.
DS9322 - Rev 11
page 2/37
ISO8200B
Block diagram
1
Block diagram
Figure 1. Block diagram
Vdd
Power
management
Vcc
Undervoltage
detection
Vcc clamp
SYNC
LOAD
OUT_EN
IN1
Output clamp
Logic
Logic
OUTi
Current limit
IN8
Junction temperature
detection
FAULT
GNDdd
Rpd
Case temperature
detection
GNDcc
AM14889v1
DS9322 - Rev 11
page 3/37
ISO8200B
Pin connection
2
Pin connection
Figure 2. Pin connection (top through view)
Table 1. Pin description
Pin
DS9322 - Rev 11
Name
Description
1
NC
Not connected
2
Vdd
Positive logic supply
3
OUT_EN
Output enable
4
SYNC
Input-to-output synchronization signal. Active low, see Section 6.3 Synchronous control mode (SCM)
5
LOAD
Load input data signal. Active low, see Section 6.3 Synchronous control mode (SCM)
6
IN1
Channel 1 input
7
IN2
Channel 2 input
8
IN3
Channel 3 input
9
IN4
Channel 4 input
10
IN5
Channel 5 input
11
IN6
Channel 6 input
12
IN7
Channel 7 input
13
IN8
Channel 8 input
14
FAULT
Common fault indication, active low
15
GNDDD
Input logic ground, negative logic supply
16
NC
Not connected
17
NC
Not connected
page 4/37
ISO8200B
Pin connection
Pin
Name
18
NC
Not connected
19
GNDCC
Output power ground
20
NC
Not connected
21
OUT8
Channel 8 power output
22
OUT8
Channel 8 power output
23
OUT7
Channel 7 power output
24
OUT7
Channel 7 power output
25
OUT6
Channel 6 power output
26
OUT6
Channel 6 power output
27
OUT5
Channel 5 power output
28
OUT5
Channel 5 power output
29
OUT4
Channel 4 power output
30
OUT4
Channel 4 power output
31
OUT3
Channel 3 power output
32
OUT3
Channel 3 power output
33
OUT2
Channel 2 power output
34
OUT2
Channel 2 power output
35
OUT1
Channel 1 power output
36
OUT1
Channel 1 power output
TAB Vcc
DS9322 - Rev 11
Description
Exposed tab internally connected to Vcc, positive power supply voltage
page 5/37
ISO8200B
Absolute maximum ratings
3
Absolute maximum ratings
Table 2. Absolute maximum ratings
Symbol
Parameter
Min.
Max.
Unit
VCC
Power supply voltage
-0.3
45
V
Vdd
Digital supply voltage
-0.3
6.5
V
VIN
DC input pin voltage (INx, OUT_EN, LOAD , SYNC )
-0.3
+6.5
V
VFAULT
Fault pin voltage
-0.3
+6.5
V
IGNDdd
DC digital ground reverse current
-25
mA
IOUT
Channel output current (continuous)
Internally limited
A
IGNDcc
DC power ground reverse current
-250
mA
IR
Total reverse output current (from OUTx to GND)
-5
A
IIN
DC input pin current (INx, OUT_EN, LOAD , SYNC )
-10
+ 10
mA
IFAULT
Fault pin current
-10
+ 10
mA
2000
V
VESD
EAS
Electrostatic discharge with human body model
(R = 1.5 kΩ; C = 100 pF)
Single pulse avalanche energy per channel not simultaneously @Tamb= 125 °C,
IOUT = 0.5 A
0.9
Single pulse avalanche energy per channel, all channels driven simultaneously
@Tamb= 125 °C, IOUT = 0.5 A
0.2
J
PTOT
Power dissipation at Tc = 25 °C
Internally limited (1)
W
TJ
Junction operating temperature
Internally limited(1)
°C
TSTG
Storage temperature
-55 to 150
°C
1. Protection functions are intended to avoid IC damage in fault conditions and are not intended for continuous operation.
Continuous or repetitive operations of protection functions may reduce the IC lifetime.
DS9322 - Rev 11
page 6/37
ISO8200B
Thermal data
4
Thermal data
Table 3. Thermal data
Symbol
Parameter
Rthj-case
Thermal resistance,
Rthj-amb
Thermal resistance, junction-ambient (2)
junction-case(1)
Max. value
Unit
1.3
°C/W
15
°C/W
1. For each channel.
2. PSSO-36 mounted on the product evaluation board STEVAL-IFP015V2 (FR4, 4 layers, 8 cm2 for each layer, copper
thickness 35 μm).
DS9322 - Rev 11
page 7/37
ISO8200B
Electrical characteristics
5
Electrical characteristics
(10.5 V < VCC < 36 V; -40 °C < TJ < 125 °C, unless otherwise specified)
Table 4. Power section
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
10.5
V
VCC(THON)
VCC undervoltage turn-ON threshold
9.5
VCC(THOFF)
VCC undervoltage turn-OFF threshold
9
V
VCC(hys)
VCC undervoltage hysteresis
0.35
0.5
V
VCC clamp
Clamp on VCC pin
45
50
RDS(on)
On-state resistance (1)
Rpd
Output pull-down resistor
ICC
Power supply current
ILGND
Ground disconnection output current
VOUT(OFF)
Off-state output voltage
IOUT(OFF)
Off-state output current
Iclamp = 20 mA
IOUT = 0.5 A, TJ = 25 °C
52
V
0.12
IOUT = 0.5 A TJ = 125 °C
Ω
0.24
210
All channels in OFF-state
5
All channels in ON-state
9
kΩ
mA
VCC = VGND = 0 V
VOUT = -24 V
Channel OFF and
IOUT = 0 A
Channel OFF and
VOUT = 0 V
500
µA
1
V
5
µA
1. See Figure 4. RDS(on) measurement
Table 5. Digital supply voltage
Symbol
Vdd(under)
Vdd undervoltage protection turn-OFF
threshold
Vdd(hys)
Vddundervoltage hysteresis
Idd
DS9322 - Rev 11
Parameter
Idd supply current
Test conditions
Min. Typ. Max. Unit
2.8
2.9
3.0
0.1
V
V
Vdd = 5 V and input channel with a steady logic
level
4.5
6
mA
Vdd = 3.3 V and input channel with a steady
logic level
4.4
5.9
mA
page 8/37
ISO8200B
Electrical characteristics
Table 6. Diagnostic pin and output protection function
Symbol
Parameter
Test conditions
VFAULT
FAULT pin open-drain voltage output low
IFAULT = 10 mA
ILFAULT
FAULT output leakage current
VFAULT = 5 V
IPEAK
Maximum DC output current before limitation
ILIM
Short-circuit current limitation
Hyst
ILIM tracking limits
TJSD
Junction shutdown temperature
TJ R
VCC = 24 V
RLOAD = 0 Ω
Min.
Typ.
Max.
Unit
0.4
V
1
µA
1.4
0.7
A
1.1
1.7
A
0.3
A
170
°C
Junction reset temperature
150
°C
THIST
Junction thermal hysteresis
20
°C
TCSD
Case shutdown temperature
TCR
Case reset temperature
110
°C
TCHYST
Case thermal hysteresis
20
°C
Vdemag
Output voltage at turn-OFF
150
115
IOUT = 0.5 A
ILOAD > = 1 mH
130
VCC-45
145
VCC-50
°C
VCC-52
V
Table 7. Power switching characteristics (VCC = 24 V; -40 °C < TJ < 125 °C)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
dV/dt(ON)
Turn-ON voltage slope
IOUT = 0.5 A, resistive load 48 Ω
-
5.6
-
V/µs
dV/dt(OFF)
Turn-OFF voltage slope
IOUT = 0.5 A, resistive load 48 Ω
-
2.81
-
V/µs
td(ON)
Turn-ON delay time (1)
IOUT = 0.5 A, resistive load 48 Ω
-
17
22
µs
td(OFF)
Turn-OFF delay time ( 1)
IOUT = 0.5 A, resistive load 48 Ω
-
22
40
µs
tf
Fall time (1)
IOUT = 0.5 A, resistive load 48 Ω
-
5
-
µs
tr
Rise time (1)
IOUT = 0.5 A, resistive load 48 Ω
-
5
-
µs
1. See Figure 4. RDS(on) measurement , Figure 6. td(ON)-td(OFF) synchronous mode and Figure 7. td(ON)td(OFF) direct control mode .
DS9322 - Rev 11
page 9/37
ISO8200B
Electrical characteristics
Figure 3. RDS(on) measurement
TAB Vcc
VRDS(on)
Load
AM14891v1
Figure 4. dV/dT
90%
dV (ON)
Vout
dV (OFF)
80%
10%
tr
t
tf
AM14892v1
Figure 5. td(ON)-td(OFF) synchronous mode
SYNC
SCM
50%
t
td(OFF)
Vout
90%
10%
td(ON)
DS9322 - Rev 11
AM14893v1
t
page 10/37
ISO8200B
Electrical characteristics
Figure 6. td(ON)-td(OFF) direct control mode
Table 8. Logic input and output
Symbol
Parameter
Test conditions
VIL
Logic input pin low level voltage (INx, OUT_EN, LOAD , SYNC )
VIH
Logic input pin high level voltage (INx, OUT_EN, LOAD ,
SYNC)
VI(HYST) Logic input hysteresis voltage (INx, OUT_EN, LOAD , SYNC )
Vdd = 5 V
IIN
Logic input pin current (INx, OUT_EN, LOAD , SYNC )
VIN = 5 V
tWM
Power side watchdog time
Min.
Typ.
Max.
Unit
-0.3
0.3 x Vdd
V
0.7 x Vdd
Vdd + 0.3
V
100
mV
10
272
µA
320
400
µs
Max.
Unit
Table 9. Parallel interface timings (Vdd = 5 V; VCC= 24 V; -40 °C < TJ < 125 °C)
Symbol
DS9322 - Rev 11
Parameter
Test conditions
Min.
Typ.
tdis(SYNC)
SYNC disable time
Sync. control mode
10
µs
tdis(DCM)
SYNC , LOAD disable time
Direct control mode
80
ns
tw(SYNC)
SYNC negative pulse width
Sync. control mode
20
tsu(LOAD)
LOAD setup time
Sync. control mode
80
ns
th(LOAD)
LOAD hold time
Sync. control mode
400
ns
tw(LOAD)
LOAD pulse width
Sync. control mode
240
ns
tsu(IN)
Input setup time
80
ns
th(IN)
Input hold time
10
ns
tw(IN)
Input pulse width
Sync. control mode
160
ns
Direct control mode
20
µs
tINLD
IN to LOAD time
80
ns
tLDIN
LOAD to IN time
400
ns
Direct control mode
From IN variation to LOAD falling edge
Direct control mode
From LOAD falling edge to IN variation
195
µs
page 11/37
ISO8200B
Electrical characteristics
Symbol
tw(OUT_EN)
tp(OUT_EN)
tjitter(SCM)
tjitter(DCM)
frefresh
Parameter
Test conditions
OUT_EN pulse width
Min.
Typ.
Max.
150
OUT_EN propagation
ns
22
delay
Jitter on single channel
40
Sync. mode
6
Direct mode
20
Refresh delay
Unit
µs
µs
15
kHz
Table 10. Insulation and safety-related specifications
Symbol
Parameter
Test conditions
Value
Unit
CLR
Clearance (minimum
external air gap)
Measured from input terminals to
output terminals, the shortest
distance through air
2.6
mm
CPG
Creepage (minimum
external tracking)
Measured from input terminals to
output terminals, the shortest
distance path analog body
2.6
mm
Comparative tracking
index (tracking
resistance)
DIN IEC 112/VDE 0303 part 1
≥ 400
V
Isolation group
Material group (DIN VDE 0110,
1/89), table 1
II
-
CTI
Table 11. Insulation characteristics
Symbol
dVISO/dt
Parameter
Common mode
transient immunity
Test conditions
Value
Unit
Characterization test at Vcm = 500 V
+/- 25
V/ns
100% production VTEST = 1.2 x
VISO=1644 V, t = 1 s
1370
VPEAK
100% production test method b, tm =
1 s partial discharge < 5 pC
1644
Characterization test method a, tm =
10 s partial discharge < 5 pC
1315
Characterization test VTEST = 1.2 x
VIOTM, t = 60 s
3500
IEC 60747-5-2 insulation characteristics
VISO
Isolation voltage per
UL 1577
VPR
Input-to-output test
voltage as per IEC
60747-5-2
VIOTM
DS9322 - Rev 11
Transient overvoltage
as per IEC 60747-5-2
VPEAK
VPEAK
page 12/37
ISO8200B
Functional description
6
Functional description
6.1
Parallel interface
Smart parallel interface built-in ISO8200B offers three interfacing signals easily managed by a microcontroller.
The LOAD signal enables the input buffer storing the value of the channel inputs.
The SYNC signal copies the input buffer value into the transmission buffer and manages the synchronization
between low voltage side and the channel outputs on the isolated side.
The OUT_EN signal enables the channel outputs.
An internal refresh signal updates the configuration of the channel outputs with a frefresh frequency. This signal
can be disabled forcing low the SYNC input when LOAD is high.
SYNC and LOAD pins can operate in direct control mode (DCM) or synchronous control mode (SCM).
The operation of these two signals is described as follows:
Table 12. Interface signal operation (general)
LOAD
SYNC
OUT_EN
Don’t care
Don’t care
Low
High
High
High
Low
High
High
High
Low
High
(1)
Device behavior
The outputs are disabled (turned off)
The outputs are left unchanged
The input buffer is enabled
The outputs are left unchanged
The internal refresh signal is disabled
The transmission buffer is updated
The outputs are left unchanged
Low
Low
High
The device operates in direct control mode as described in the respective paragraph
1. The outputs are turned off on OUT_EN falling edge and they are kept disabled as long as it is low.
6.1.1
Input signals (IN1 to IN8)
Inputs from IN1 to IN8 are the driving signals of the corresponding OUT1 to OUT8 outputs. Data are direct loaded
on related outputs if SYNC and LOAD inputs are low (DCM operation) or stored into input buffer when LOAD is
low and SYNC is high.
6.1.2
Load input data (LOAD)
The input is active low; it stores the data from IN1 to IN8 into the input buffer.
6.1.3
Output synchronization (SYNC)
The input is active low; it enables the ISO8200B transmission buffer loading input buffer data and manages the
transmission between the two isolated sides of the device.
6.1.4
Watchdog
The isolated side of the device provides a watchdog function in order to guarantee a safe condition when Vdd
supply voltage is missing.
If the logic side does not update the output status within tWD, all outputs are disabled until a new update request is
received.
The refresh signal is also considered a valid update signal, so the isolated side watchdog does not protect the
system from a failure of the host controller (MCU freezing).
DS9322 - Rev 11
page 13/37
ISO8200B
Direct control mode (DCM)
Figure 7. Watchdog behavior
Vdd
______
Don’t care
SYNC
Don’t care
_____
LOAD
A
D0…D7
B
REFRESH
C
C
Don’t care
SKIPPED
!
A
OUT0…OUT7
B
If the isolated side does not
Outputs are kept
receive an update request
within the watchdog timeout OFF until an update
all outputs are turned OFF request is received
C
C
Timeout
counter
Any update request
resets the watchdog counter
6.1.5
IPG1912131338LM
Output enable (OUT_EN)
This pin provides a fast way to disable all outputs simultaneously. When the OUT_EN pin is driven low the outputs
are disabled. To enable the output stage, the OUT_EN pin has to be raised. This timing execution is compatible
with an external reset push, safety requirement, and allows, in a PLC system, the microcontroller polling to obtain
all internal information during a reset procedure.
Figure 8. Output channel enable timing
6.2
Direct control mode (DCM)
When SYNC and LOAD inputs are driven by the same signal, the device operates in direct control mode (DCM).
In DCM the SYNC / LOAD signal operates as an active low input enable:
•
when the signal is high, the current output configuration is kept regardless the input values
•
when the signal is low, each channel input directly drives the respective output
This operation mode can also be set shorting both signals to the digital ground; in this case the channel outputs
are always directly driven by the inputs except when OUT_EN is low (outputs disabled).
Table 13. Interface signal operation in direct control mode
SYNC / LOAD
OUT_EN
Device behavior
Don’t care
Low (1)
The outputs are disabled (turned off)
High
High
The outputs are left unchanged
Low
High
The channel inputs drive the outputs
1. The outputs are turned off on OUT_EN falling edge and they are kept disabled as long as it is low.
DS9322 - Rev 11
page 14/37
ISO8200B
Synchronous control mode (SCM)
Figure 9. Direct control mode IC configuration
Vdd
Vdd
Vdd
Vdd
Vdd
Vdd
OUT_EN
SYNC
LOAD
OUT_EN
SYNC
LOAD
IN1
IN2
IN3
IN4
IN5
IN6
MCU
GPIO
ISO8200B
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
MCU
GPIO
IN7
IN8
Vdd
Vdd
FAULT
FAULT
GND
ISO8200B
GNDdd
GND
Inputs are enabled by MCU through
the SYNC/LOAD signals
GNDdd
Inputs are always enabled
(outputs can be disabled through OUT_EN)
AM14897v1
Figure 10. Direct control mode time diagram
SYNC
LOAD
tds(DMC)
INx
t INLD
t LDIN
t SU(IN)
t h(IN)
Internal
refresh
1/ f refresh
OUTx
td(OFF)
6.3
tf
td(ON)
tr
AM14898v1
Synchronous control mode (SCM)
When SYNC and LOAD inputs are independently driven, the device can operate in synchronous control mode
(SCM). The SCM is used to reduce the jittering of the outputs and to drive all outputs of different devices at the
same time.
In SCM the LOAD signal is forced low to update the input buffer while the SYNC signal is high. The LOAD signal
is raised and the SYNC one is forced low for at least tSYNC(SCM). During this period, the internal refresh is
disabled and any pending transmission between the low voltage and the isolated side is completed. When the
SYNC signal is raised the channel output configuration is changed according to the one stored in the input.
If the tSYNC(SCM) limit is met, the maximum jitter of the channel outputs is tjitter(SCM).
If more devices share the same SYNC signal, all device outputs change simultaneously with a maximum jitter
related to maximum delay and maximum jitter for single device.
DS9322 - Rev 11
page 15/37
ISO8200B
Synchronous control mode (SCM)
Table 14. Interface signal operation in synchronous control mode
LOAD
SYNC
OUT_EN
Device behavior
Don’t care
Don’t care
Low (1)
The outputs are disabled (turned off)
High
High
High
The outputs are left unchanged
Low
High
High
The input buffer is enabled
The outputs are left unchanged
The internal refresh signal is disabled
High
Low
High
The transmission buffer is updated
The outputs are left unchanged
High
Rising edge
High
The outputs are updated according to the current transmission buffer value
Low
Low
High
Should be avoided (DCM operation only)
1. The outputs are turned off on OUT_EN falling edge and they are kept disabled as long as it is low.
Figure 11. Synchronous control mode IC configuration
Vdd
Vdd
Vdd
OUT_EN
SYNC
LOAD
IN1
MCU
IN2
IN3
ISO8200B
IN4
GPIO
IN5
IN6
IN7
IN8
Vdd
FAULT
GND
GNDdd
AM14899v1
DS9322 - Rev 11
page 16/37
ISO8200B
Fault indication
Figure 12. Synchronous control mode time diagram
Figure 13. Multiple device synchronous control mode
DEV1
MCU
SYNC
LOAD
SYNC
LD1
LD2
DATA1..DATA8
8
IN1..IN8
OUT0..OUT7
SYNC
8
LD1
LD2
DEV2
DATA1..DATA8
SYNC
LOAD
IN1..IN8
OUT0..OUT7
8
OUT1..OUT8
DEV1
OUT1..OUT8
DEV2
A
B
X
A
X
B
AM14901v1
6.4
Fault indication
The FAULT pin is an active low open-drain output indicating fault conditions. This pin is active when at least one
of the following conditions occurs:
•
Junction overtemperature of one or more channels (TJ >TTJSD)
•
Communication error
The communication error is intended as an internal data corruption event in the data transfer through isolation. In
case of communication error the outputs are initially kept in the previous status and then reset (turned off) at the
first communication error during data transfer of the refresh signal.
6.4.1
Junction overtemperature and case overtemperature
The thermal status of the device is updated during each transmission sequence between the two isolated sides.
In SCM operation, when the LOAD signal is high and the SYNC one is low, the communication is disabled. In this
case the thermal status of the device cannot be updated and the FAULT indication can be different from the
current status.
In any case, the thermal protection of the channel outputs is always operative.
DS9322 - Rev 11
page 17/37
ISO8200B
Fault indication
Figure 14. Thermal status update (DCM)
Figure 15. Thermal status update (SCM)
SYNC
FAULT
Skipped
Internal
refresh
Tx/Rx
Tx/Rx
Tx/Rx
THERMAL
FAULT
AM14992v1
DS9322 - Rev 11
page 18/37
ISO8200B
Power section
7
Power section
7.1
Current limitation
The current limitation process is active when the current sense connected on the output stage measures a current
value, which is higher than a fixed threshold.
When this condition is verified the gate voltage is modulated to avoid the increase of the output current over the
limitation value.
Figure below shows typical output current waveforms with different load conditions.
Figure 16. Current limitation with different load conditions
DS9322 - Rev 11
page 19/37
ISO8200B
Thermal protection
7.2
Thermal protection
The device is protected against overheating in case of overload conditions. During the driving period, if the output
is overloaded, the device suffers two different thermal stresses, the former related to the junction, and the latter
related to the case.
The two faults have different trigger thresholds: the junction protection threshold is higher than the case protection
one; generally the first protection, that is active in thermal stress conditions, is the junction thermal shutdown. The
output is turned off when the temperature is higher than the related threshold and turned back on when it goes
below the reset threshold. This behavior continues until the fault on the output is present.
If the thermal protection is active and the temperature of the package increases over the fixed case protection
threshold, the case protection is activated and the output is switched off and back on when the junction
temperature of each channel in fault and case temperature is below the respective reset thresholds.
Below figures show respectively the thermal protection behavior, and the typical temperature trends and output
vs. input state.
Figure 17. Thermal protection flowchart
Input IN(i) HIGH
Output (i) ON
Fault(i) Off
N
TJ(i) >TJSD
Y
N
Output (i) OFF
Fault(i) ON
TC >TCSD
N
Y
TJR >TJ(i)
Y
Y
TC >TCR
N
AM14995v1
DS9322 - Rev 11
page 20/37
ISO8200B
Thermal protection
Figure 18. Thermal protection
DS9322 - Rev 11
page 21/37
ISO8200B
Reverse polarity protection
8
Reverse polarity protection
Reverse polarity protection can be implemented on board using two different solutions:
1.
Placing a resistor (RGND) between IC GND pin and load GND
2.
Placing a diode between IC GND pin and load GND
If option 1 is selected, the minimum resistance value has to be selected according to the following equation:
RGND ≥ VCC/IGNDcc
where IGNDcc is the DC reverse ground pin current and can be found in Section 3 Absolute maximum ratings of
this datasheet.
Power dissipated by RGND during reverse polarity situations is:
PD = (VCC ) 2/RGND
If option 2 is selected, the diode has to be chosen by taking into account VRRM >|VCC| and its power dissipation
capability:
PD ≥ IS*VF
Note:
In normal conditions (no reverse polarity), due to the diode, there is a voltage drop between GND of the device
and GND of the system.
Figure 19. Reverse polarity protection
Intputi
GNDdd
+Vcc
Isolation
+Vdd
RGND
Outputi
GNDCC
Load
Diode
GIPD2611131255LM
This schematic can be used with any type of load.
DS9322 - Rev 11
page 22/37
ISO8200B
Reverse polarity on Vdd
9
Reverse polarity on Vdd
The reverse polarity on Vdd can be implemented on board by placing a diode between GNDdd pin and GND digital
ground.
The diode has to be chosen by taking into account VRRM >|Vdd| and its power dissipation capability:
PD ≥ Idd*VF
Note:
In normal conditions (no reverse polarity), due to the diode, there is a voltage drop between GNDdd of the device
and digital ground of the system.
Figure 20. Reverse polarity protection on Vdd
Intputi
GNDdd
Diode
+Vcc
Isolation
+Vdd
Outputi
GNDCC
RGND
Load
Diode
GIPD2611131302LM
DS9322 - Rev 11
page 23/37
ISO8200B
Conventions
10
Conventions
10.1
Supply voltage and power output conventions
Figure below shows the convention used in this paper for voltage and current usage.
Figure 21. Supply voltage and power output conventions
Idd
ICC
Vdd
IFAULT
Vdd
VCC
FAULT
IIN
IN
I OUT_EN
ISYNC
ILOAD
OUT_EN
Iout
VCC
OUT
SYNC
LOAD
GNDdd
GNDcc
Vout
AM14997v1
DS9322 - Rev 11
page 24/37
ISO8200B
Thermal information
11
Thermal information
11.1
Thermal impedance
Figure 22. Simplified thermal model
Tj1
Rth1a
Rth1b
Tj2
Rthc_a
Rth2
Cth
Rth1h
Tj8
AM14998v1
DS9322 - Rev 11
page 25/37
ISO8200B
Package information
12
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.
12.1
PowerSO-36 package information
Figure 23. PowerSO-36 package outline
Table 15. PowerSO-36 package mechanical data
Dim.
mm
Min.
Typ.
A
a1
3.60
0.10
0.30
a2
3.30
a3
0
0.10
b
0.22
0.38
c
0.23
0.32
D
15.80
16.00
D1
9.40
9.80
E
13.90
14.50
E1
10.90
11.10
E2
E3
DS9322 - Rev 11
Max.
2.90
5.8
6.2
e
0.65
e3
11.05
G
0
0.10
H
15.50
15.90
page 26/37
ISO8200B
Footprint recommended data
mm
Dim.
Min.
Typ.
Max.
h
1.10
L
0.80
1.10
N
10°
S
12.2
0°
8°
Footprint recommended data
Figure 24. Footprint recommended data
E
G
L
B
H
C
D
A
Table 16. Footprint data
DS9322 - Rev 11
Dim
mm
A
9.5
B
14.7 - 15.0
C
12.5 - 12.7
D
6.3
E
0.42
G
0.65
H
4.1
L
3.2
page 27/37
ISO8200B
Tube shipment information
12.3
Tube shipment information
Figure 25. Tube shipment information
Table 17. Tube mechanical data
DS9322 - Rev 11
Dim
mm
A
18.80
B
17.2±0.2
C
8.20±0.2
D
10.90±0.2
E
2.90±0.2
F
0.40
G
0.80
H
6.30
I
4.30±0.2
J
3.7±0.2
K
9.4
L
0.40
M
0.80
N
3.50±0.2
page 28/37
ISO8200B
Tape and reel shipment information
12.4
Tape and reel shipment information
Figure 26. Tape specifications
Table 18. Tape mechanical data
DS9322 - Rev 11
Dim
mm
D
1.50+0.1/0
E
1.75 ±0.1
PO
4.00 ±0.1
Tmax
0.40
D1min
1.50
F
11.5 ±0.05
Kmax
6.50
P2
2.00 ±0.1
R
50
W
24.00 ±0.30
P1
24.00
AO, BO, KO,
0.05 min to 1.0 max
page 29/37
ISO8200B
Tape and reel shipment information
Figure 27. Reel specifications
Table 19. Reel mechanical data
DS9322 - Rev 11
Dim
mm
Tape size
24.0±0.30
Amax
330.0
Bmin
1.5
C
13.0±0.20
Dmin
20.2
Nmin
60
G
24.4+2/-0
Tmax
30.4
page 30/37
ISO8200B
Ordering information
13
Ordering information
Table 20. Ordering information
Order code
DS9322 - Rev 11
Package
Packing
ISO8200B
PowerSO-36
Tube
ISO8200BTR
PowerSO-36
Tape and reel
page 31/37
ISO8200B
Revision history
Table 21. Document revision history
Date
Changes
19-Oct-2012
1
Initial release.
01-Jul-2013
2
Updated Figure 24: Footprint recommended data and Table 15: Footprint data.
3
Document status promoted from preliminary to production data. Added IEC bullet to features.
Updated Table 4, Table 6, Table 7, and Table 9. Deleted table titled: “Insulation and safety-related
specifications” and table titled: “Device immunity specifications”. Changed Table 10: IEC 60747-5-2
insulation characteristics Changed Figure 10.
28-Oct-2013
DS9322 - Rev 11
Revision
12-Nov-2013 4
Added to Table 10 CLR and CPG parameters.
29-Nov-2013 5
Removed VIORM parameter from Table 10. Updated Section 8: Reverse polarity protection. Added
Section 9: Reverse polarity on Vdd. Changed Figure 19. Added Figure 20.
24-Jan-2014 6
Changed Figure 7. Added note to Table 3. Added test conditions: TJ = 125 °C to Table 4. Added typ.
and max. values of Idd to Table 5. Added max. values of td(ON) and td(OFF) to Table 7. Added typ.
and max. values of tp(OUT_EN) to Table 9. Added tjitter(DCM) value to Table 9.
03-Feb-2014 7
Updated Figure 12.
06-Feb-2014 8
Updated Figure 12 and Table 9
22-Apr-2014
9
Updated EAS parameter in Table 2. Updated IPEAK parameter in Table 6. Updated mechanical data.
03-Jul-2017
10
Updated features, Table 1. Pin description, Section 5 Electrical characteristics and Section
6.4 Fault indication.
17-Oct-2019
11
Updated features ,updated the name of the last Pin in Table 1 , updated Table 15, added : Section
12.2 , Section 12.3 ,Section 12.4 , updated Table 11.
page 32/37
ISO8200B
Contents
Contents
1
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
3
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
5
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
6
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
6.1
Parallel interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6.1.1
Input signals (IN1 to IN8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6.1.2
Load input data (LOAD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6.1.3
Output synchronization (SYNC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6.1.4
Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6.1.5
Output enable (OUT_EN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6.2
Direct control mode (DCM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6.3
Synchronous control mode (SCM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6.4
Fault indication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6.4.1
7
Junction overtemperature and case overtemperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
7.1
Current limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
7.2
Thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
8
Reverse polarity protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
9
Reverse polarity on Vdd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
10
Conventions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
10.1
11
Thermal information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
11.1
12
Supply voltage and power output conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Thermal impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
12.1
PowerSO-36 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
12.2
Footprint recommended data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
12.3
Tube shipment information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
DS9322 - Rev 11
page 33/37
ISO8200B
Contents
12.4
13
Tape and reel shipment information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
List of tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
List of figures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
DS9322 - Rev 11
page 34/37
ISO8200B
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Pin description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Diagnostic pin and output protection function . . . . . . . . . . . . . . . . . . .
Power switching characteristics (VCC = 24 V; -40 °C < TJ < 125 °C) . . .
Logic input and output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Parallel interface timings (Vdd = 5 V; VCC= 24 V; -40 °C < TJ < 125 °C) .
Insulation and safety-related specifications . . . . . . . . . . . . . . . . . . . .
Insulation characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interface signal operation (general) . . . . . . . . . . . . . . . . . . . . . . . . .
Interface signal operation in direct control mode. . . . . . . . . . . . . . . . .
Interface signal operation in synchronous control mode . . . . . . . . . . .
PowerSO-36 package mechanical data . . . . . . . . . . . . . . . . . . . . . .
Footprint data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tube mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tape mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reel mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ordering information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DS9322 - Rev 11
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. 4
. 6
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. 8
. 9
. 9
11
11
12
12
13
14
16
26
27
28
29
30
31
32
page 35/37
ISO8200B
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
DS9322 - Rev 11
Block diagram . . . . . . . . . . . . . . . . . . . . . .
Pin connection (top through view) . . . . . . . . .
RDS(on) measurement . . . . . . . . . . . . . . . . .
dV/dT . . . . . . . . . . . . . . . . . . . . . . . . . . . .
td(ON)-td(OFF) synchronous mode . . . . . . . .
td(ON)-td(OFF) direct control mode . . . . . . . .
Watchdog behavior . . . . . . . . . . . . . . . . . . .
Output channel enable timing . . . . . . . . . . . .
Direct control mode IC configuration . . . . . . .
Direct control mode time diagram . . . . . . . . .
Synchronous control mode IC configuration . .
Synchronous control mode time diagram . . . .
Multiple device synchronous control mode . . .
Thermal status update (DCM). . . . . . . . . . . .
Thermal status update (SCM) . . . . . . . . . . . .
Current limitation with different load conditions
Thermal protection flowchart . . . . . . . . . . . .
Thermal protection . . . . . . . . . . . . . . . . . . .
Reverse polarity protection. . . . . . . . . . . . . .
Reverse polarity protection on Vdd . . . . . . . .
Supply voltage and power output conventions
Simplified thermal model . . . . . . . . . . . . . . .
PowerSO-36 package outline . . . . . . . . . . .
Footprint recommended data . . . . . . . . . . . .
Tube shipment information . . . . . . . . . . . . . .
Tape specifications . . . . . . . . . . . . . . . . . . .
Reel specifications . . . . . . . . . . . . . . . . . . .
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page 36/37
ISO8200B
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service
names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2019 STMicroelectronics – All rights reserved
DS9322 - Rev 11
page 37/37