L3030

L 3000S L3030 SUBSCRIBER LINE INTERFACE KIT . . . . . . . . . . . . . . . . PRELIMINARY DAT A PROGRAMMABLE DC FEEDING RESIS-TANCE AND LIMITINGCURRENT (fourvalues available) THREE OPERATING MODES : STAND-BY, CONVERSATION, RINGING NORMAL/BOOSTBATTERY, DIRECT/REVERSE POLARITY SIGNALLING FUNCTION (off-hook/GND-key) FILTERED OFF-HOOK DETECTION IN STAND-BY (10ms) QUICK OFF-HOOK DETECTION IN CONVERSATION (< 1ms) FOR LOW DIAL PULSE DETECTION DISTORTION HYBRID FUNCTION RINGING GENERATION WITH QUASI ZERO OUTPUT IMPEDANCE, ZERO CROSSING INJECTION (no ext. relay needed) AND RING TRIP DETECTION AUTOMATIC RINGING STOP WHEN OFFHOOK IS DETECTED PARALLEL AND SERIAL DIGITAL INTERFACES TELETAXE SIGNALINJECTION (2VRMS/5VRMS) LOW NUMBER OF EXTERNAL COMPONENTS GOOD REJECTION OF THE NOISE ON BATTERY VOLTAGE (20dB at 10Hz and 35dB at 1kHz) POSSIBILITY TO WORK ALSO WITH HIGH COMMON MODE CURRENTS INTEGRATED THERMAL PROTECTION WITH THERMAL OVERLOAD INDICATION SURFACE MOUNT PACKAGE (PLCC44 + PowerSO-20) PLCC44 FLEXIWATT15 PowerSO20 slug-up slug-down ORDERING NUMBERS : L3030 (PLCC44) L3000SX-VM (FLEXIWATT15) L3000SX (PowerSO20 slug-up) L3000SX-77 (PowerSO20 slug-down) DESCRIPTION The ST SLIC KIT (L3000S/L3030) is a set of solid state devices designed to integratemain of the functions needed to interface a telephone line. It consists of 2 integrated devices : the L3000S line interface circuit and the L3030 control unit. This kit performs the main features of the BORSHT functions : - Battery feed - Ringing - Signalling - Hybrid June 1997 Additional functions, such as battery reversal, extra batteryuse, line overvoltagesensing and meteringpulse injection are also featured ; most external characteristics,as AC and DC impedances,are programmable with external components.The SLIC injects ringing in balanced mode and for that, as well as for the operation in battery boosted, a positive battery voltage shall be available on the subscriber card. As the right ringing signal amplification both in voltage and in current is provided by SLIC, the ring signal generatorshall onlyprovide a low level signal (0.285Vrms). This kit is fabricatedusing a 140V Bipolar technology for L3000Sand a 12V Bipolar I2L technologyfor L3030. L3030 is available PLCC44 and L3000S in both FLEXIWATT15 and PowerSO-20 for surfacemount application. This kit is suitable for all the following applications: C.O. (CentralOffice),DLC (Digital LoopCarrier) and high range PABX (Private Automatic Branch Exchange). 1/29 L3000S - L3030 PIN CONNECTIONS (top view) PLCC44 FLEXIWATT15 VBN.C. TIP MNT VB+ BGND VDD VIN VBIM VB- 1 2 3 4 5 6 7 8 9 10 D97TL290 20 19 18 17 16 15 14 13 12 11 VBRING N.C. IL IT C2 C1 REF AGND VB- VBVBIM VIN VDD BGND VB+ MNT TIP N.C. VB- 10 9 8 7 6 5 4 3 2 1 D94TL125 11 12 13 14 15 16 17 18 19 20 VBAGND REF C1 C2 IT IL N.C. RING VB- PowerSO-20 (slug-down) PowerSO-20 (slug-up) 2/29 L3000S - L3030 PIN DESCRIPTION (L3000S) FLEX. N° 1 2 3 4 5 6 7 PSO N° 3 4 5 6 7 8 9 Name TIP MNT VB+ BGND VDD VIN VBIM Description A line termination output with current capability up to 100mA (Ia is the current sourced from this pin). Positive Supply Voltage Monitor Positive Battery Supply Voltage Battery ground relative to the VB+ and the VB– supply voltages. It is also the reference ground for TIP and RING signals. Positive Power Supply + 5V 2 wire unbalanced voltage input. Output voltage without current capability, with the following functions : - give an image of the total battery voltage scaled by 40 to the low voltage part. - filter by an external capacitor the noise on VB–. Negative Battery Supply Voltage Analog Ground. All input signals and the VDD supply voltage must be referred to this pin. Voltage reference output with very low temperature coefficient. The connected resistor sets internal circuit bias current. Digital signal input (3 levels) that defines device status with pin 12. Digital signal input (3 levels) that defines device status with pin 11. High precision scaled transversal line current signal. Ia + Ib IT = 100 Scaled longitudinal line current signal. Ib − Ia IL = 100 B line termination output with current capability up to 100mA (Ib is the current sunk into this pin). Not connected 8 9 10 11 12 13 1, 10 11, 20 12 13 14 15 16 VB– AGND REF C1 C2 IT 14 17 IL 15 – 19 2, 18 RING N.C. Notes: 1) Unless otherwise specified all the diagrams in this datasheet refers to the FLEXIWATT15 pin connection. 2) All informations relative to the PowerSO-20 package option should be considered as advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 3/29 L3000S - L3030 PIN DESCRIPTION (L3030) Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Symbol TST REF AGND VSS VDD N.C. CZS ACF ZAC TST VOUT CM RC IT RDC EIA NCS DIO DCKL DGND N.C. N.C. N.C. CI C1 C2 N.C. N.C. IL CRTS TTXIN RGTTX TTXF ZB TST TX RX/RG VBIM TST Function This pin is connected internally for test purpose. It should not be used as a tie point for external components. Bias Set Analog Ground – 5V + 5V Not connected. AC Feedback Input AC Line Impedance Synthesis AC Impedance Adjustement These pins are connected internally for test purpose. It should not be used as a tie point for external components. Two wire unbalanced output. Capacitor Multiplier Input DC Feedback Input Transversal Line Current DC Feeding System Read/write Command Chip Select Command Data Input/output Clock Signal Digital Ground Not connected. Not connected. Not connected. Input/output Changing Command State Control Signal 1 State Control Signal 2 Not connected. Not connected. Longitudinal Line Current Ringtrip Det. & TTX Shaping Teletaxe Signal Input TTX Filter Level Compensation TTX Filter Input Balancing Network These pins are connected internally for test purpose. It should not be used as a tie point for external components. 4W Sending Output 4W Receiving and Ring Input Battery Image Input These pins are connected internally for test purpose. It should not be used as a tie point for external components. 4/29 L3000S - L3030 L 3000S BLOCK DIAGRAM L3030 BLOCK DIAGRAM 5/29 L3000S - L3030 ABSOLUTE MAXIMUM RATINGS Symbol Vb– Vb + |Vb–| + |Vb+| Vdd V ss Vagnd – Vbgnd Tj Tstg Parameter Negative Battery Voltage Positive Battery Voltage Total Battery Voltage Positive Supply Voltage Negative Supply Voltage Max. Voltage between Analog Ground and Battery Ground Max. Junction Temperature Storage Temperature Value – 80 80 140 +6 –6 5 + 150 – 55 to + 150 Unit V V V V V V °C °C THERMAL DATA Symbol L3000S HIGH VOLTAGE Rth j-case R th j-amb R th j-amb Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient Max. Resistance Junction to Ambient Parameter Max. 4 Max. 50 80 Value Flexiwatt PWSO20 Typ. 2 Max. 60 °C/W °C/W °C/W Unit L3030 LOW VOLTAGE OPERATING RANGE Symbol Toper Vb – Vb + Vb– + Vb+ Vdd V ss Imax Parameter Operating Temperature Range Negative Battery Voltage Positive Battery Voltage Total Battery Voltage Positive Supply Voltage Negative Supply Voltage Total Line Current (IL + IT) Min. 0 – 70 0 + 4.5 – 5.5 Typ. – 48 + 72 120 Max. 70 – 24 + 75 130 + 5.5 – 4.5 85 Unit °C V V V V V mA FUNCTIONAL DESCRIPTION L3000S - High Voltage Circuit The L3000Slineinterfaceprovidesa batteryfeeding for telephonelines and ringing injection.The IC contains a state decoderthat underexternal controlcan force the following operational modes : stand-by, conversation and ringing. In addition Power down mode can be forced connecting the bias current resistor to VDD or leaving it open. Two pins, IL andIT, carryout the information concerning line statuswhich is detectedby sensing the line current into the output stage. The L3000S amplifies both the AC and DC signals entering at pin 6 (VIN) by a factor equal to 40. Separate grounds are provided : - Analog ground as a reference for analog signals - Battery ground as a reference for the output stages 6/29 The two groundshould be shortedtogetherat a low impedance point. L3030 - Control Unit The L3030 low voltage control unit controls L3000S line interface module, giving the proper information to set line feed characteristic, to inject ringing and TTX signal and synthetizes the line and balance impedances. An on chip digital interface allows a microprocessor to control all the operations. L3030 defines working states of line interface and also informs the card controller about line status. L3000S - Working States In order to carry out the different possible operations, the L3000S has several different working states.Each stateis definedby the voltagerespectively applied by pins 27 and 28 of L3030 to the pins 11 and 12 of L3000S. Three different voltage levels (– 3, 0, + 3) are available at each connection, so defining nine possible L3000S - L3030 Table 1. Pin 28 of L3030 / Pin 12 of L3000S +3 +3 Pin 27 of L3030 Pin 11 of L3000S 0 –3 Stand-by Not allowed. Not allowed. 0 Conversation in Normal Battery Direct Polarity Conversation in Boost Battery Direct Polarity Ringing with Direct Polarity (C2) –3 Conversation in Normal Battery Reverse Polar Conversation in Boost Battery Reverse Polar Not allowed. states as listed in Table. 1. Appropriate combinations of two pins define the three modes of the ST SLIC, that are : a) Stand-by (SBY) b) Conversation (CVS), Normal and Reverse polarity c) Ringing (RING) d) Boost Battery (BB), Normal and Reverse polarity A fifth status, Power down (PD), can be set disconnecting the bias resistor (RH) from pin 10 ofL3000S by means of an external transistor. The main difference between Stand-by and Power down is that in SBY the power consumption on the voltage battery VB– (– 48V) is reduced but the L3000S DC feeding and monitoring circuits are still active. In PD the power consumption on VB- is reduced to zero, and the L3000S is completely switched off. The SBYstatus shouldbe used when the telephone is in On hook and PD status onlyin emergencycondition when it is mandatory to cut any possible dissipation but no operation are requested. OPERATING MODES Stand-by (SBY) Mode In this mode, the bias currents of both L3000S and L3030are reducedas only someparts of the two circuits are completely active, control interface and current sensors among them. The current supplied to the line is limited at 7mA, and the slope of the DC characteristic corresponds to : 2 R = x (RFS + 2RP) 3 The Line voltage in on Hook conditionisjust the batteryvoltage minus the voltage drop (approx. 15V)of the output stage amplifiers (see Fig. 1). Figure 1 : DC Characteristics in Stand-byMode. 7/29 L3000S - L3030 The AC characteristic is just the resistance of the two serial resistors RP. In Stand-bymode the batterypolarity is just in direct condition,that is the TIP wire more positive than the RING one ; boost battery is not achievable. There are two possible line conditions where the SLIC is expected to be in stand-by mode : 1) ON-HOOK (Iline < 5mA). Normal on-hook condition. 2) OFF-HOOK (Iline > 7mA). Handset is unhooked, the SLIC is waiting for command to activate conversation. When the SLIC is in stand-by mode, the power dissipation of L3000S does not exceed 120mW (from -48V) eventually increased of a certain amount if some current is flowing into the line. The power dissipation of L3030 in the same condition, is typically 120mW. The Stand-byMode is set when the byte sent to the L3030 Serial Digital Interface has the first two bits (BIT0R and BIT1R) equal to ”0”. Settingto 0 all the 8 bits of the command sent to the digital interface of L3030, the bias currents of both L3000S and L3030 are reduced and only some parts of the two circuits are active similarly to the stand-by mode ; in this situation, named powerdown denial, the line sensors are disabled (ON/OFF-HOOK line conditions cannot be recognized) and the current supplied to the line is limited at 0.25mA. Conversation (CVS) or Active Mode In conversationmodeit is possibleto selectbetween two different DC Characteristics by the BIT5R of the Serial Interface. 1) Normal Battery (NB) 2) Boost Battery (BB) It is also possibleto select(BIT4R)the polarity of the DC line voltage and (BIT6R-BIT7R) one of the four values of limiting current (25mA or 30mA or 45mA or 70mA). Battery reverse can take place either before or during conversation. As far as the DC characteristic in Normal Battery is concerned, three different feeding conditions are present : a) current limiting region ; the DC impedance of the SLIC is very high (> 20 Kohm) and therefore the systemworkslike a currentgenerator,the current value being set through the digital interface (25/30/45/70mA). b) standard feeding system region ; the characteristic is equal to a – 48V (– 60V) battery (note 1), in series with two resistors, whose value is set by external components (see external component list of L3030). c) low impedance region ; the battery value is reducedto 33V (45V) and the serial resistance is reduced to the value specified in stand by mode, 2 that is : x (RFS + 2RP) 3 Switching betweenthe three region is automaticwithout discontinuity, and depends on the loop resistance.Fig. 2 shows the DC characteristic in normal battery condition. Whenthe boostbatteryconditionisactivatedthe low impedance region can never be reached by the sy- Figure 2 : DC Characteristic (n.b.) ILIM = 25/30/45/70mA. Note : 1. This value of voltage battery, named apparent battery, is fixed internally by the control unit and is independent of the actual battery value. So, the voltage drop in the low impedance region is 15V. It is also possible to increase up to 25V this value setting BIT3R to 1. 8/29 L3000S - L3030 stem ; in this case the internal dropout voltage is equal to 30V. Fig. 3 shows the DC characteristic in boost battery condition. In conversationmode, on request of controlprocessor, whatever condition is set (normal or boost battery, direct or reverse polarity), you can inject the 12kHz(or16kHz)signal (permanentlyapplied at the pin 33 with 950mVrms typ. amplitude), as metering pulses. A patented automatic control system adjust the level of the metering signal, across the line, to 2Vrms setting BIT3 = 0, or to 5Vrms setting BIT3 = 1 ; this, regardless of the line impedance. Moreover the metering signal is ramped at the beginningand at the end of each pulse to prevent undesirableclicking noise ; the slope is determined by the value of CINT (see the external component list of L3030). The SLIC also provides, in the transmit direction (fromline to 4-wire side), an amplifier to insert anexternal notch filter (series resonator) for suppressing the 12/16kHz residual signal. Fig. 4 shows a suggestednotch Filter configuration. The metering pulses can be injected with a DC line current equal to zero (ON-HOOK Operation). If teletax is not used the notch filter can be replaced by a 1KΩ resistor. Inconversationmode theAC impedanceatthe lineterminals,ZML,issynthetizedbytheexternalcomponents ZAC and RP, according to the following formula : ZML = ZAC + (RP1 + RP2) Dependingon the characteristic of the ZAC network, ZML canbe eithera pure resistance or a complex impedance,soallowing ST SLICtomeetdifferentstandards as far as the return loss is concerned. The capacitorCCOMP guaranteesstability to the system. The two-to-four wire conversion is achieved by means of a Wheatstone bridge configuration,the sides Figure 4 : ExternalTeletaxe Filter. of which being : 1) the line impedance (Zline), 2) the SLIC impedance at line terminals (ZML), 3) thenetworkZA connectedbetweenpin 36and 41 of L3030 (see externalcomponentlist of L3030), 4) the network ZB between pin 36 and ground that shall copy the line impedance. For a perfectbalancing,the following equationshall be verified : ZA ZML = ZB Zline It is important to underline that ZA and ZB are not obliged to be equal to ZML and to Zline, but they both may be multiplied by a factor (up to ten) so allowing use of smaller capacitors. Inconversation,the L3000Sdissipatesabout250mW foritsownoperation; thedissipationdependingonthe current supplied to the line shall be added. The fig 5 and fig 6 show the DC characteristicfor two different Feeding resistance. 2 x 200 Ohm and 2 x 400 respectively. Figure 3 : DC Characteristic (b.b.) ILIM = 25/30/45/70mA. f= 1 2π √  LxC R2 x R4 xR5 xC2 R3 L= 9/29 L3000S - L3030 Figure 5 : DC Characteristic for 2 x 200 ohm Feeding System. Figure 6 : DC Characteristic for 2 x 400 ohm Feeding System. Figure 7 : Line Current Versus Loop Resistance, RFS = 200Ω, RP = 30Ω, VB– = –48V. 10/29 L3000S - L3030 Ringing Mode When ringingis selected(BIT2R= 1,BIT0R = 0), the control unit L3030 presets the L3000S to operate between – 48V (– 60V) and + 72V (+ 60V) battery. Then,settingBIT1 =1, a low levelsignal(0.285Vrms with frequency range 16-66Hz) applied to pin 41, is amplified and injected in balancedmode to the line throughL3000S with a superimposedDC voltageof 24V. The impedance to the line is given by the two external resistors and the 24V DC polarity can only be direct. The first and the lastringing cycles aresynchronized by L3030 so that ringing always starts and stops at zero crossing. Ring trip detection is performed autonomouslyby the SLIC,without anyparticularcommand, using a patented system ; when handset is lifted, SLIC suspends the ringing signal just remaining inthe ringingmode. Inthiscondition,the control unit L3030 checks that the loop is closed for a time equal to two periods of the ringing signal ; if the closure is confirmed, a flag (BIT0T = 1) is set and the SLIC waits the new command from the control processor. Whereas the loop closure is not confirmed, the ringing signalis newly appliedto theline, without setting BIT0T. DIGITAL INTERFACE Functional Description The L3030 states and functions are controlled by central processor through five wires defining a digital interface.It is possibleto select the interfaceworking mode between SERIAL or PARALLEL (pin 33 tied to a voltage between 4 and 5V). 1) Serial Mode The five wires of the digital interface have the following functions : - clock (DCLK), entering at pin 21 - data in/data out (DIO), exchanged at pin 20 - input/outputselect (EIA), entering at pin 18 - chip select (NCS), entering at pin 19 - change NCS from in to out (CI), entering at pin 26 (note 1) The maximum clock frequency is 600Khz. When EIAsignal is low data are transferredfrom the card controller into I/O registers of the L3030 selected by NCS signal tied at low level ; then data are latched for execution.In this phasea complete 8 bit word is loaded into internalregister and consequently NCS signal must remain low for the corresponding 8 clock pulses (DCLK). The EIA signal must remain at low level at least for the time in whichNCS signal remain low. The device load data in input register during the positive edge of clock signal (DCLK) and store the contents of the register on the positive edge of NCS signal. When EIA signal is high data are transferred from the L3030 selected by NCS tied to low level to the card controller. The L3030 status is described by five bits contained in the output register ; the NCS signalcan remain low for fiveor lessclockpulsesdepending if the card controller want to read the complete L3030 status or only a part of it. Fig. 8, 9 showthe completewrite and read operation timing. Table 1 shows the meaning of each bit of an I/O data. 11/29 L3000S - L3030 Table 1 : Serial Mode. Meaning Data in (note 2) BIT0R = Impedance (note 3) 0 - Stand-by/ringing 1 - Conversation BIT1R = TTX & Ring Timing (note 4) 0 - Timing off 1 - Timing on BIT2R = Ring (note 5) 0 - TTX Signal Injection 1 - Ring Signal Injection BIT3R = TTX Level 0 - Low Amplitude (2VRMS) 1 - High Amplitude (5V RMS) BIT4R = Battery Polarity 0 - Normal Polarity 1 - Reverse Polarity BIT5R = Extra Feeding 0 - Normal Battery 1 - Boosted Battery BIT6R BIT7R Current Limiting 0 25mA 0 0 30mA 1 1 45mA 1 1 70mA 0 Value Data Out (note 6) BIT0T = Line Supervision 0 - On Hook 1 - Off Hook BIT1T = Ground Key 1 - Long. Line Current < 17mA 0 - Long. Line Current > 17mA BIT2T = Internal Line Current Limiter (note7) 0 - Off 1 - On BIT3T = Line Voltage 0 - Normal 1 - Minus of Half Battery BIT4T = Thermal Overload (note 8) 1 - Off 0 - On No tes : 1. When C I si gnal i s tied to low level, NC S signal is the chip select i nput ; with CI signal at high level, the NCS signal becomes an output that carry out the logi cal sum of the foll owing bi ts : B IT0T , BIT1T. 2. The description of the commands is ref erred to the system L3030 + LINE IN TERF ACE module. 3. To set SBY mode wi th I lim = 7mA : BIT0R = 0 and at least one of the tw o l ast bits (B IT 6R ; BIT 7R) must be set to 1. 4. TTX and R ING signals are i njected i nto t he line interface module wi th BIT1R t o ”1”. 5. To set RIN G mode at l east one of the three last bi ts (BIT 5R, BIT 6R, BIT 7R) must be set t o 1, i n addi ti on B IT0R must be set to 0. 6. The description of the commands is ref erred to the system L3030 + LINE IN TERF ACE module. 7. The bit BIT 2T is set to 1 w hen the SLI C is oper ating in Conver sation Mode and into the l imiti ng curr ent region (short loop) . 8. The bit BI T4T is set to 1 when the junction temper ature of L3000S i s about 140° C. 12/29 L3000S - L3030 Figure 8 : Writing Operation Timing (serial mode). Figure 9 : Reading Operation Timing (serial mode). 13/29 L3000S - L3030 2) Parallel Mode This operating mode is enabled connecting pin 33 to a voltagein the rangefrom 4V to 5V. Thefive wire have the following functions : - power down/feeding (EIA), entering at pin 18 - timing (CI), entering at pin 26 - ring (DCLK), entering at pin 21 - on-hook/off-hook(NCS), outgoing at pin 19 - ground-key (DIO), outgoing at pin 20 Table 2 : Parallel Mode. Pin 18 Rif. EIA Meaning (note 1) PD/feeding Eq. Bit of Ser. Interf. BIT0R Value 0 : High Impedance 1 : Low Impedance 26 CI Timing BIT1R 0 : Ring Timing Off 1 : Ring Timing On 21 DCKL Ring BIT2R 0 : No Ring 1 : Ring Injection BIT3R BIT4R BIT5R BIT6R BIT7R 19 NCS On-hook/off-hook BIT0T 0 : Low Amplitude 0 : Normal Polarity 0 : Normal Battery 0: 1: Line Curr. = 30mA In this operating mode the signals at the inputs are immediately executed,without any external clock timing ; all the internalregisters are bypassed.The informations sent back on pins 19 and 20, display in real time the setting of internal circuits, that means line status. In the table 2 the correspondence between the interface wires in the parallel mode and equivalent bit in serial mode is pointed out ; where there isn’t this correspondence, the internal setting is shown. 0 : On-hook 1 : Off-hook 20 DIO Ground Key BIT1T 1 : Long. Curr. < 17mA 0 : Long. Curr. > 17mA BIT2T BIT3T BIT4T Note : 1. The description of the commands is referred to the system L3030 + LINE INTERFACE module. DIGITAL INTERFACE ELECTRICAL CHARACTERISTICS (VDD = + 5V, VSS = – 5V, T amb. = 25oC) (refer to PLCC44 package) Symbol Parameter Test Conditions Min. Typ. Max. Unit STATIC ELECTRICAL CHARACTERISTICS Vil Vih Iil Iih Vol Voh Ilk 14/29 Input Voltage at Logical ”0” Input Voltage at Logical ”1” Input Current at Logical ”0” Input Current at Logical ”1” Output Voltage at Logical ”0” Output Voltage at Logical ”1” Tristate Leak. Current Vil = 0V Vih = 5V Pins 19, 20 Iout = – 1mA Pins 19, 20 Iout = 1mA Pin 20 NCS = ”1” 2.4 10 Pins 18, 19, 20, 21, 26 0 2.0 0.8 5 200 10 0.4 V V µA µA V V µA L3000S - L3030 DIGITAL INTERFACE ELECTRICAL CHARACTERISTICS (continued) Symbol Parameter Test Conditions Min. Typ. Max. Unit DYNAMIC ELECTRICAL CHARACTERISTICS fclk Tr, Tf Twh, Twl Tis Tec Tsc Tsd Thd Tcs Tca Tac Tzd Tce Tdz Tdd Tsi Clock Frequency Clock Rise and Fall Time Clock Impulse Width CI to NCS Set up Time ”0” EIA to DCKL Set up Time DCKL to NCS Delay (+ edge) Data in Set up Time Data in Hold Time NCS to DCKL Hold Time ”0” EIA to DCKL Hold Time ”1” EIA to DCKL Set up Time Data out to ”0” NCS Delay ”1” EIA to DCKL Hold Time Data out to ”1” NCS Delay Data out to DCKL Delay ”0” CI to NCS Hold Time 300 750 300 300 300 0 800 800 900 400 0 900 500 1500 600 1 600 50 kHz ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns OPERATION DESCRIPTION To set SLIC in operation the following parameters have to be defined : - the DC feedingresistance RFS, definedas the resistance of each side of the traditional feeding system (most common values are 200, 400 or 500 ohm). - the AC impedanceat line terminals, ZML, to which the return loss measurement references.It can be real (typically 600 ohm) or complex. - the equivalent AC impedance of the line Zline, when evaluating the trans hybrid loss (2/4 wire conversion). It is usually a complex impedance. - the ringing signal frequency Fr (ST SLIC allows frequency ranging from 16 to 66Hz). - the metering pulse frequency Ft (two values are possible : 12kHz or 16kHz). - the value of the two resistors RP1/RP2 in series with the line terminals ; main purpose of the a.m. resistors is to allow primary protection to fire. ST suggest the minimum value of 50 ohm for each side. On this assumptions,the following componentlistis defined. 15/29 L3000S - L3030 EXTERNAL COMPONENT LIST FOR THE LINE INTERFACE Pin L3000S 10 1,15 7 3 8 8 L3030 (PLCC44) 4-3 5-3 7-8 15-17 7-15 14-15 8-9 8-9 9-14 2-3 36-3 36-41 32-3 15-16 35 34 Notes : 1. In case l ine cards wi th less than 7 subscri bers are i mplemented CVB – capaci tor should be equal to 680nF/N where N i s the number of subscri ber per car d. 2. This shot tky diode or equivalent is necessar y to avoid to damage to t he devi ce dur ing hot insertion or in all t hose cases when a proper power up sequence cannot be guaranteed. In case the shottky di ode i s not impl emented the power sequence should guarantee that V B+ is always the last supply appl ied at pow er on and t he fi rst removed at power off. In case an ot her shot tky diode type i s adopted it must fulf il l the foll owing character isti cs: VF < 450mV @ I F = n ⋅ 15mA, T amb = 25° C VF < 350mV @ I F = n ⋅ 15mA, T amb = 50° C (T jL 30 0 0 = 90 ° C) VF < 245mV @ I F = n ⋅ 15mA, T amb = 85° C (T jL 30 0 0 = 120 ° C ) Where n i s the number of line shari ng the same diode. 3. If the internal capacit y mul tipli er stage i s not used, pin 7 must be connect ed w ith pin 14 without mounting R R and CAC 2. In thi s case C AC1 = 1/(6.28 x 30 x RD C). 4. The str ucture of thi s network shall copy the line impedance, in case mul tiplied by a factor K = 1....10 5. K as fixed at note 4. 6. CINT can have the f ollowi ng values : Component Ref. RREF RP CDVB CVB+ CVB– D1 CVSS CVDD RR RDC CAC1 (3) CAC2 ZAC CCOMP RPC RREF ZB ZL CINT Ccon TTx FILT. R GTTX Value 24.9kΩ ± 1% 30 to 100Ω 47µF – 20V 0.1µF – 100V (1) 0.1µF – 100V (2) BAT 49X 0.1µF – 15V 0.1µF – 15V 16KΩ ( range: 10 to 50KΩ) 2 x (RFS – RP1) 1 6.28 x 250 x (ZAC + RDC) CAC1 ZML – (RP1 + RP2) 1/(6.28 x 150000 x (RPC)) RP1 + RP2 24.9KΩ 1% K x Zline (note 4) K x RPC in Series with K x ZAC // (CCOMP/K) (note 6) 0.15µF (note 7) ZTTX = 1kΩ 1% in speech band ZTTX ≈ 0Ω at TTX freq. (note 9) 10kΩ 1% Involved Parameter or Function Bias Resistance Line Series Resistor Battery Voltage Rejection Positive Battery Filter Negative Battery Filter Protective Shottky Diode Negative Supply Voltage Filter Positive Supply Voltage Filter Capacitor Multiplier Gain (8) DC Feeding Resistor (RDC > 270Ω) AC Path decoupling 2 Wire AC impedance AC loop compensation Rp insertion loss compensation Bias Resistance Line Impedance Balancing Network SLIC Impedance Balancing Network (note 5) Ring trip detection time constant Interface Time Constant Teletax filter. Teletax filter. Fr. (Hz) CINT (nF) 16/18 560 18/21 470 21/26 390 26/31 330 31/38 270 38/46 220 46/57 180 57/66 150 7. Ccon is necessary to w ork ”w it hout on/off hook det ection- error s” during T TX-pul ses. 8. RR is used by a capaci tor multiplier ci rcuit to synthetize an hi gher AC /DC split ting capacit or st arti ng from CA C1 and CAC 2. Supposi ng CAC1 = CAC2 = CA C the synt heti zed capacitor value will be equal 9. If Teletax is not used t he T TX F ILT. can be r eplaced by a 1k Ω resi stor. R R + ZML ZML ⋅ CA C . 16/29 L3000S - L3030 Figure 10 : Typical Application Schematic Diagram. L3000S Figure 11 : Typical Application Schematic Diagram without Capacitor Multiplier. L3000S 17/29 L3000S - L3030 ELECTRICAL CHARACTERISTICS (refer to the test circuits of the Figure 12, VDD = + 5V, VSS = 5V, VB+ = + 72V, VB– = – 48V, Tamb = + 25oC, TTX FILT = 1kΩ) Symbol STAND-BY Vls Ilcc Iot Vls Output Voltage at L3000S Terminals Short Circuit Current On/off-hook Detection Threshold Symmetry to Ground Iline = 0mA Iline = 0mA Iline = 5mA DATA IN (note 1) 000X00X1 30.0 28.2 5 5 40.0 38.5 8.5 8.5 .75 V V mA mA V Parameter Test Conditions Min. Typ. Max. Unit STAND BY DENIAL Ilcc Short Circuit Current DATA IN 000X00X0 2 mA DC OPERATION - NORMAL BATTERY (V TTX = 2VRMS, low level) Vlo Output Voltage at L3000S Terminals Ilim = 70mA Data in 1000X010 Current Programmed Through the Digital Inter. On-hook Detection Threshold Off-hook Detection Threshold Longitudinal Line Current with GK Detect 12 10 17 26 Iline = 0mA Iline = 20mA Iline = 50mA 31.0 24.0 2.5 – 10% Ilim 35.0 28.8 17.5 + 15% 8 V V V mA mA mA mA Ilim Io If Ilgk DC OPERATION - BOOST BATTERY Vlo Output Voltage at L3000S Terminals Iline = 0mA Iline = 20mA 86 68.6 95.6 81 V V AC OPERATION Ztx Zrx THD R1 Thl Gs Gsf Gsl Sending Output Impedance 4 Wire Side Receiving Input Impedance 4 Wire Side Signal Distorsion at 2W and 4W Terminals 2W Return Loss Trans Hybrid Loss Sending Gain Sending Gain Flatness versus Frequency Sending Gain Linearity f = 300 to 3400Hz f = 300 to 3400Hz Vso = 0dBm f = 1020Hz Norm. Polarity f = 300 to 3400Hz Respect to 1020Hz fr = 1020Hz, Vsoref = –10dBm Vso = + 4 /– 40dBm Vri = 0dBm f = 1020Hz Norm. Polarity f = 300 to 3400Hz Respect to 1020 22 24 – 0.25 – 0.1 – 0.1 + 0.25 + 0.1 + 0.1 dB dB 100 0.5 10 Ω kΩ % dB dB dB Gr Grf Receiving Gain Receiving Gain Flatness dB – 0.25 – 0.1 0 + 0.25 + 0.1 dB No tes : 1. The data into t he digital interface of L3030 are send i n serial mode. T he f ormat of dat a is the foll ow ing : a) DAT A IN : the bit at left side is BIT 0 of the wri ting w ord, whil e the bit at the ri ght si de i s B IT 7. b) DAT A OUT : the bit at the left side is BI T0 of the reading wor d, whil e the bit at the ri ght i s BI T4. When appear a symbol X, the val ue of the bit don’ t care. 18/29 L3000S - L3030 ELECTRICAL CHARACTERISTICS (continued) Symbol Parameter Test Conditions Min. Typ. Max. Unit AC OPERATION (continued) Grl Np4W Np2W SVRR SVRR SVRR Ltc Tlc Td Tdd Vttx THD Zitt Receiving Gain Linearity Psophometric Noise at 4W-Tx Terminals Psophometric Noise at Line Terminals Supply Voltage Rejection Ratio Relative to VB– Relative to VDD Relative to VSS Longitudinal to Transversal Conversion Transversal to Longitudinal Conversion Propagation Time Propag. Time Distortion Line Voltage of Teletaxe Signal Teletaxe Signal Harmonic Teletaxe Amplif. Input Impedance VTTXin = 950mVrms Note 2 Note 3 1.7 4.5 f = 3400Hz f = 3400Hz Vs = 100mVrms f = 300 to 3400Hz Iline = 30mA, ZML = 600Ω Both Direction 49 (1) 48 – 30 – 32 60 51 40 25 2.3 5.5 5 100 fr = 1020Hz, Vriref = – 10dBm Vri = + 4 /– 40dBm – 0.1 – 75 – 75 + 0.1 – 70 – 70 – 30 – 26 – 30 dB dBmp dBmp dB dB dB dB dB µs µs V V % kΩ Dist. ttx Filt = 0Ω @ 16kHz Note 4 Pin 33 of L3030 AC OPERATION BOOST BATTERY Gs Gr Np4W Np2W SVRR SVRR Sending Gain Receiving Gain Psophometric Noise at 4W-Tx Terminals Psophometric Noise at line Terminals Relative to Vdd Relative to Vss Rloop > 100kΩ Rloop = 1kΩ Rloop = 1kΩ/1µF f = 3400Hz Vs = 100mVrms Vso = 0dBm f = 1020Hz Norm. Polarity Vri = 0dBm f = 1020Hz Norm. Polarity – 0.66 – 0.16 + 0.34 – 0.27 + 0.08 + 0.43 – 73 – 73 – 68 – 68 – 23 – 23 dB dB dBmp dB dB dB RINGING PHASE Vlr Vacr If Ilim Vrs THDr Superimposed DC Voltage Ringing Signal at Line Termin. DC Off-hook Det. Threshold Current Limit. Ringing Simmetry Ringing Signal Distortion VAC = 0.285VRMS fRING = 30Hz 19 17 56 1.5 85 3.5 130 2 5 23 21 27 25 V V Vrms mA mA Vrms % No tes : 1. 2. 3. 4. Up to 52dB using selected L3000S. The configurat ion of data sent t o devi ce change, every 100mS, from - 1100X010 - to - 1000X010 The configurat ion of data sent t o devi ce change, every 100mS, from - 1101X010 - to - 1001X010 Error generated by t tx fil t ≠ 0 ohm, on t he output tel etax amplitude is err% = 100 x ( 1 + A) x B/ C where A = 10 Kohm/R GTT X[ Kohm], B = TT XF ILT[Kohm], C = ( TTXF ILT[Kohm] + 1 Kohm), for example 10 ohm means err% = 2 %. 19/29 L3000S - L3030 ELECTRICAL CHARACTERISTICS (continued) Symbol RINGING PHASE Zir Vrr Trt Toh Trs Ringing Amplif. Input Impedance Residual of Ringing Signal at TX Output Ring Trip Detection Time Off-hook Status Delay after the Ringing Stop Cut off of Ringing fring = 16Hz T = 1/fring Ring Trip not Confirmed (1T) Pin 41 of L3030 100 600 125 (2T) 125 (2T) 188 (3T) kΩ mV ms ms ms Parameter Test Conditions Min. Typ. Max. Unit SUPPLY CURRENT IDD Positive Supply Current CS = 1 Stand-by Conversation (NB/BB) Ringing Stand-by Conversation (NB/BB) Ringing Stand-by Conversation NB Conversation BB Ringing Stand by Conversation NB Conversation BB Ringing 16.0 26.0 16.5 9 19 9 2 5 6.6 14 10 10 8 12 20.0 31.0 21.0 12 23 12 2.5 6.5 8.0 17 15 15 10 13.5 mA mA mA mA mA mA mA mA mA mA µA µA mA mA ISS Negative Supply Current CS = 1 IBAT– Negative Battery Supply Current Line Current = 0mA IBAT+ Positive Battery Supply Current Line Current = 0mA NB = Normal Batter y BB = Boosted Bat tery Figure 12 : Slic Test Circuit Schematic. L3000S 20/29 -5V BGND VB+ ZA RL TTXIN 32 2 4 CVDD VDD VDD 5 9 1 AGND RH REF VBIM VIN IL C2 C1 IT CCON 7 6 14 12 11 13 15 RING 20 Ω VB1 10 2 VSS VSS 8 36 41 33 VB40 3 REF 4 3 CVBTX AGND BGND VB+ CVSS CVB+ CINT CRTS ZB (*) CZS 5 35 CDVB TTXF TTX FILTER RGTTX CCOMP 9 34 14 13 31 C2 C1 IT 28 27 RDC EIA NCS DIO DCLK CI 17 18 19 20 21 26 16 IL VOUT 42 VBIM RGTTX ACF 8 7 VDD TIP RX ZB +5V 100nF 100nF 100nF VSS GND VCC 28 DX0 18 DX1 19 2 VFRO TSX0 20 L3000S L3000N D1 VB20 Ω 30Ω VB+ MNT TSX1 21 Fsx 22 TS5070 L3030 BCLK 16 VRING= 285mVrms CTL FSR ZAC RPC CM 15 RC RDC ZAC 8 26 IL0 DR0 10 25 IL1 3 1 4 L3121 2 22nF 22nF DR1 9 7 IL2 CS CAC1 14 6 IL3 BGND CCLK 13 24 IL4 23 IL5 CO 11 CI 12 15 MR 2 4 L3121 3 30Ω Figure 13: Typical application schematic with 2nd generation COMBO. MCLK 17 D94TL126 TO/FROM CARD CONTROLLER (*) The analog multiplexer can be avoided if the VRING = 285mVRMS is provided by the CODEC. L3000S - L3030 21/29 ZAC RPC CM 13 31 28 27 RDC EIA NCS DIO DCLK CI CCON 17 18 19 20 21 26 16 IT C1 C2 IL 15 14 VOUT IL C2 C1 IT VIN 42 VBIM 7 6 14 12 11 13 VBIM 34 10 BCLKR/ CDVB 22/29 BGND R3 C VB+ ZA CINT CRTS ZB (**) CZS 5 35 9 TTXF TTX FILTER RH REF RGTTX AGND 1 5 CCOMP 9 RGTTX ACF 8 7 VDD VDD RX VDD 41 CVDD 36 4 VSS VSS 8 32 2 VB33 40 3 REF 4 3 CVBTTXIN TX AGND RL BGND VB+ CVB+ CVSS ZB L3000S - L3030 -5V +5V 100nF 100nF V SS GNDA VCC VFXI- R4 DX GSX DR R1 (*) TSX VFRO R2 L3000S L3000N TIP D1 VB20Ω 30Ω VB+ MNT ETC5057 L3030 MCLKX VRING= 285mVrms ZAC MCLKR/ BCLK 3 1 4 L3121 2 22nF 2 22nF FSR CAC1 RC RDC CTL (FROM CARD CONTR.) BGND FSX 1 RING 20Ω 15 VB- 2 L3121 4 3 30Ω Figure 14: Typical application schematic with 1st generation COMBO. VFXI+ D94TL127A TO/FROM CARD CONTROLLER (*) Resistors R1 to R4 program IX/RX gains ZA, ZB shold be >>than R2. (**) The analog multiplexer can be avoided if the VRING = 285mVRMS is provided by the CODEC. L3000S - L3030 APPENDIX SLIC TEST CIRCUITS Referring to the test circuit reported at the end of each SLIC data sheet here below you can find the proper configuration for each measurement. In particular : A-B : Line terminals C : TX sending output on 4W side D : RX receiving input on 4W side E : TTX teletaxe signal input RGIN : low level ringing signal input. TEST CIRCUITS Figure 1 : Symmetry to Ground. Figure 2 : 2W Return Loss. RL = 20 log 1 |ZL − Z| |2 VS | = 20 log |E| |ZL + Z| WC