L3916AD

L3916A L3926A - L3936A SPEECH AND 14 MEMORY DIALER WITH LED DRIVER ADVANCE DATA SPEECH CIRCUIT 2 TO 4 WIRES CONVERSION PRESENT THE PROPER DC PATH FOR THE LINE CURRENT AND THE FLEXIBILITY TO ADJUST IT AND ALLOW PARALLEL PHONE OPERATION PROVIDES SUPPLY WITH LIMITED CURRENT FOR EXTERNAL CIRCUITRY SYMMETRICAL HIGH IMPEDANCE MICROPHONE INPUTS SUITABLE FOR DYNAMIC ELECTRET OR PIEZOELECTRIC TRANSDUCER ASYMMETRICAL EARPHONE OUTPUT SUITABLE FOR DYNAMIC TRANSDUCER LINE LOSS COMPENSATION INTERNAL MUTING TO DISABLE SPEECH DURING DIALING LIGHTED DIAL LED CONSUMING 25% OF LINE CURRENT DIALER CIRCUIT 32 DIGITS FOR LAST NUMBER REDIAL BUFFER 18 DIGITS FOR 13 MEMORY REDIAL ALLOW MIXED MODE DIALING IN EITHER TONE OR PULSE MODE PACIFIER TONE PROVIDES AUDIBLE INDICATION OF VALID KEY PRESSED IN A BUZZER OR/AND IN THE EARPHONE TIMED PABX PAUSE FLASH INITIATES TIMED BREAK: MASK OPTIONS WITH 585ms,300ms,100ms. CONTINUOUS TONE FOR EACH DIGIT UNTIL KEY RELEASE USES INEXPENSIVE 3.579545MHz CERAMIC RESONATOR POWERED FROM TELEPHONE LINE, LOW OPERATING VOLTAGE FOR LONG LOOP APPLICATION DIP28 SO28 ORDERING NUMBERS: L3916AN L3916AD L3926AN L3926AD L3936AN L3936AD PIN CONNECTION (Top view) KEYPAD CONFIGURATION DESCRIPTION The device consists of the speech and the dialer. It provides the DC line interface circuit that terminates the telephone line, analog amplifier for speech transmission and necessary signals for either DTMF or loop disconnect (pulse) dialing. January 1995 Note: PAUSE/LND: PAUSE and LND functions are sharing the same key with different sequence. Hereafter, PAUSE and LND keys arereferring to the same key. 1/15 This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice. L3916A - L3926A - L3936A BLOCK DIAGRAM DESCRIPTION (continued) When mated with a tone ringer, a complete telephone can be produced with just two ICs. The DC line interface circuit develops its own line voltage across the device and it is adjustable by external resistor to suit different country’s specification. The speech network provides the two to four wires interface, electronic switching between dialing and speech and automatic gain control on transmit and receive. The dialing network buffers up to 32 digits into the LND memory that can be later redialed with a single key input. Additionally, another 13 memories (including 3 emergency memories) of 18 digits memory is available. Users can store all 13 signalling keys and access several unique functions with single key entries. These functions include: Pause/Last Number Dialed (LND), Softswitch, Flash. 2/15 The FLASH key simulates a timed hook flash to transfer calls or to activate other special features provided by the PABX or central office. The PAUSE key stores a timed pause in the number sequence. Redial is then delayed until an outside line can be accessed or some other activity occurs before normal signaling resumes. A LND key input automatically redials the last number dialed. FUNCTION PIN DESCRIPTION C1, C2, C3, C4, R5, R4, R3, R2, R1 Keyboards inputs. Pins 1, 2, 3, 4, 24, 25, 26, 27, 28. The one chip phone interfaces with either the standard 2-of-9 with negative common or the single-contact (Form A) keyboard. L3916A - L3926A - L3936A FUNCTION PIN DESCRIPTION (continued) A valid keypad entry is either a single Row connected to a single Column or GND simultaneously presented to both a single Row and a single Colunm. In its quiescent or standby state, during normal off-hook operation, either the Rows or the Columns are at logic level 1 (VDD). Pulling one input low enables the on chip oscillator. Keyboard scanning then begins. Scanning consists of Rows and Columns alternately switching high through on chip pullups. After both a Row and Column key have been detected, the debounce counter is enabled and any noise (bouncing contacts, etc) is ignored for a debounce period (TKD) of 32ms. At this time, the keyboard is sampled and if both the Row and Column information are valid, the information is buffered into the LND location. After scanning starts, the row and column inputs will assume opposite states. In the tone mode, if two or more keys in the same row or if two or more keys in the same column are depressed a single tone will be output. The tone will corresponds to the row or column for which the two keys were pushed. This feature is for testing purposes, and single tone will not be redialed. Also in the tone mode, the output tone is continuous in the manual dialing as long as the key is pushed. The output tone duration follows the Table 1. When redialing in the tone mode, each DTMF output has 100ms duration, and the tone separation (inter signal delay) is 100ms. Table 1: Output Tone Duration Key-Push Time, T T = 100ms + Tkd Tone Output No output, ignored by one chip phone. 100ms Duration Output Duration = T - Tkd pulse output pin is in high impedance and once offhooked,it will be pulled high by external resistor. MODE/PACIFIER TONE Input (MODE). Pin 7. MODE determines the dialer’s default operating mode. When the device is powered up or the hookswitch input is switched from on-hook (VDD) to off-hook (GND), the default determines the signalling mode. A VDD connection defaults to tone mode operation and a GND connection defaults to pulse mode operation. When dialing in the pulse mode, a softswitch feature will allow a change to the tone mode whenever the * key is depressed. Subsequent * key inputs will cause the DTMF code for an * to be dialed.. The softswitch will only switch from pulse to tone. After returning to on-hook and back to offhook, the phone will be in pulse mode. Redial by the LND key or the MEM key will repeat the softswitch. Output (PACIFIER TONE). Pin 7. In pulse mode, all valid key entries activate the pacifier tone. In tone mode, any non DTMF entry (FLASH, PROG, PAUSE, LND, MEM, E1, E2 and E3), activates the pacifier tone. The pacifier tone provides audible feedback, confirming that key has been properly entered and accepted. It is a 500Hz square wave activated upon acceptance of valid key input after the 32ms debounce time. The square wave terminates after a maximum of 75ms or when the valid key is no longer present. The pacifier tone signal is simultaneously sent to earphone and the buzzer. The buzzer can be removed without affecting this function. HKS Input. Pin 8. This is the hookswitch input to the one chip phone. This is a high impedance input and must be switched high for on-hook operation or low for off-hook operation. A transition on this input causes the on chip logic to initialize, terminating any operation in progress at the time. The signaling mode defaults to the mode selected at pin 7. Figures 1 and 2 illustrate the timing for this pin. GND Pin 9 is the negative line terminal of the device. This is the voltage reference for all specifications. RXOUT, GRX, RXIN RXOUT (pin 10), GRX (pin 11) and RXIN (pin 12). The receive amplifier has one input RXIN and a non inverting output RXOUT. Amplification from RXIN to RXOUT is typically 31dB and it can be adjusted between 11dB and 41dB to suit the sensitivity of the earphone used. The amplification is proportional to the external resistor connected between GRX and RXOUT. 3/15 OSC Output. Pin 5. Only one pin is needed to connect the ceramic resonator to the oscillator circuit. The other end of the resonator is connected to GND (pin 8). The nominal resonator frequency is 3.579545MHz and any deviation from this standard is directly reflected in the Tone output frequencies. The ceramic resonator provides the time reference for all circuit functions. A ceramic resonator with tolerance of ±0.25% is recommended PULSE Output. Pin 6. This is an output consisting of an open drain N-Channel device. During on-hook, L3916A - L3926A - L3936A FUNCTION PIN DESCRIPTION (continued) IREF Pin 13. An external resistor of 3.6kOhm connected between IREF and GND will set the internal current level. Any change of this resistor value will influence the microphone gain, DTMF gain, earphone gain and sidetone. VCC Pin 14, VCC is the positive supply of the speech network. It is stabilized by a decoupling capacitor between VCC and GND. The VCC supply voltage may also be used to supply external peripheral circuits. is 40dB. Final ouput level on LN can be adjusted via the external resistor connected between GDTMF and GND through a decoupling capacitor. A confidence tone is sent to the earphone during tone dialing. The attenuation of the confidence tone from LN to Vear is –32dB typically. VDD Pin 23. VDD is the positive supply for the dialing network and must meet the maximum and minimum voltage requirements. DEVICE OPERATION During on-hook all keypad inputs are high impedance internally and it requires very low current for memory retention. At anytime, Row and Column inputs assume opposite states at off-hook. The circuit verifies that a valid key has been entered by alternately scanning the Row and Column inputs. If the input is still valid following 32ms of debounce, the digit is stored into memory, and dialing begins after a pre-signal delay of approximately 40ms (measured from the initial key closure). Output tone duration is shown in Table 1. The device allows manual dialing of an indefinite number of digits, but if more than 32 digits are dialed, it will ”wrap around”. That is, the extra digits beyond 32 will be stored at the beginning of LND buffer, and the first 32 digits will no longer be available for redial. Table 2: DTMF Output Frequency Key Input ROW 1 ROW 2 ROW 3 ROW 4 COL 1 COL 2 COL 3 Stadard Frequency 697 770 852 941 1209 1336 1477 Actual % Deviation Frequency 699.1 766.2 847.4 948.0 1215.9 1331.7 1471.9 +0.31 –0.49 –0.54 +0.74 +0.57 –0.32 –0.35 LED Pin 15. Lighted dial indicator. The LED connected to this pin will light up when the telephone is offhook and consuming 25% of the line current. ILINE Pin 16. A recommended external resistor of 20ohm is connected between ILINE and GND. Changing this resistor value will have influence on microphone gain, DTMF gain, sidetone, maximum output swing on LN and on the DC characteristics (especially in the low voltage region). LN Pin 17. LN is the positive line terminal of the device. REG Pin 18. The internal voltage regulator has to be decoupled by a capacitor from REG to GND. The DC characteristics can be changed with an external resistor connected between LN and REG or between REG and ILINE . GTX, MIC–, MIC+ GTX (pin 19), MIC– (pin 20) and MIC+ (pin 21). The one chip phone has symmetrical microphone inputs. The amplification from microphone inputs to LN is 51.5dB and it can be adjusted between 43.5 and 51.5dB. The amplification is proportional to external resistor connected between GTX and REG. GDTMF Pin 22. When the DTMF input is enabled, the microphone inputs and the receive amplifier input will be muted and the dialing tone will be sent to the line. The voltage amplification from GDTMF to LN 4/15 NORMAL DIALING D1 D2 D3 ....etc Normal dialing is straighforward, all keyboard entries will be stored in the buffer and signaled in succession. PROGRAMMING AND REPERTORY DIALING To program, enter the following: PROG D1 D2 D3. . . Dn MEM (Location 0-9) or PROG D1 D2. . . .Dn E1-E3 During programming, dialing is inhibited. L3916A - L3926A - L3936A FUNCTION PIN DESCRIPTION (continued) To dial a number from repertory memory (HKS must be low), enter the following: MEM (Location 0-9) or E1-E3 To save the last number dialed, enter the following: PROG MEM (location 0-9) or E1-E3 HOOK FLASH D1 FLASH D2 ...etc Hook flash may be entered into the dialed sequence at any point by keying in the function key, FLASH. Flash consists of a timed break of 585ms, 300ms or 100ms depending on the Mask option. When a FLASH key is pressed, no further key inputs will be accepted until the hookflash function has been dialed. The key input following a FLASH will be stored as the initial digit of the new number, overwriting the number dialed before the FLASH, unless it is another FLASH. FLASH key pressed immediately after hookswitch or LND will not clear the LND buffer unless digits are entered following the FLASH key. Example: FLASH LND not cleared LND FLASH LND not cleared LND FLASH D1 D2 LND buffer will contain D1, D2 PAUSE/LAST NUMBER DIALED If the PAUSE/LND key is pressed right after off hook or FLASH key, it is considered as LND, if it is pressed after a digit, it will be considered as PAUSE. LAST NUMBERED DIALED OFF-HOOK PAUSE/LND or FLASH PAUSE/LND Last number dialing is accomplished by entering the PAUSE/LND key. PAUSE OFF-HOOK D1 PAUSE/LND D2 ...etc A pause may be entered into the dialed sequence at any point by keying in the special function key, PAUSE/LND. Pause inserts a 3.1 second delay into the dialing sequence. The total delay, including pre-digit and post-digit pauses is shown in Table 3. Table 3: Special Function Delays Each delay shown below represents the time required after the special function key is depressed until a new digit is dialed. The time is considered ”FIRST” key if all previous inputs have been completely dialed. The time is considered ”AUTO” if in redial, or if previous dialling is still in progress. Function SOFTSWITC H PAUSE First/Auto FIRST AUTO FIRST AUTO Delay (seconds) Pulse 0.2 1.0 2.6 3.4 3.0 3.1 Tone SOFTSWITCH FUNCTION USING TONE/PULSE MODE SWITCH When dialing in Pulse mode after off-hook, switching TONE/PULSE mode switch from Pulse to Tone will cause the device to change the signaling mode into tone signal and store the softswitch function in the LND memory for redial. To redial the softswitch function (mixed mode dialing) in the pulse mode after going on-hook and back to off-hook, you have to switch the TONE/PULSE mode switch back to pulse mode either before going on-hook or after off-hook or during on-hook. Subsequentmode change from Tone to Pulse will change the signaling mode to pulse dialing sequence but this mode change will not be stored in .the LND memory. When dialing in Tone mode after off-hook, a switching of TONE/PULSE mode Switch from Tone to Pulse will cause the device to change the signaling mode into pulse mode but this mode change will not be stored in the LND memory. When LND key is pressed in Tone mode after going off-hook, the device will output all tone signals. A pacifier tone of 75ms is provided after 32ms debounce time when switching from Pulse to Tone mode. Redial by the LND key will repeat the mixed dialing sequence in Pulse mode. 5/15 L3916A - L3926A - L3936A Figure 1: Tone Mode Timing Figure 2: Pulse Mode Timing 6/15 L3916A - L3926A - L3936A ABSOLUTE MAXIMUM RATINGS Symbol VLN ILN VDD VI Tamb Tstg Ptot Line Current Logic Voltage Maximum Voltage on Any Pin Operating Temperature Range Storage Temperature Total Power Dissipation Parameter Positive Line Voltage Continuous Value 12 140 7.0 GND(-0.3) VDD(+0.3) -25 to +75 -40 to 125 700 Unit V mA V V °C °C mW ELECTRICAL CHARACTERISTICS (IL = 10 to 120mA; VDD = 3V; f = 1KHz; Tamb = 25°C, unless otherwise specified) Symbol VLN Parameter Line Voltage Test Condition IL = 4mA IL = 15mA IL = 120mA RA = 68KΩ IL = 15mA RB = 39KΩ IL = 15mA TONE MODE PULSE MODE TONE MODE PULSE MODE IL = 15mA IL = 15mA IL = 120mA 1.50 1.00 VDD = 4.0V VO = 0.5V VO = 0.5V (Sink) VO = 2.5V (Source) 1.00 1 0.6 150 3.00 3 1.0 0.3xVDD 0.7xVDD Vmic = 2mVrms IL = 15mA RGTX = 68KΩ IL = 60mA; RGTX = 68KΩ IL = 15mA Vmic = 2mVrms RGTX = 43KΩ RGTX = 27KΩ IL = 15mA VLN = 1Vrms IL = 15mA; Vmic = 0V –72 65 250 Min. 3.15 Typ. 3.50 3.2 4.1 2.50 2.20 600 400 1.30 4 30 6.00 6.00 Max. 2.50 3.85 7.0 Unit V V V V V V V µA µA mA mA mA V µA µA mA mA mA V V Fig. 3 VDD IDD ICC ILED VMR IMR IS IPL IPO VIL VIH GTX Logic Voltage) Supply Current Into VDD Supply Current Into VCC Supply Current to LED Memory Retention Voltage Memory Retention Current Off-Hook Stand-by Current Pulse Output Sink Current Pacifier Tone Sink/Source Current HKS, Mode, Keyboard Inputs Low HKS, Mode, Keyboard Inputs High Transmit Gain 3 3 3 3 4 4 3 3 3 6 50.0 44.5 –8 51.5 46.5 53.0 48.5 0 dB dB dB dB dB 6 AGTX Transmit Gain Variation with R GTX –4 –8 2 DTX NTX ZMIC Transmit Distortion Transmit Noise Microphone Input Impedance % dBmp KΩ 6 6 7/15 L3916A - L3926A - L3936A ELECTRICAL CHARACTERISTICS (continued) Symbol GDTMF CDTMF VDTMF Parameter DTMF Gain Confidence Tone Level Vear/VLN DTMF Level on the line High Frequency Group Low Frequency Group Pre-emphasis DTMF Output Distortion DTMF Att. pin Impedance Receive Gain Vinp = 5mVrms, Re = 300Ω RGRX = 100KΩ IL = 15mA IL = 60mA IL =15mA, Re = 300Ω RGRX = 10KΩ RGRX = 300KΩ IL = 15mA; RGRX = 100KΩ Re = 150Ω, VC = 0.25Vrms Re = 300Ω, VC = 0.45Vrms Re = 450Ω, VC = 0.55Vrms IL = 15mA RL = 300Ω RGRX = 100KΩ Vinp = 0V IL = 15mA IL= 15mA; Rp = ∞ Rp = 430K 200 35 60 600 32 250 100 500 75 500 10 60 40 820 50 5 5 40 100 100 L3916A L3926A L3936A 585 300 100 RDTMF = 2.25KΩ, CDTMF = 22nF Test Condition IL = 15mA, RDTMF = 2.25KΩ Min. 38 –34 Typ. 40 –32 Max. 42 –30 Unit dB dB Fig. 7 7 –8 –10 1.0 –6 –8 2 5 32 –4 –6 3 8 dBm dBm dB % KΩ 7 7 7 8 PEI DIS ZDTMF GRX 29.5 24 –20 31.0 26 –20 +10 32.5 28 +10 dB dB dB dB dB % % % µV Ω mVrms mVrms ms Hz KΩ Ω ms Hz PPS ms ms ms ms ms 1/s ms ms ms ms ms ms 8 8 8 8 AGRX Receive Gain Variation D RX Reveive Distortion 8 2 2 2 N RX ZOUT VPT Receive Noise Receive Output Impedance Pacifier Tone Level on Earphone Keypad Keypad Keypad Keypad Debounce Time Scan Frequency Pullup Resistance Pulldown Resistance KEYBOARD INTERFACE TKD FKS KRU KRD TPT FPT PR TB TM IDP PDP TRIS TR TPSD TISD TDUR tHFP PULSE MODE Pacifier Tone Duration Pacifier Tone Frequency Pulse Rate Break Time Make Time Inter Digit Pause Predigit Pause Tone Output Rise Time Tone Signalling Rate Pre Signal Delay Inter Signal Delay Tone Output Duration Hook Flash Timing TONE MODE Notes: 1. All inputs unloaded. Quiescent mode (oscillator off). 2. Pulse output sink current for VOUT = 0.5V. 3. Pacifier tone sink current for VOUT = 0.5V. Source current for VOUT = 2.5V. 4. Memory retention voltage is the point where memory is guaranteed but circuit operation is not. Proper memory retention is guaranteed if either the minimum IMR is provided or the minimum VMR. The design does not have to provide both the minimum current and voltage simultaneously. 8/15 L3916A - L3926A - L3936A TEST CIRCUITS Figure 3. 470nF 2.25K GDTMF 22 4 3 IDD VDD 22nF RDTMF 470K VDD PULSE OSC 2 23 6 5 7 1 28 27 26 25 24 21 C4 C3 C2 C1 R1 R2 R3 R4 R5 MIC+ 2.2K 20 MIC1µF RGTX 68K 13 18 17 REG LN RB ILED ILINE 20Ω 390Ω 3.9K 390Ω 600Ω 130K 100µF IL RA 4.7 µF VLN 1µF 1 4 7 2 5 8 0 3 FLASH 6 PROG 9 P/LND # ICC = V1 VCC 3.58MHz PULSE TONE SW2 100K SW1 MODE /PT HKS GND RXOUT * E1 E2 E3 MEM 8 9 10 11 300Ω Re 10µF 100K RGRX GRX 19 GTX IREF 3.6K VCC 14 100µF RGIN 12 15 16 LED V1 ICC 620Ω 100nF D95TL162 Figure 4. 470nF 2.25K GDTMF C4 C3 C2 C1 R1 R2 R3 R4 R5 MIC+ 2.2K 20 MIC1 µF RGTX 13 18 17 REG LN 130K ILED ILINE 20Ω 390Ω 3.9K 4.7µF 1 µF 1 4 7 2 5 8 0 3 FLASH 6 PROG 9 P/LND # 22 4 3 VMR IMR 22nF 470K VDD PULSE OSC 2 23 6 5 7 1 28 27 26 25 24 21 3.58MHz PULSE TONE SW2 100K SW1 MODE /PT HKS GND RXOUT * E1 E2 E3 MEM 8 9 10 11 300Ω Re 10µF RGRX GRX 19 GTX IREF 3.6K VCC 14 100µF RGIN 12 15 16 LED 620Ω 100nF 390Ω D95TL163 9/15 L3916A - L3926A - L3936A TEST CIRCUITS(continued) Figure 5. 470nF 2.25K GDTMF 22 4 3 22nF 470K VDD PULSE OSC 2 23 6 5 7 1 28 27 26 25 24 21 C4 C3 C2 C1 R1 R2 R3 R4 R5 MIC+ 1.2V 20 MIC4.7 µF RGTX 13 18 17 REG LN 130K ILED ILINE 20Ω 390Ω 3.9K 390Ω 1 4 7 2 5 8 0 3 FLASH 6 PROG 9 P/LND # ZMIC = 1.2V Imic 3.58MHz PULSE TONE SW2 100K SW1 MODE /PT HKS GND RXOUT * E1 E2 E3 MEM Imic 8 9 10 11 300Ω Re 10µF RGRX GRX 19 GTX IREF 3.6K VCC 14 100µF RGIN 12 15 16 LED 620Ω 100nF D95TL164 Figure 6. 470nF 2.25K GDTMF C4 C3 C2 C1 R1 R2 R3 R4 R5 MIC+ 2.2K 20 MIC1µF RGTX 88K 13 18 17 REG LN 130K ILED ILINE 20Ω 390Ω 3.9K 100µF IL 4.7µF 1µF Vrms 1 4 7 2 5 8 0 3 FLASH 6 PROG 9 P/LND # VLN Vrms 22 4 3 GTX=20log IDD VDD 22nF 470K VDD PULSE OSC 2 23 6 5 7 1 28 27 26 25 24 21 NTX measured with Vrms=0 3.58MHz PULSE TONE SW2 100K SW1 MODE /PT HKS GND RXOUT * E1 E2 E3 MEM 8 9 10 11 100K Re 10µF RGRX GRX 19 GTX IREF 3.6K VCC VLN 14 100µF RGIN 12 15 16 LED 620Ω 100nF 390Ω 600Ω D95TL165 10/15 L3916A - L3926A - L3936A TEST CIRCUITS(continued) Figure 7. 470nF 2.25K GDTMF 22 4 3 IDD 4.0V 22nF RDTMF 470K VMF VDD PULSE OSC 23 6 5 7 2 1 28 27 26 25 24 21 C4 C3 C2 C1 R1 R2 R3 R4 R5 MIC+ 2.2K 20 MIC1µF RGTX 88K IREF Vear 3.6K VCC 100µF RGIN 14 12 15 16 13 18 17 REG LN 130K ILED ILINE 20Ω 390Ω 3.9K 390Ω 600Ω 100µF IL 4.7µF 1µF 1 4 7 2 5 8 0 3 FLASH 6 PROG 9 P/LND # CDTMF=20log GDTMF=20log VLN VMF Vear VLN 3.58MHz * PULSE TONE SW2 100K SW1 MODE /PT HKS GND RXOUT E1 E2 E3 MEM 8 9 10 11 300Ω Re 10µF 100K RGRX GRX 19 GTX VLN LED 620Ω 100nF D95TL166 Figure 8. 470nF 2.25K GDTMF C4 C3 C2 C1 R1 R2 R3 R4 R5 MIC+ 2.2K 20 10 11 19 MIC1 µF RGTX 18 17 REG LN 130K ILED ILINE 20Ω 390Ω 3.9K 100µF IL 4.7µF 1 µF 1 4 7 2 5 8 0 3 FLASH 6 PROG 9 P/LND # Vear Vinp 22 4 3 GRX=20log IDD 4.0V 22nF 470K 3.58MHz VDD PULSE OSC MODE /PT HKS 2 23 6 5 7 1 28 27 26 25 24 21 NRX with Vin=0 PULSE TONE SW2 100K SW1 RP * E1 E2 E3 MEM GND 8 9 RXOUT Re 10µF RGRX IREF Vear 3.6K VCC 100µF RGIN GRX GTX VLN 13 14 12 Vinp 15 16 LED 620Ω 100nF 390Ω D95TL167 11/15 L3916A - L3926A - L3936A Figure 9:Typical Application Circuit. 10 R1 TIP D14 TPA270 RING D2 D3 1N4004 x 4 D1 D4 SW1A 100K R3 10M R6 3.3K R4 HF393 Q3 HP5A94 Q1 10V D15 4.7nF C6 1.2K R7 150K R2 10K R5 1N4140 22 µF/16V C23 220 µF 16V C1 5.6V D10 VDD PULSE 4.7K RMF GDTMF 6 22 23 4 3 2 1 28 OSC 5 27 26 25 24 MODE 100K R8 /PT HKS C4 C3 C2 C1 R1 R2 R3 R4 R5 MIC+ 1 4 7 2 5 8 0 3 FLASH 6 PROG 9 P/LND # 1.2K R14 0.47µ F 25V C10 4.7nF CMF 3.579MHz x1 CERAMIC RESONATOR BUZZER SW2 * E1 E2 E3 MEM 7 21 SW1B HOOK 100K RGRX 10 µF/50V C3 3.6K R9 GND RXOUT GRX IREF 8 9 10 11 13 20 MIC- 19 18 17 16 15 LED D12 LED GTX REG LN ILINE 56K RGTX 4.7 µF/25V C7 1.2K R15 VCC 100µF C5 RGIN 14 12 390Ω R11 3.9K R12 120Ω RS1 130K R13 1K RAC D95TL168 100nF C4 20Ω R10 470Ω RS2 220nF CS 12/15 L3916A - L3926A - L3936A SO28 PACKAGE MECHANICAL DATA DIM. MIN. A a1 b b1 C c1 D E e e3 F L S 7.4 0.4 17.7 10 1.27 16.51 7.6 1.27 8 ° (max.) 0.291 0.016 18.1 10.65 0.1 0.35 0.23 0.5 45° (typ.) 0.697 0.394 0.050 0.65 0.299 0.050 0.713 0.419 mm TYP. MAX. 2.65 0.3 0.49 0.32 0.004 0.014 0.009 0.020 MIN. inch TYP. MAX. 0.104 0.012 0.019 0.013 0016572 13/15 L3916A - L3926A - L3936A DIP28 PACKAGE MECHANICAL DATA DIM. MIN. a1 b b1 b2 D E e e3 F I L 4.445 3.3 15.2 2.54 33.02 14.1 0.175 0.130 0.23 1.27 37.34 16.68 0.598 0.100 1.300 0.555 mm TYP. 0.63 0.45 0.31 0.009 0.050 1.470 0.657 MAX. MIN. inch TYP. 0.025 0.018 0.012 MAX. 0016130 14/15 L3916A - L3926A - L3936A Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. © 1995 SGS-THOMSON Microelectronics - Printed in Italy - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - United Kingdom - U.S.A. 15/15