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L4938ED

L4938ED

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

  • 描述:

    L4938ED - ADVANCED VOLTAGE REGULATOR - STMicroelectronics

  • 数据手册
  • 价格&库存
L4938ED 数据手册
® L4938E/ED L4938EPD ADVANCED VOLTAGE REGULATOR ENABLE AND SENSE INPUTS (EN, SI) PROTECTED AGAINST NEGATIVE TRANSIENTS DOWN TO -5V RESET THRESHOLD ADJUSTABLE FROM 3.8 TO 4.7V EXTREMELY LOW QUIESCENT CURRENT, 65µA (LESS THAN 90µA) IN STANDBY MODE OPERATING DC SUPPLY VOLTAGE RANGE 5V - 28V OPERATING TRANSIENT SUPPLY VOLTAGE UP TO 40V HIGH PRECISION STANDBY OUTPUT VOLTAGE 5V ± 1% WITH 100mA CURRENT CAPABILITY OUTPUT 2 VOLTAGE 5V ± 2% WITH 400mA CURRENT CAPABILITY (ADJ WIRED TO VOUT2) OUTPUT 2 VOLTAGE ADJUSTABLE BY EXTERNAL VOLTAGE DIVIDER OUTPUT 2 DISABLE FUNCTION FOR STANDBY MODE PIN CONNECTIONS DIP (12+2+2) SO20 (12+4+4) PowerSO20 ORDERING NUMBERS: L4938E (DIP) L4938ED (SO) L4938EPD (PSO) DESCRIPTION The L4938E/ED/EPD is a monolithic integrated dual voltage regulator with two very low dropout outputs and additional functions as power-on reset and input voltage sense. It is designed for supplying the microcomputer controlled systems especially in automotive applications. PR 1 2 3 4 5 6 7 8 9 10 D94AT076A 20 19 18 17 16 15 14 13 12 11 SI VS1 VS2 GND GND GND GND N.C. OUT2 ADJ PR CT EN GND GND RES SO OUT1 1 2 3 4 5 6 7 8 D94AT075A 16 15 14 13 12 11 10 9 SI VS1 VS2 GND GND N.C. OUT2 ADJ GND N.C. VS2 VS1 SI PR CT EN N.C. GND 1 2 3 4 5 6 7 8 9 10 L4938EPD 20 19 18 17 16 15 14 13 12 11 GND N.C. OUT2 ADJ OUT1 SO RESET N.C. N.C. GND CT EN GND GND GND GND RES SO OUT1 DIP (12+2+2) SO (12+4+4) PowerSO20 February 1999 1/12 L4938E - L4938ED - L4938EPD ABSOLUTE MAXIMUM RATINGS Symbol VINDC V INTR IO VSI ISI V EN IEN VRES , VSO IRES , ISO PO Tstg Tj TJSD Parameter DC Operating Supply Voltage Transient Operating Supply Voltage (T < 400ms) Output Current Sense Input Voltage (Voltage Forced) (note 2) Sense Input Current (Current Forced) (note 2) Enable Input Voltage (Voltage Forced) (note 2) Sense Input Current (Current Forced) (note 2) Output Voltages Output Currents (Output Low) Power Dissipation at Tamb = 80°C (note 3) Powerdip 12+2+2 Storage Temperature Operating Junction Temperature Thermal shutdown junction temperature Output 2 will shut-down typically at Tj 10K lower than output 1 Value 28 -14 to 40 internally limited -20 to 20 ±1 -20 to 20 ±1 -0.3 to 20 5 875 -65 to 150 -40 to 150 165 Unit V V V mA V mA V mA mW °C °C °C Note 1: The circuit is ESD protected according to MIL-STD-883C Note 2: Current forced means voltage unlimited but current limited to the specified value Voltage forced means voltage limi ted to the specified valueswhile the current is not limited 2 Note 3: Typical value soldered on a PC board with 8cm copper ground plane (35mm thick). BLOCK DIAGRAM VS1 OUT1 1.23V REG1 VS2 REFERENCE OUT2 ADJ EN REG2 1.23V 1.23V CT RES PR RESET 1.4V SI 1.23V SENSE D94AT074A SO GND 2/12 L4938E - L4938ED - L4938EPD THERMAL DATA Symbol Rth j-amb Rth j-case Parameter Thermal Resistance Junction to ambient Thermal Resistance Junction to case 2 DIP 12+2+2 SO 12+4+4 PowerSO20 40 50 1.3V TJ < 85°C; R PR = 0 Enable = LOW; VS = 6 to 28V; I02 = 5 to 400mA IOUT2 = 100mA IOUT2 = 400mA; VS = 4.8V IOUT1 = 5 to 400mA (after regulation setting) V02 = 0.8 to 4.5V IOUT1 = 100mA; IOUT2 = 400mA VS = 6 to 28V; IO1 = 1mA, IO2 = 5mA, (after regulation setting) Min. 4.9 4.8 Typ. 5 5 0.1 0.2 Max. 5.1 5.2 0.2 0.4 25 400 90 Unit V V V V mV mA µA µA 5.1 0.2 0.3 0.3 0.6 50 150 1300 20 20 V V V mV mA mA mA mV OUT 1 V O1 VDP1 VOL01 VLIM1 IQSB Dropoutput Voltage 1 Load Regulation 1 Current Limit 1 Quiescent Current in Standby Mode 100 200 65 75 OUT 2 V O2 VDP2 VOL02 RADJ ILIM2 IQ VOLi 1,2 Output Voltage 2 ADJ connected to OUT 2 Dropoutput Voltage 2 Load Regulation 2 Adjust Input Resistance Current Limit 2 Quiescent Current Line Regulation 4.9 60 450 100 650 OUT1, OUT 2 3/12 L4938E - L4938ED - L4938EPD ELECTRICAL CHARACTERISTICS (Continued) Symbol Parameter Test Condition Min. Typ. Max. Unit ENABLE INPUT VENL VENH VENhyst IEN LOW IEN HIGH Enable Input Low Voltage (Output 2 Active) Enable Input High Voltage Enable Hysteresis Enable Input Current Low Enable Input Current High VEN = 0 VEN = 1.1 to 7V; TJ < 130°C; VEN = 1.1 to 7V; TJ = 130 to 150°C; -20 1.4 20 -20 -1 -10 30 -8 0 0 1 20 60 -3 1 10 V V mV µA µA µA RESET CIRCUIT V RT VRTH tRD min tRD nom tRR ICT ICT VRESL VRESH Reset Theresold Voltage (note4) Reset Theresold Hysteresis Reset Pulse Delay Reset Pulse Delay Reset Reaction Time Pull Down Capability of the Discharge circuit Charge Current Reset Output Low Voltage Reset Output High Leakage current R PR = ∞ R PR = 0 R PR = ∞ C RES = 47nF; t r ≤ 30µs; (note 5) C RES = 47nF; (note 6) C RES = 47nF VOUT1 < VRT VOUT1 > VRT R RES = 10KΩ to VOUT1 VOUT1 ≥ 1.5V VRES = 5V 4.5 3.65 30 40 60 10 3 -1.3 VO1-0.3 VO1-0.2 3.8 60 60 100 50 6 -1 3.95 120 100 140 150 15 0.7 0.4 1 V V mV ms ms µs mA µA V µA SENSE COMPARATOR VSI VSIT VSITH VSOL ISOH ISI HIGH ISI LOW Functional Range Sense Threshold Voltage Sense Threshold Hysteresis Sense Output Low Voltage Sense Output Leakage Sense Input Current High Sense Input Current Low V SI ≤ 1.05V; RSO =10KΩ connected to 5V; V S ≥ 5V VSO = 5V; VSI ≥ 1.5V VSI = 1.1 to 7V; TJ
L4938ED 价格&库存

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