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L4963D

L4963D

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    SOIC20

  • 描述:

    IC REG BUCK ADJUSTABLE 1.5A 20SO

  • 数据手册
  • 价格&库存
L4963D 数据手册
L4963 L4963D ® 1.5A SWITCHING REGULATOR 1.5A OUTPUT LOAD CURRENT 5.1 TO 36V OUTPUT VOLTAGE RANGE DISCONTINUOUS VARIABLE FREQUENCY MODE PRECISE (+/–2%) ON CHIP REFERENCE VERY HIGH EFFICIENCY VERY FEW EXTERNAL COMPONENTS NO FREQ. COMPENSATION REQUIRED RESET AND POWER FAIL OUTPUT FOR MICROPROCESSOR INTERNAL CURRENT LIMITING THERMAL SHUTDOWN Powerdip12+3+3 SO20 ORDERING NUMBERS: DESCRIPTION The L4963 is a monolithic power switching regulator delivering 1.5A at 5.1V. The output voltage is adjustable from 5.1V to 36V, working in discontinuous variable frequency mode. Features of the device include remote inhibit, internal current limiting and thermal protection, reset and power fail outputs for microprocessor. L4963W L4963D The L4963 is mounted in a 12+3+3 lead Powerdip (L4963) and SO20 large (L4963D) plastic packages and requires very few external components. BLOCK DIAGRAM June 2000 This is advanced information on a new product now in development or underogin evaluation. Details are subject to change without notice. 1/17 L4963 - L4963D ABSOLUTE MAXIMUM RATINGS Symbol Value Unit Input Voltage (pin 1 and pin 3 connected togheter) 47 V Input to Output Voltage Difference 47 V V2 Negative Output DC Voltage –1 V V2 Negative Output Peak Voltage at t=0.2 µs, f=50kHz –5 V Power Fail Input 25 V Reset and Power Fail Output Vi Reset Delay Input 5.5 V 7 V SO20 Parameter Powerdip Vi V3–V2 V8 V7 V9, V11 V8, V10 V10 V9 V13, V18 V12, V16 Feedback and Inhibit Inputs V19, V20 V17, V18 Oscillator Inputs 5.5 V Total Power Dissipation Tpins ≤ 90°C (Power DIP) (Tamb = 70°C no copper area on PCB) (Tamb = 70°C, 4cm2 copper area on PCB) 5 1.3 2 W W W –40 to 150 1.45 °C W 4 W Ptot Tstg, Tj Ptot Storage & Junction Temperature (Tamb = 70°C 6cm2 copper area on PCB) Total Power Dissipation Tpins ≤90°C (SO20L) PIN CONNECTION (top view) Powerdip18 SO20 2/17 L4963 - L4963D PIN FUNCTIONS SO20L Power DIP Name Description 1 1 SIGNAL SUPPLY VOLTAGE Must be Connected to pin 3 2 2 OUTPUT Regulator output 3 3 SUPPLY VOLTAGE Unregulated voltage input. An internal regulator powers the internal logic. 4, 5, 6, 7 14, 15, 16, 17 4, 5, 6 13, 14, 15 GROUND Common ground terminal 8 7 POWER FAIL INPUT Input of the power fail circuit. The threshold can be modified introducing an external voltage divider between the Supply Voltage and GND. 9 8 POWER FAIL OUTPUT Open collector power fail signal output. This output is high when the supply voltage is safe. 10 9 RESET DELAY A capacitor connected between this terminal and ground determines the reset signal delay time. 11 10 RESET OUTPUT Open collector reset signal output. This output is high when the output voltage value is correct. 12 11 REFERENCE VOLTAGE Reference voltage output. 13 12 FEEDBACK INPUT Feedback terminal of the regulation loop. The output is connected directly to this terminal for 5.1V operation; it is connected via a divider for higher voltages. 18 16 INHIBIT INPUT TTL level remote inhibit. A logic low level on this input disables the device. 19 17 C OSCILLATOR Oscillator waveform. A capacitor connected between this terminal and ground modifies the maximum oscillator frequency. 20 18 R OSCILLATOR FREQ. A resistor connected between this terminal and ground defines the maximum switching frequency. THERMAL DATA Symbol Parameter SO20 Powerdip Unit Rth j-pins Thermal Resistance Junction to Pins max. 15 12 °C/W Rth j-amb Thermal Resistance Junction to Ambient (*) max. 85 80 °C/W (*) See Fig. 28 3/17 L4963 - L4963D CIRCUIT DESCRIPTION (Refer to Block Diagram) The L4963 is a monolithic stepdown regulator providing 1.5A at 5.1V working in discontinuous variable frequency mode. In normal operation the device resonates at a frequency depending primarily on the inductance value, the input and output voltage and the load current. The maximum switching however can be limited by an internal oscillator, which can be programmed by only one external resistor. The fondamental regulation loop consists of two comparators, a precision 5.1V on-chip reference and a drive latch. Briefly the operation is as follows: when the choke ends its discharge the catch freewheeling recirculation filter diode begins to come out of forward conduction so the output voltage of the device approaches ground. When the output voltage reaches –0.1V the internal comparator sets the latch and the power stage is turned on. Then the inductor current rises linearly until the voltage sensed at the feedback input reaches the 5.1V reference. The second comparator then resets the latch and the output stage is turned off. The current in the choke falls linearly until it is fully discharged, then the cycle repeats. Closing the loop directly gives an output voltage of 5.1V. Higher output voltages are Figure 1: Reset and Power Fail Function 4/17 obtained by inserting a voltage divider and this method of control requires no frequency compensation network. At output voltages greater than 5.1V the available output current must be derated due to the increased power dissipation of the device. Output overload protection is provided by an internal current limiter. The load current is sensed by a on-chip metal resistor connected to a comparator which resets the latch and turns off the power stage in overload condition. The reset circuits (see fig. 1) generates an output high signal when the output voltage value is correct. It has an open collector output and the output signal delay time can be programmed with an external capacitor. A powerfail circuit is also available and is used to monitor the supply voltage. Its output goes high when the supply voltage reaches a pre-programmed treshold set by a voltage divider to its input from the supply to ground. With the input left open the threshold is approximately equal to 5.1V. The output of the power fail is an open collector. A TTL level inhibit is provided for applications such as remote on/off control. This input is activated by a low logic level and disables circuits operation. The thermal overload circuit disables the device when the junction temperature is about 150°C and has hysteresis to prevent unstable conditions. L4963 - L4963D ELECTRICAL CHARACTERISTIC (Refer to the test circuit Vi = 30V Tj = 25°C unless otherwise specified ) Symbol Parameter Test Conditions Min. Typ. Max. Unit Fig. Vref 36 V 2 46 V 2 5.1 5.2 V 2 5 20 µA 3a 5 10 mV 3a DYNAMIC CHARACTERISTICS Vo Output Voltage Range Vi = 46V Io = 0.5A Vi Input Voltage Range Vo = Vref to 36V Io = 0.5A 9 V12 Feedback Voltage Vi = 9 to 46V Io = 0.5A 5 I12 Input Bias Current Vi = 15V V12 = 6V V17f = 5V VOS12 Input Offset Voltage ∆Vo Line Regulation Vi = 9 to 46V Vo = Vref Io = 0.5A 15 50 mV 2 ∆Vo Load Regulation Vo = Vref Io = 0.5 to 1.5A 15 45 mV 2 Vd Dropout Voltage Between pin 3 and pin 2 I2 = 3A Vi = 20V 1.5 2 V 2 I2L Current Limiting Vi = 9 to 46V Vo = Vref to 28V 3.5 6.5 A 2 Io Maximum Operating Load Current Vi = 9 to 46V Vo = Vref 1.5 A 2 Supply Voltage Ripple Rejection Vi = 2Vrms Vo = Vref fripple = 100Hz Io = 1.5A 50 56 dB 2 Reference Voltage Vi = 9 to 46V O < I11 < 5mA 5 5.1 V 3a Average Temperature Coefficient of Ref. Volt. Tj = 0 to 125 °C 0.4 mV/°C – ∆V11 Vref Line Regulation Vi = 9 to 46V 10 20 mV 3a ∆V11 Vref Line Regulation Iref = 0 to 5mA Vi = 46V Rosc = 51KΩ 65 69 7 15 mV 3a Efficiency Io = 1.5A Vo = Vref 65 75 % 2 145 150 °C – 30 °C – SVR V11 η Tsd Thermal Shutdown Junction Temperature Hysteresis 5.2 DC CHARACTERISTICS Iq Quescent Drain Current Vi = 46V Io = 0mA V16 = V12 = 0 14 20 mA 3a V16 = Vref V12 = 5.3V 11 16 mA 3a INHIBIT V16L Low Input Voltage Vi = 9 to 46V 0.3 0.8 V 2 V16H High Input Voltage Vi = 9 to 46V 2 5.5 V 2 I16L Input Current with Low Input Voltage V16 = 0.8V 50 100 µA 2 I16L Input Current with High Input Voltage V16 = 2V 10 20 µA 2 5/17 L4963 - L4963D ELECTRICAL CHARACTERISTIC (Continued) Symbol Parameter Test Conditions Min. Typ. Max. Unit Fig. RESET V12 Rising Threshold Voltage Vi = 9 to 46V Vref –150 Vref –100 Vref –50 mV 3b V12 Falling Threshold Voltage Vi = 9 to 46V Vref –150 Vref –200 Vref –250 mV 3b V9D Delay Rising Thereshold Voltage V7 = OPEN 4.3 4.5 4.7 V 3b V9F Delay Falling Thereshold Voltage 1 1.5 2 V 3b 110 140 µA 3b Delay Source Current V9 = 4.7V V12 = 5.3V 70 I9SI Delay Sink Current V9 = 4.7V V12 = 4.7V 10 mA 3b I10 Output Leakage Current Vi = 46V V7 = 8.5V 50 µA 3b V10 Output Saturation Volt. I10 = 15mA; VI = 3 to 46V 0.4 V 3b –I9SO POWER FAIL VR Rising Threshold Voltage Pin7 = open 17.5 19 20.5 V 3C VF Falling Threshold Voltage Pin7 = open 14.25 15 15.75 V 3c V7 Rising Threshold Voltage Vi = 20V 4.14 4.5 4.86 V – V7 Falling Threshold Voltage Vi = 20V 3.325 3.5 3.675 V – Vs Output Saturation Volt. Ia = 5mA 0.4 V 3c Is Output Leakage Current Vi = 46V 50 µA 3c 79 kHz – 83 kHz – OSCILLATOR 6/17 f Oscillator Frequency RT = 51KΩ 46 f Oscillator Frequency VI = 9 to 46V Tj = 0 to 125°C RT = 51KΩ 42 60 L4963 - L4963D Figure 2: Test Circuit Figure 3: DC Test Circuit Figure 3a Figure 3b 7/17 L4963 - L4963D Figure 3c Figure 4: Quiescent Drain Current vs. Supply Voltage (0% Duty Cycle) Figure 5: Quiescent Drain Current vs. Supply Voltage (100% Duty Cycle) Figure 6: Quiescent Drain Current vs. Junction Temperature (0% Duty Cycle) Figure 7: Quiescent Drain Current vs. Junction Temperature (100% Duty Cycle) 8/17 L4963 - L4963D Figure 8: Reference Voltage vs. Vi Figure 9: Reference Voltage vs. Tj Figure 10: Line Transient Response Figure 11: Load Transient Figure 12: Supply Voltage Ripple Rejection vs. Frequency Figure 13: Dropout Voltage Between pi3 and 2 vs. Current at pin2 9/17 L4963 - L4963D Figure 14: Dropout Voltage Between pin3 and 2 vs. Junction Temperature Figure 15: Maximum Allowable PowerDissipation vs. Ambient Temperature (Powerdip Package Only) Figure 16: Power Dissipation (device only) vs. Input Voltage (Powerdip Package Only) Figure 17: Power Dissipation (device only) vs. Output Voltage (Powerdip Package Only) Figure 18: Voltage and Current Waveform at pin2 Figure 19: Efficiency vs. Output Current (Powerdip Package Only) 10/17 L4963 - L4963D Figure 20: Efficiency vs. Output Voltage (Powerdip Package Only) Figure 21: Current Limit vs. Junction Temperature Vi = 30V Figure 22: Current Limit vs. Input Voltage Figure 23: Oscillator Frequency vs. R2 (see fig. 26) Figure 24: Oscillator Frequency vs. Junction Temperature Figure 25: Oscillator Frequency vs. Input Voltage 11/17 L4963 - L4963D Figure 26: Evaluation Board Circuit PART LIST CAPACITOR Resistor Values for Standard Output Voltages C1 1000µF 50V EKR (*) VO R6 R5 C2 2.2mF 16V 12 4.7KΩ 6.2KΩ C3 1000µF 40V with low ESR 15 4.7KΩ 9.1KW C4 1µF 50V film 18 4.7KΩ 12KW 24 4.7KΩ 18KW RESISTOR R1 1KΩ R2 51KΩ R3 1KΩ R4 1KΩ R5, R6 Diode: BYW98 Core: L = 40µH Magnetics 58121-A2MPP 34 Turns 0.9mm (20AWG) see table (*) Minimum 100µF if Vi is a preregulated offline SMPS output or 1000µF if a 50Hz transformer plus rectifiers is used. 12/17 L4963 - L4963D Figure 27: P.C. Board and Component Layout of the Circuit of fig. 26 (Powerdip Package) (1:1 scale). Figure 28: Thermal Characteristics Figure 29: Junction to Ambient Thermal Resistance vs. Area on Board Heatsink (SO20) 13/17 L4963 - L4963D Figure 30: A Minimal 5.1 Fixed Regulator — Very Few Components are Required Figure 31: A Minimal Components count for VO = 12V 14/17 L4963 - L4963D mm DIM. MIN. a1 0.51 B 0.85 b b1 TYP. inch MAX. MIN. TYP. MAX. 0.020 1.40 0.033 0.50 0.38 0.055 0.020 0.50 D 0.015 0.020 24.80 0.976 E 8.80 0.346 e 2.54 0.100 e3 20.32 0.800 F 7.10 0.280 I 5.10 0.201 L OUTLINE AND MECHANICAL DATA 3.30 0.130 Powerdip 18 Z 2.54 0.100 15/17 L4963 - L4963D mm inch OUTLINE AND MECHANICAL DATA DIM. MIN. TYP. MAX. MIN. TYP. MAX. A 2.35 2.65 0.093 0.104 A1 0.1 0.3 0.004 0.012 B 0.33 0.51 0.013 0.020 C 0.23 0.32 0.009 0.013 D 12.6 13 0.496 0.512 E 7.4 7.6 0.291 0.299 e 1.27 0.050 H 10 10.65 0.394 0.419 h 0.25 0.75 0.010 0.030 L 0.4 1.27 0.016 0.050 SO20 K 0˚ (min.)8˚ (max.) L h x 45˚ A B e A1 K H D 20 11 E 1 0 1 SO20MEC 16/17 C L4963 - L4963D Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics © 2000 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 17/17
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