L4970A

® L4970A 10A SWITCHING REGULATOR 10A OUTPUT CURRENT 5.1V TO 40V OUTPUT VOLTAGE RANGE 0 TO 90% DUTY CYCLE RANGE INTERNAL FEED-FORWARD LINE REGULATION INTERNAL CURRENT LIMITING PRECISE 5.1V ± 2% ON CHIP REFERENCE RESET AND POWER FAIL FUNCTIONS SOFT START INPUT/OUTPUT SYNC PIN UNDER VOLTAGE LOCK OUT WITH HYSTERETIC TURN-ON PWM LATCH FOR SINGLE PULSE PER PERIOD VERY HIGH EFFICIENCY SWITCHING FREQUENCY UP TO 500KHz THERMAL SHUTDOWN CONTINUOUS MODE OPERATION DESCRIPTION The L4970A is a stepdown monolithic power switching regulator delivering 10A at a voltage variable from 5.1 to 40V. MULTIPOWER BCD TECHNOLOGY Multiwatt15V ORDERING NUMBER: L4970A Realized with BCD mixed technology, the device uses a DMOS output transistor to obtain very high efficiency and very fast switching times. Features of the L4970A include reset and power fail for microprocessors, feed forward line regulation, soft start, limiting current and thermal protection. The device is mounted in a 15-lead multiwatt plastic power package and requires few external components. Efficient operation at switching frequencies up to 500KHz allows reduction in the size and cost of external filter components. BLOCK DIAGRAM June 2000 1/21 This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice. L4970A ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit V9 Input Voltage 55 V V9 Input Operating Voltage 50 V V7 Output DC Voltage Output Peak Voltage at t = 0.1µs f = 200KHz -1 -7 V V I7 V6 Maximum Output Current V3, V12 Internally Limited Bootstrap Voltage Bootstrap Operating Voltage 65 V9 + 15 V V V Input Voltage at Pins 3, 12 12 V4 Reset Output Voltage 50 V I4 Reset Output Sink Current 50 mA V5, V10, V11, V13 I5 Input Voltage at Pin 5, 10, 11, 13 7 V Reset Delay Sink Current 30 mA I10 I12 Error Amplifier Output Sink Current 1 A Soft Start Sink Current 30 mA Ptot Total Power Dissipation at Tcase < 120°C 30 W -40 to 150 °C Tj, Tstg Junction and Storage Temperature PIN CONNECTION (Top view) THERMAL DATA Symbol Rth j-case Rth j-amb 2/21 Parameter Thermal Resistance Junction-case Thermal Resistance Junction-ambient max max Value Unit 1 35 °C/W °C/W L4970A PIN FUNCTIONS No Name Function 1 OSCILLATOR Rosc. External resistor connected to ground determines the constant charging current of Cosc. 2 OSCILLATOR Cosc. External capacitor connected to ground determines (with Rosc) the switching frequency. 3 RESET INPUT Input of Power Fail Circuit. The threshold is 5.1V. It may be connected via a divider to the input for power fail function. It must be connected to the pin 14 an external 30KΩ resistor when power fail signal not required. 4 RESET OUT Open Collector Reset/power Fail Signal Output. This output is high when the supply and the output voltages are safe. 5 RESET DELAY A Cd capacitor connected between this terminal and ground determines the reset signal delay time. 6 BOOTSTRAP A Cboot capacitor connected between this terminal and the output allows to drive properly the internal D-MOS transistor. 7 OUTPUT Regulator Output. 8 GROUND Common Ground Terminal 9 SUPPLY VOLTAGE Unregulated Input Voltage. 10 FREQUENCY COMPENSATION A series RC network connected between this terminal and ground determines the regulation loop gain characteristics. 11 FEEDBACK INPUT The Feedback Terminal of the Regulation Loop. The output is connected directly to this terminal for 5.1V operation; It is connected via a divider for higher voltages. 12 SOFT START Soft Start Time Constant. A capacitor is connected between thi sterminal and ground to define the soft start time constant. 13 SYNC INPUT Multiple L4970A are synchronized by connecting pin 13 inputs together or via an external syncr. pulse. 14 Vref 5.1V Vref Device Reference Voltage. 15 Vstart Internal Start-up Circuit to Drive the Power Stage. CIRCUIT OPERATION (refer to the block diagram) The L4970A is a 10A monolithic stepdown switching regulator working in continuous mode realized in the new BCD Technology. This technology allows the integration of isolated vertical DMOS power transistors plus mixed CMOS/Bipolar transistors. The device can deliver 10A at an output voltage adjustable from 5.1V to 40V, and contains diagnostic and control functions that make it particularly suitable for microprocessor based systems. BLOCK DIAGRAM The block diagram shows the DMOS power transistor and the PWM control loop. Integrated functions include a reference voltage trimmed to 5.1V ± 2%, soft start, undervoltage lockout, oscillator with feedforward control, pulse by pulse current limit, thermal shutdown and finally the reset and power fail circuit. The reset and power fail circuit provides an output signal for a microprocessor indicating the status of the system. Device turn on is around 11V with a typical 1V hysteresis, this threshold provides a correct voltage for the driving stage of the DMOS gate and the hysteresis prevents instabilities. An external bootstrap capacitor charged to 12V by an internal voltage reference is needed to provide correct gate drive to the power DMOS. The driving circuit is able to source and sink peak currents of around 0.5A to the gate of the DMOS transistor. A typical switching time of the current in the DMOS transistor is 50ns. Due to the fast commutation switching frequencies up to 500kHz are possible. The PWM control loop consists of a sawtooth oscillator, error amplifier, comparator, latch and the output stage. An error signal is produced by comparing the output voltage with the precise 5.1V ± 2% on chip reference. This error signal is then compared with the sawtooth oscillator, in order to generate a fixed frequency pulse width modulated drive for the output stage. A PWM latch is included to eliminate multiple pulsing within a period even in noisy environments. The gain and 3/21 L4970A Figure 1: Feedforward Waveform Figure 2: Soft Start Function Figure 3: Limiting Current Function 4/21 L4970A stability of the loop can be adjusted by an external RC network connected to the output of the error amplifier. A voltage feedforward control has been added to the oscillator, this maintains superior line regulation over a wide input voltage range. Closing the loop directly gives an output voltage of 5.1V, higher voltages are obtained by inserting a voltage divider. At turn on output overcurrents are prevented by the soft start function (fig. 2). The error amplifier is initially clamped by an external capacitor Css and allowed to rise linearly under the charge of an internal constant current source. Output overload protection is provided by a current limit circuit (fig. 3). The load current is sensed by an internal metal resistor connected to a comparator. When the load current exceeds a preset threshold the output of the comparator sets a flip flop which turns off the power DMOS. The next clock pulse, from an internal 40kHz oscillator will reset the flip flop and the power DMOS will again conduct. This current protection method, ensures a constant current output when the system is overloaded or short circuited and limits the switching frequency, in this condition, to 40kHz. The Reset and Power fail circuitry (fig 4) generates an output signal when the supply voltage exceeds a threshold programmed by an external voltage divider. The reset signal, is generated with a delay time programmed by an external capacitor on the delay pin. When the supply voltage falls below the threshold or the output voltage goes below 5V the reset output goes low immediately. The reset output is an open collector-drain. Fig 4A shows the case when the supply voltage is higher than the threshold, but the output voltage is not yet 5V. Fig 4B shows the case when the output is 5.1V but the supply voltage is not yet higher than the fixed threshold. The thermal protection disables circuit operation when the junction temperature reaches about 150°C and has an hysterysis to prevent unstable conditions. Figure 4: Reset and Power Fail Functions. A B 5/21 L4970A ELECTRICAL CHARACTERISTICS (Refer to the test circuit, Tj = 25°C, Vi = 35V, R4 = 16KΩ, C9 = 2.2nF, fSW = 200KHz typ, unless otherwise specified) DYNAMIC CHARACTERISTICS Symbol Parameter Vi input Voltage Range (pin 9) Vo = Vref to 40V Io = 10A 15 Vo Output Votage Vi = 15V to 50V Io = 5A; Vo = Vref 5 ∆Vo Line Regulation Vi = 15V to 50V Io = 5A; Vo = Vref ∆Vo Load Regulation Vo = Vref Io = 3A to 6A Io = 2A to 10A Vd Dropout Voltage Between Pin 9 and 7 Test Condition Min. Typ. Max. Unit Fig. 50 V 5 5.1 5.2 V 5 12 30 mV 5 10 20 30 50 mV mV 0.55 1.1 0.8 1.6 V V 5 15 A 5 5 Io = 5A Io = 10A I7L Max. Limiting Current Vi = 15 to 50V 11 13 η Efficiency Io = 5A Vo = Vref Vo = 12V 80 85 92 % % Io = 10A Vo = Vref Vo = 12V 75 80 87 % % 56 60 dB 5 180 SVR Supply Voltage Ripple Reject. f ∆f Switching Frequency ∆ Vi ∆f Tj fmax Vi = 2VRMS; Io = 5A f = 100Hz; Vo = Vref 5 5 200 220 KHz 5 Voltage Stability of Swiching Frequency Vi = 15V to 45V 2 6 % 5 Temperature Stability of Swiching Frequency Tj = 0 to 125°C 1 % 5 Maximum Operating Switching Frequency Vo = Vref; R4 = 10KΩ Io = 10A; C9 = 1nF 500 KHz 5 Test Condition Min. Typ. Max. Unit Fig. 5 Vref SECTION (pin 14) Symbol Parameter 5.1 5.2 V 7 ∆V14 Line Regulation Vi = 15V to 50V 10 25 mV 7 ∆V14 ∆ V14 ∆T Load Regulation I14 = 0 to 1mA 20 40 mV 7 Average Temperature Coefficient Reference Voltage Tj = 0°C to 125°C 0.4 mV/°C 7 I14 short Short Circuit Current Limit V14 = 0 70 mA 7 V14 Reference Voltage VSTART SECTION (pin 15) Symbol V15 ∆V15 ∆V15 I15 short 6/21 Parameter Test Condition Reference Voltage Min. 11.4 Typ. Max. Unit Fig. 12 12.6 V 7 Line Regulation Load Regulation Vi = 15 to 50V I15 = 0 to 1mA 0.6 50 1.4 200 V mV 7 7 Short Circuit Current Limit V15 = 0V 80 mA 7 L4970A ELECTRICAL CHARACTERISTICS (continued) DC CHARACTERISTICS Symbol Parameter V9on Turn-on Threshold V9 Hyst Turn-off Hysteresys Test Condition Min. Typ. Max. Unit Fig. 10 11 12 V 7A V 7A 1 I9Q Quiescent Current V12 = 0; S1 = D 13 19 mA 7A I9OQ I7L Operating Supply Current Out Leak Current V12 = 0; S1 = C; S2 = B Vi = 55V; S3 = A; V12 = 0 16 23 2 mA mA 7A 7A Min. Typ. Max. Unit Fig. 70 100 130 µA 7B 1 0.7 V V 7B 7B Max. Unit Fig. V 7C V 7C SOFT START Symbol Parameter I12 V12 Soft Start Source Current V12 = 3V; V11 = 0V Test Condition Output Saturation Voltage I12 = 20mA; V9 = 10V I12 = 200µA; V9 = 10V ERROR AMPLIFIER Symbol Parameter Test Condition Min. Typ. V10H High Level Out Voltage I10 = -100µA; S1 = C V11 = 4.7V V10L Low Level Out Voltage I10 = +100µA; S1 = C V11 = 5.3V; I10H Source Output Current V10 = 1V; S1 = E V11 = 4.7V 100 150 µA 7C I10L Sink Output Current V10 = 6V; S1 = D V11 = 5.3V 100 150 µA 7C I11 GV Input Bias Current DC Open Loop Gain RS = 10KΩ VVCM = 4V; RS = 10Ω µA dB – – SVR Supply Voltage Rejection 15 < Vi < 50V; RS = 10Ω dB – VOS Input Offset Voltage RS = 50Ω 6 1.2 0.4 3 60 60 80 2 10 mV – Typ. Max. Unit Fig. RAMP GENERATOR (pin 2) Symbol Parameter Test Condition V2 Ramp Valley S1 = C; S2 = B V2 Ramp Peak S1 = C; S2 = B; I2 I2 Min. Ramp Current Max. Ramp Current S1 = A; I1 = 100µA S1 = A; I1 = 1mA Min. 1.2 Vi = 15V Vi = 45V 1.5 V 7A 2.5 5.5 V V 7A 7A 270 2.7 300 2.4 µA mA 7A 7A Typ. SYNC FUNCTION (pin 13) Symbol Test Condition Min. Max. Unit Fig. V13 Low Input Voltage Parameter Vi = 15V to 50V; V12 = 0; S1 = C; S2 = B; S4 = B –0.3 0.9 V 7A V13 High Input voltage V12 = 0; S1 = C; S2 = B; S4 = B 3.5 5.5 V 7A I13L Sync Input Current with Low Input Voltage V13 = V2 = 0.9V; S4 = A; S1 = C; S2 = B 0.4 mA 7A I13H Input Current with High Input Voltage V13 = 3.5V; S4 = A; S1 = C; S2 = B 2 mA 7A V13 Output Amplitude V – tW Output Pulse Width 0.8 µs – Vthr = 2.5V 4 5 0.3 0.5 7/21 L4970A ELECTRICAL CHARACTERISTICS (continued) RESET AND POWER FAIL FUNCTIONS Symbol Parameter Min. Typ. Max. Unit Fig. V11R Rising Threshold Voltage (pin 11) Vi = 15 to 50V V3 = 5.3V Vref –120 Vref –100 Vref –80 V mV 7D V11F Falling Threshold Voltage (pin 11) Vi = 15 to 50V V3 = 5.3V 4.77 Vref –200 Vref –160 V mV 7D V5H Delay High Threshold Voltage Vi = 15 to 50V V14 = V11 V3 = 5.3V 4.95 5.1 5.25 V 7D V5L Delay Low Threshold Voltage Vi = 15 to 50V V14 = V11 V3 = 5.3V 1 1.1 1.2 V 7D –I5SO I5SI Delay Source Current V3 = 5.3V; V5 = 3V 40 60 80 Delay Sink Current V3 = 4.7V; V5 = 3V 10 V4S Out Saturation Voltage I4 = 15mA; S1 = B V3 = 4.7V Output Leak Current V4 = 50V; S1 = A V3 = 5.3V V3R Rising Threshold Voltage V11 = V14 V3H I3 Hysteresys I4 Test Condition 7D 7D 0.4 V 7D 100 µA 7D 4.95 5.1 5.25 V 7D 0.4 0.5 0.6 V 7D 1 3 µA 7D Input Bias Current Figure 5: Test and Evaluation Board Circuit TYPICAL PERFORMANCES (using evaluation board) : n = 83% (Vi = 35V ; Vo = VREF ; Io = 10A ; fSW = 200KHz) Vo RIPPLE = 30mV (at 10A) with output filter capacitor ESR ≤ 60mΩ Line regulation = 5mV (Vi = 15 to 50V) Load regulation = 15mV (Io = 2 to 10A) For component values, refer to test circuit part list. 8/21 µA mA L4970A Figure 6a: P.C. Board (components side) and Components Layout of Figure 5 (1:1 scale). PARTS LIST Table A R1 = 30KΩ C1, C2 = 3300µF 63VL EYF (ROE R2 = 10KΩ R3 = 15KΩ C3, C4, C5, C6 = 2.2µF C7 = 390pF Film R4 = 16KΩ C8 = 22nF MKT 1817 (ERO) R5 = 22Ω 0,5W R6 = 4K7 V0 R9 R7 12V 15V 18V 24V 4.7kΩ 4.7kΩ 4.7kΩ 4.7kΩ 6.2kW 9.1kΩ 12kΩ 18kΩ C9 = 2.2nF KP1830 R7 = 10Ω C10 = 220nF MKT R8 = see tab. A C 11 = 2.2nF MP1830 R9 = OPTION **C12, C13, C14 = 220µF 40VL EKR R10 = 4K7 R11 = 10Ω C15 = 1µF Film Table B SUGGESTED BOOTSTRAP CAPACITORS Operating Frequency Bootstrap Cap.c10 D1 = MBR 1560CT (or 16A/60V or equivalent) f = 20KHz ≥680nF L1 = 40µH f = 50KHz f = 100KHz ≥470nF ≥330nF f = 200KHz f = 500KHz ≥220nF ≥100nF core 58071 MAGNETICS 27 TURNS Ø 1,3mm (AWG 16) COGEMA 949178 * 2 capacitors in parallel to increase input RMS current capability ** 3 capacitors in parallel to reduce total output ESR 9/21 L4970A Figure 6b: P.C. Board (Back side) and Components Layout of the Circuit of Fig. 5. (1:1 scale) Figure 7: DC Test Circuits 10/21 L4970A Figure 7A Figure 7B 11/21 L4970A Figure 7D Figure 7C 12/21 L4970A Figure 8: Quiescent Drain Current vs. Supply Voltage (0% duty cycle - see fig. 7A). Figure 9: Quiescent Drain Current vs. Junction Temperature (0% duty cycle). Figure 10: Quiescent Drain Current vs. Duty Cycle Figure 11: Reference Voltage (pin14) vs. Vi (see fig. 7) Figure 12: Reference Voltage (pin 14) vs. Junction Temperature (see fig. 7) Figure 13: Reference Voltage (pin15) vs. Vi (see fig. 7) 13/21 L4970A Figure 14: Reference Voltage (pin 15) vs. Junction Temperature (see fig. 7) Figure 15: Reference Voltage 5.1V (pin 14) Supply Voltage Ripple Rejection vs. Frequency Figure 16: Switching Frequency vs. Input Voltage (see fig. 5) Figure 17: Switching Frequency vs. Junction Temperature (see fig 5) Figure 18: Switching Frequency vs. R4 (see fig. 5) Figure 19: Max. Duty Cycle vs. Frequency 14/21 L4970A Figure 20: Supply Voltage Ripple Rejection vs. Frequency (see fig. 5) Figure 21: Line Transient Response (see fig. 5) Figure 22: Load Transient Response (see fig. 5) Figure 23: Dropout Voltage Between Pin 9 and Pin 7 vs. Current at Pin 7 Figure 24: Dropout Voltage Between Pin 9 and Pin 7 vs. Junction Temperature Figure 25: Power Dissipation (device only) vs. Input Voltage 15/21 L4970A Figure 26: Power Dissipation (device only) vs. Output Voltage Figure 27: Heatsink Used to Derive the Device’s Power Dissipation Tcase − Tamb Rth - Heatsink = Pd Figure 28: Efficiency vs. Output Current Figure 29: Efficiency vs. Output Voltage Figure 30: Efficiency vs. Output Voltage 16/21 Figure 31: Open Loop Frequency and Phase Response of Error Amplifier (see fig.7C) L4970A Figure 32: Power Dissipation Derating Curve Figure 33: A5.1V/12V Multiple Supply. Note the Synchronization between the L4970A and the L4974A 17/21 L4970A Figure 34: 5.1V / 10A Low Cost Application Figure 35: 10A Switching Regulator, Adjustable from 0V to 25V. 18/21 L4970A Figure 36: L4970A’s Sync. Example 19/21 L4970A mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 5 0.197 B 2.65 0.104 C 1.6 D E 0.063 1 0.49 0.039 0.55 0.019 0.022 F 0.66 0.75 0.026 G 1.02 1.27 1.52 0.040 0.050 0.060 G1 17.53 17.78 18.03 0.690 0.700 0.710 H1 19.6 0.030 0.772 H2 L 20.2 0.795 21.9 22.2 22.5 0.862 0.874 0.886 L1 21.7 22.1 22.5 0.854 0.870 0.886 L2 17.65 18.1 0.695 L3 17.25 17.5 17.75 0.679 0.689 0.699 L4 10.3 10.7 10.9 0.406 0.421 0.429 0.713 L7 2.65 2.9 0.104 M 4.25 4.55 4.85 0.167 0.179 0.191 M1 4.63 5.08 5.53 0.182 0.200 0.218 S 1.9 2.6 0.075 S1 1.9 2.6 0.075 0.102 Dia1 3.65 3.85 0.144 0.152 20/21 OUTLINE AND MECHANICAL DATA 0.114 0.102 Multiwatt15 V L4970A Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics © 2000 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 21/21