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L4990AD

L4990AD

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

  • 描述:

    L4990AD - PRIMARY CONTROLLER - STMicroelectronics

  • 数据手册
  • 价格&库存
L4990AD 数据手册
® L4990 L4990A PRIMARY CONTROLLER CURRENT-MODE CONTROL PWM SWITCHING FREQUENCY UP TO 1MHz LOW START-UP CURRENT < 0.45mA HIGH-CURRENT OUTPUT DRIVE SUITABLE FOR POWER MOSFET (1A) FULLY LATCHED PWM LOGIC WITH DOUBLE PULSE SUPPRESSION PROGRAMMABLE DUTY CYCLE 100% AND 50% MAXIMUM DUTY CYCLE LIMIT PROGRAMMABLE SOFT START PRIMARY OVERCURRENT FAULT DETECTION WITH RE-START DELAY PWM UVLO WITH HYSTERESIS IN/OUT SYNCHRONIZATION DISABLE LATCHED INTERNAL 100ns LEADING EDGE BLANKING OF CURRENT SENSE PACKAGE: DIP16 AND SO16W DESCRIPTION This primary controller I.C., developed in BCD60II technology, has been designed to implement off BLOCK DIAGRAM SYNC 1 RCT 2 TIMING 25V DC-LIM 15 MULTIPOWER BCD TECHNOLOGY DIP16 SO16W ORDERING NUMBERS: L4990/L4990A(DIP16) L4990D/L4990AD (SO16W) line or DC-DC power supply applications using a fixed frequency current mode control. Based on a standard current mode PWM controller this device includes some features as programmable soft start, IN/OUT synchronization, disable (to be used for over voltage protection and for power management), precise maximum Duty Cycle Control, 100ns (typ) leading edge blanking on current sense, pulse by pulse current limit and overcurrent protection with soft start intervention. VCC 8 VREF 4 3 DC 14 DIS 2.5V + + T DIS Vref + 16V/10V - PWM UVLO 9 VC 13V BLANKING S R PWM 10 OUT Q OVER CURRENT ISEN 13 + FAULT SOFT-START VREF OK CLK DIS 11 PGND SS 7 1.2V 2.5V + E/A 2R 1V R 12 SGND 6 COMP - 5 VFB D98IN1002 July 1999 1/24 L4990 - L4990A ABSOLUTE MAXIMUM RATINGS Symbol VCC IOUT Parameter Supply Voltage (ICC < 50mA) (*) Output Peak Pulse Current Analog Inputs & Outputs (6,7) Analog Inputs & Outputs (1,2,3,4,5,15,14 13) Power Dissipation @ Tamb = 70°C Junction Temperature, Operating Range Storage Temperature, Operating Range Value selflimit 1.5 -0.3 to 8 -0.3 to 6 1 -25 to 125 -55 to 150 Unit V A V V W °C °C Ptot Tj Tstg (*) maximum package power dissipation limits must be observed PIN CONNECTION SYNC RCT DC VREF VFB COMP SS VCC 1 2 3 4 5 6 7 8 D95IN197 16 15 14 13 12 11 10 9 N.C. DC-LIM DIS ISEN SGND PGND OUT VC THERMAL DATA Symbol Rth j-amb Rth j-amb Parameter Thermal Resistance Junction to Ambient Thermal Resistance Junction to Ambient DIP16 SO16 Value 80 120 Unit °C/W °C/W PIN FUNCTIONS N. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 2/24 Name SYNC RCT DC VREF VFB COMP SS VCC VC OUT PGND SGND ISEN DIS DC-LIM NC Function Synchronization. A synchronization pulse terminates the PWM cycle and discharges Ct Oscillator pin for external C t, Rt components Duty Cycle control 5.0V +/-1.5% reference voltage Error Amplifier Inverting input Error Amplifier Output Soft start pin for external capacitor Css Supply for internal ”Signal” circuitry Supply for Power section High current totem pole output Power ground Signal ground Current sense Disable. It must never be left floating. Tie to SGND if not used. Connecting this pin to Vref, DC is limited to 50%. If it is left floating or grounded no limitation is imposed Not connected L4990 - L4990A ELECTRICAL CHARACTERISTICS (VCC = 15V; Tj = 0 to 70°C; unless otherwise specified.) Symbol VO Parameter Output Voltage Line Regulation Load Regulation TS IOS Temperature Stability Total Variation Short Circuit Current Power Down/UVLO OSCILLATOR SECTION Initial Accuracy Accuracy Initial Accuracy Accuracy Duty Cycle Duty Cycle Tj = 25°C; RT = 4.42kΩ; C T = 1nF; pin 15 Vref R T = 4.42KΩ; VCC = 12 to 20V; C T = 1nF; pin 15 = Vref Tj = 25°C; RT = 4.42KΩ; C T = 1nF; pin 15 OPEN R T = 4.42KΩ; VCC = 12 to 20V; C T = 1nF; pin 15 OPEN pin 3 = 0,7V, pin 15 = Vref pin 3 = 0.7V, pin 15 = OPEN R T = 4.42kΩ CT = 1nF pin 3 = 3.2V, pin 15 = Vref pin 3 = 3.2V, pin 15 = OPEN pin 3 = 2.02V, pin 15 = OPEN 45 90 37 40 3.0 1.0 VFB to GND VCOMP = VFB VCOMP = 2 to 4V VCC = 12 to 20V Isink = 2mA, VFB = 2.7V Isou rce = 0.5mA, VFB = 2.3V VCOMP > 4V, V FB = 2.3V VCOMP = 1.1V, V FB = 2.7V 5 0.5 2 2 6 1.3 6 4 8 Isen = 0 VCOMP = 5V 0.92 2.85 14 VSS = 0.6V DC = 0% 7 100 3 1.0 100 3 20 200 0.6 3.15 26 15 1.08 2.42 60 0.2 2.5 90 85 1.1 1.0 2.58 43 285 279 280 275 300 300 295 295 315 321 310 315 0 0 kHz kHz kHz kHz % % % % % V V µA V dB dB V V mA mA MHz V/µs µA V ns V/V µA µA V V ns 3/24 Line, Load, Temperature Vref = 0V VCC = 8.5V; Isink = 0.5mA 4.875 30 0.2 Test Condition Tj = 25°C; IO = 1mA VCC = 12 to 20V IO = 1 to 20mA Min. 4.925 Typ. 5.0 2.0 5.0 0.4 5.0 5.125 150 0.5 Max. 5.075 15 20 Unit V mV mV mV/°C V mA V REFERENCE SECTION Duty Cycle Accuracy Oscillator Ramp Peak Oscillator Ramp Valley ERROR AMPLIFIER SECTION Input Bias Current VI GOPL SVR V OL VOH IO Input Voltage Open Loop Gain Supply Voltage Rejection Output Low Voltage Output High Voltage Output Source Current Output Sink Current Unit Gain Bandwidth SR Ib IS Slew Rate Input Bias Current Maximum Input Signal Delay to Output Gain SOFT START ISSC ISSD VSSSAT VSSCLAMP SS Charge Current SS Discharge Current SS Saturation Voltage SS Clamp Voltage Internal Masking Time PWM CURRENT SENSE SECTION LEADING EDGE BLANKING L4990 - L4990A ELECTRICAL CHARACTERISTICS (continued.) Symbol OUTPUT SECTION V OL VOH VOUT CLAMP Output Low Voltage Output High Voltage Output Clamp Voltage Collector Leakage Fall Time Rise Time UVLO Saturation SUPPLY SECTION VCCON VCCOFF Vhys IS Iop Iq ISH VZ Startup voltage Minimum Operating Voltage Voltage After Turn-on Hysteresis Start Up Current Operating Current Quiescent Current Shutdown Current Zener Voltage I8 = 20mA Master Operation V1 I1 V1 I1 Vt Clock Amplitude Clock Source Current Sync Pulse Sync Pulse Current Fault Threshold Voltage Shutdown threshold ISOURCE = 0.8mA Vclock = 3.5V Slave Operation Low Level High Level VSYNC = 3.5V OVER CURRENT PROTECTION 1.1 2.4 1.2 2.5 1.3 2.6 V V DISABLE SECTION 3.5 0.8 1 V V mA 4 7 V mA Before Turn-on at: VCC = VCCON - 0.5V CT = 1nF, R T = 4.42kΩ, C O =1nF (After turn on), Co =0nF C T = 1nF, RT = 4.42kΩ, 100 21 IO = 250mA IO = 20mA; VCC = 12V IO = 200mA; VCC = 12V IO = 5mA; VCC = 20V VCC = 20V VC = 24V C O = 1nF C O = 2.5nF C O = 1nF C O = 2.5nF VCC = 0V to VCCON; Isink = 10mA L4990 L4990A L4990 L4990A L4990 L4990A 15 7.8 9 7 5.5 0.5 100 16 8.4 10 7.6 6 0.8 270 12 7.0 270 25 450 18 10 450 30 10 9 10.5 10 13 100 20 35 50 70 200 60 100 1.0 17 9 11 8.2 1.0 V V V V µA ns ns ns ns V V V V v V v µA mA mA µA V Parameter Test Condition Min. Typ. Max. Unit SYNCHRONIZATION SECTION F UNCTIONAL DESCRIPTION The I.C. contains a standard PWM current mode control section with improved performance with respect to the UC384X family. Enhanced features include start-up bias current reduced to < 270µA (typ), improved E/A performance (4MHz B/W, 1.3mA Source Current, highslew rate) accurate 1MHz oscillator, and also reduced propagation delays in the critical path from Current Sense to Output. ADDITIONAL FEATURES Soft Start (SS) An external capacitor is charged by an internal constant current source (20µA) to generate a SS signal which clamps the E/A output The SS pin doubles as a Fault Reset Delay function as described below. Current Limit / Reset Delay An internal high-speed current limit comparator 4/24 L4990 - L4990A referenced to 1.2V detects primary over-current conditions. On detection of an overcurrent fault the output is immediately shutdown and the fault is also latched. A Fault Reset Delay is implemented by discharging the external Soft Start (SS) timing capacitor before resetting the fault latch and initiating a softstart cycle. In case of a continuous fault condition the SS capacitor is charged to 5V before being discharged again, to ensure that the fault frequency does not exceed the programmed soft start frequency. Duty Cycle Limit A simple connection between the DC-LIM and the available Vref activates an internal T- FlipFlop limiting the DC to about 50%. If this pin is not connected or grounded, the limit of the duty cycle is extended to about 100% Duty Cycle Control Duty Cycle DC is externally programmed by setting a voltage between 1V (0% DC) and 3V (100% DC) at the DC pin. The programmed voltage is compared with the oscillator CT capacitor charging waveform to determine the maximum ON-time in each period. This function gives a fine control of DC. If this pin is floating the maximum duty cycle depends on DC-LIM status. Synchronization A SYNC pin eases Synchronization of the IC to the external world ( e.g. another IC working in parallel or to TV/monitor sync signal). In TV/monitor applications the timing components RT, CT are set for a frequency lower than the minimum TV sync frequency. When the TV circuit has powered-up it takes over and the system frequency is that of the SYNC. Duty Cycle is controllable using the DC function. In parallel operation of several IC’s no Master/Slave designation is required as the higher frequency IC is automatically the master. Controllers to be synchronized have their SYNC pins tied together and each SYNC pin operates as a bidirectional circuit. The first IC to drive its SYNC pin is the master and it initiates a discharge of the CT timing capacitor of every controller. The Sync input signal is edge-triggered and sets an internal ”sync latch” which ensures full discharge of CT. Disable Function The DIS pin performs a logic level latched-shutdown function. When pulled above 2.5V it shuts down the complete IC with a standby current of
L4990AD 价格&库存

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