L5994

L5994 L5994A ADJUSTABLE TRIPLE OUTPUT POWER SUPPLY CONTROLLER FEATURE ■ DUAL PWM CONTROLLERS ADJUSTABLE 1.9V to 5.3V(Section1) 1.6V to 3.5V(Section2) ■ AUXILIARY DRIVER FOR LINEAR REGULATOR ■ CURRENT MODE CONTROL USING A LOW SENSE RESISTOR ■ DUAL SYNC RECTIFIERS DRIVERS ■ "ONE SHOT" FEATURE (L5994A only) ■ 96% EFFICIENCY ACHIEVABLE ■ 50µA@12V STAND BY CONSUMPTION ■ 4.75V TO 25V OPERATING SUPPLY VOLTAGE ■ EXCELLENT LOAD TRANSIENT RESPONSE ■ "PULSE SKIPPING" FUNCTION ■ OUTPUT UNDER VOLTAGE SHUTDOWN ■ ADAPTATIVE ANTI SHOOT-THROUGH CONTROL ■ OVER/UNDER VOLTAGE DETECTION ■ POWER GOOD SIGNALS ■ SEPARATED DISABLE ■ THERMAL SHUTDOWN ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O TQFP32 ORDERING NUMBERS: L5994 L5994A APPLICATIONS ■ NOTEBOOK AND SUB NOTEBOOK COMPUTERS ■ 1.8V AND 2.5V I/O SUPPLY ■ WORDPAD ■ INTERNET APPLIANCE DESCRIPTION The device provides a dual PWM controller and a linear driver controller that can support the complete power management in mobile equipment with high efficiency. Figure 1. System Block Diagram 2.5V 5V to 25V L5994 SYNC POWER SECTION 1.8V 12V LDO 5.1V LDO POWER MANAGEMENT & SYSTEM SUPERVISOR µP MEMORY PERIPHERALS 3.39V REF POWER GOOD D98IN862 April 2002 1/26 L5994 - L5994A DESCRIPTION (continued) The device produces an adjustable regulated voltage in both sections and a linear regulated voltage with an external bipolar such as for PCMCIA applications. The auxiliary linear driver is able to source up to 1A for 12V bus and is also possible to use it for the regulation of 2.5V from 5V bus. Synchronous rectification and pulse skipping mode for the buck sections optimise the overall efficiency over a wide load current range. The two high performance PWM output sections are monitored for over voltage, under voltage and over current conditions. A POWER GOOD signal is provided for each section. On detection of a fault, the relevant POWER GOOD signal is generated and a specific shutdown procedure takes place to prevent physical damage and data corruption. A disable function allows to manage the output power sections separately, optimising the quiescent consumption of the IC in stand-by conditions. The internal architecture is a current mode that allows to have fast transient response without compromise the efficiency due to the ultra low sense resistor. Under voltage shutdown is forced in case of short circuit in one of the two sections. The drivers are provided of an adaptative anti cross conduction system for high output current application ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O ABSOLUTE MAXIMUM RATINGS Symbol Parameters Vin Power Supply Voltage Vi Maximum pin voltage to pins 1,24,25,32 Value Unit 0 to 27 V -0.3 to (Vin + 0.3) V Value Unit 60 °C/W -40 to 140 °C THERMAL DATA Symbol RTH j-amb Tj Parameters Thermal Resistance Junction to Ambient Operative Junction Temperature Range H2GATE H2SRC R2GATE PGND PREG5 R1GATE H1SRC H1GATE PIN CONNECTIONS (Top views) 32 31 30 29 28 27 26 25 H1STRAP 1 24 H2STRAP VIN 2 23 PWROK2 SREG5 3 22 VFBLIN V5SW 4 21 VDRLIN V1SNS 5 20 V2SNS I1SNS 6 19 I2SNS COMP1 7 18 COMP2 SOFT1 8 17 SOFT2 RUN2 OSC NOSKIP SGND VREF RUN1 CRST 2/26 PWROK1 9 10 11 12 13 14 15 16 D98IN863B L5994 - L5994A BLOCK DIAGRAM SOFT1 SOFT2 8 SLOPE I1SNS V1SNS COMP1 6 + ERROR SUMMING + 5 I1SNS + H1GATE 32 + ERROR SUMMING V1SNS V2SNS Hside LOGIC AND SHOOTTHROUGH CONTROL 19 20 - 18 + + + - - I2SNS V2SNS COMP2 - OVER CURRENT COMPARATOR ZERO CROSSING COMPARATOR SLOPE + I2SNS OVER CURRENT COMPARATOR VREF 1 SOFT ∑ - H1STRAP SOFT ∑ - 7 17 VREF 24 Hside ZERO CROSSING COMPARATOR LOGIC AND SHOOTTHROUGH CONTROL 25 H2STRAP H2GATE ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O H1SRC R1GATE PREG5 W5SW VIN 31 REG5 30 Lside VREF SGND + - - PULSE SKIPPING COMPARATOR PULSE SKIPPING COMPARATOR + + - - 26 PREG5 Lside 27 28 H2SRC R2GATE PGND 29 LINEAR REGULATOR 4 21 2 + OVERVOLT COMPARATOR - SREG5 + 12 VREF BUFFER - V5SW + SWITCH COMPARATOR 3 UNDERVOLT COMPARATOR VREF 4.7V + - OSCILLATOR & SYNCHRONIZATION VREF 13 16 RUN2 10 14 RUN1 PWROK1 11 NOSKIP REG12 LDO 22 POWER MANAGEMENT & SYSTEM SUPERVISOR 9 VDRLIN 15 VFBLIN OSC 23 D98IN864A CRST PWROK2 ELECTRICAL CHARACTERISTICS (Vin = 12V; Tj = 25°C; Vosc = GND; unless otherwise specified.) Symbol Parameter Test Condition Min. Typ. Max. Unit 25 V 1.1 1.4 mA 50 60 90 100 µA µA 1.81 1.89 1.97 V 37 50 63 mV DC CHARACTERISTIC Vin Input supply voltage V1out,4V I2 Operating quiescent current R1GATE= R2GATE = OPEN H1GATE = H2GATE = OPEN RUN1= RUN2 = SREG5 (DRIVERS OFF) I2 Stand by current RUNQ=RUN2=GND NOSKIP=GND Vin=12V Vin=20V 4.75 SECTION 1 PWM CONTROLLER V1out V1SNS feedback voltage V in = 5V to 20V NOSKIP = REG5 Vi1sns-Vv1sns = 0 to 40mA V6-V5 Overcurrent Threshold current VSOFT1 = 3.1V V6-V5 Pulse skipping mode threshold voltage Vin > 6.8V Vin < 5.8V 13 6.5 mV mV 3/26 L5994 - L5994A ELECTRICAL CHARACTERISTICS (continued) Symbol V5 Parameter Test Condition Min. Typ. Max. Unit Over voltage threshold ON V1SNS 2.09 2.15 2.21 V Under voltage threshold ON V1SNS 1.66 1.71 1.76 V 1.566 1.64 1.714 V 37 50 63 mV 13 uc mV SECTION 2 PWM CONTROLLER V2SNS feedback voltage Vin = 5V to 20V NOSKIP = REG5 Vi2sns-Vv2sns = 0 to 40mA V19-V20 Overcurrent Threshold current VSOFT2 = 3.1V V19-V20 Pulse skipping mode threshold voltage Vin > 6.8V V2out Over voltage threshold ON V2SNS V20 1.843 t e l o PWM CONTROLLERS CHARACTERISTICS fOSC Switching frequency accuracy V15 Voltage range for 300KHz operation Td Dead time Tov Over voltage propagation time Tuv Under voltage propagation time t e l o bs I8,I17 O s ( t c HS rise LS rise d o r 300 200 2.4 V 1.541 V 345 230 KHz 2.6 V 50 30 ns 1.25 µs V1SNS to PWROK or V2SNS to PWROK 1.5 µs Respect output voltage 65 70 75 % 3.2 4 4.8 µA Soft start clamp voltage t e l o uc 1.496 P e let 255 170 o s b O - r P e Soft start current V8,V17 u d o 1.451 ) s t( 1.957 V1SNS to PWROK or V2SNS to PWROK ) s ( ct Output UVLO threshold latched s b O OSC = 2.5V OSC = GND OR 5V )- u d o V5,V20 1.9 P e Under voltage threshold ON V2SNS r P e d o r ) s ( t 3.1 V HIGH AND LOW SIDE GATE DRIVER (BOTH SECTIONS) I25,I27 I32,I30 Source output peak current Cload = 3.3nF 1 A Sink output peak current C load = 3.3nF 1 A RH RdsON resistance Driver out high 2.1 4 Ohm RL RdsON resistance Driver out low 1.5 3 Ohm Output high voltage HSTRAP = PREG5 Isource = 10mA; HSOURCE = GND 5.3 5.61 V s b O VOH 4/26 4.4 L5994 - L5994A ELECTRICAL CHARACTERISTICS (continued) Symbol VOL Parameter Test Condition Output low voltage Min. Typ. Max. Unit HSTRAP = PREG5 Isource = 10mA; HSOURCE = GND 0.5 V 30 mA 2.56 V 20 V 2 µA LINEAR REGULATOR DRIVER SECTION Imax Driver current VFBLIN < 2.5V Vref VFBLIN threshold VDRLIN = 15V VDRLIN Input voltage range IFBLIN Bias Current VCP 2.44 4.5 Input voltage clamp Iclamp = 100µA 16 “One Shot” activation threshold (L5994A only) VDRLIN falling 12.88 e t e l INTERNAL REGULATOR DRIVER SECTION V29 VREG5 output voltage V in = 7 to 25V I29 Totale current capability VPREG5 = 5.3V Vin = 7V Swith-over threshold voltage Vin > 7V, V5SW fall V12 O ) s ( t c Reference voltage I load = 1mA Vin = 5 to 20V Iload = 1 to 5mA du I12 Source current at reference voltage o r P o s b b O - so e t le 5.3 V 1.5 µs 5.5 V ) s t( 25 70 mA 4.2 4.53 4.8 V 2.45 2.425 2.5 2.5 2.55 2.575 V 15 mA V12 = Vref-0.3V ) s ( ct V 14.52 c u d o r P 5.0 ) s ( t uc od 13.7 Pr “One Shot” Pulse (L5994A only) V5SW 2.5 POWER GOOD AND ENABLE FUNCTION e t e l V16,V11 so V16,V11 b O T10 du RUN1, RUN2, enable voltage o r P e s b O 2.4 RUN1, RUN2, disable voltage Low level Power good delay CRST=100nF 115 Shutdown delay time before LS activation (except for over voltage fault) CRST=100nF 115 CRST timing rate V12 = Vref-0.3V Power good high level I POWEROK = 40µA Power good low level I POWEROK = 320µA t e l o T27,T30 High level V 0.8 V 147 180 ms 147 180 ms 1.47 ms/nF 4.1 V 0.4 V SYNCHRONIZATION V15 Synchronization pulse width Fsw = 1MHz Synchronization input voltage (falling edge) IPOWEROK = 320µA 400 ns 5 V 5/26 L5994 - L5994A PIN DESCRIPTION N° Name Function 1 H1STRAP Section 1 bootstrap capacitor connection. A bootstrap capacitor must be connected between this pin and pin H1SRC to supply the H1GATE driver. 2 Vin 3 SREG5 Internal logic supply. It must be connected to PREG5 pin through a R-C low-pass filter. 4 V5SW Alternative supply voltage for the internal 5V regulator. If its voltage is greater than 4.5V, the internal regulator is supplied via this pin. If left floating, the regulator is supplied through the Vin pin. Device supply voltage. ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O 5 V1SNS This pin connects the (-) input of section 1 current sense comparator. It must be connected downstream the external RSENSE resistor. 6 I1SNS This pin connects the (+) input of section 1 current sense comparator. It must be connected upstream the external RSENSE resistor. 7 COMP1 Feedback input for section 1. It must be connected directly or through a resistor divider to the output of the section 1. 8 SOFT1 Soft start connection for section 1. The soft start time is programmed by an external capacitor connected between this pin and SGND. Approximatively 0.7ms/nF. 9 CRST Used for start-up and shut-down timing. A capacitor must be connected between this pin and SGND defining a time of 1.47ms/nF. 10 PWROK1 11 RUN1 Control input to enable / disable the section 1. A high logic level (>2.4V) enables this section, a low level (2.4V) disables pulse skipping at low load current, a low level (2.4V) enables this section, a low level (