L6226Q_10

L6226Q DMOS dual full bridge driver Features ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Operating supply voltage from 8 to 52 V 2.8 A output peak current (1.4 A DC) RDS(on) 0.73 Ω typ. value @ TJ = 25 °C Operating frequency up to 100 kHz Programmable high side overcurrent detection and protection Diagnostic output Paralleled operation Cross conduction protection Thermal shutdown Under voltage lockout Integrated fast free wheeling diodes Description The L6226Q is a DMOS dual full bridge designed for motor control applications, realized in BCDmultipower technology, which combines isolated DMOS power transistors with CMOS and bipolar circuits on the same chip. Available in QFN32 5x5 package, the L6226Q features thermal shutdown and a non-dissipative overcurrent detection on the high side power MOSFETs plus a diagnostic output that can be easily used to implement the overcurrent protection. Applications ■ ■ Bipolar stepper motor Dual or quad DC motor Figure 1. Block diagram VBOOT VBOOT VBOOT VCP PROGCLA OCDA OCDA CHARGE PUMP OVER CURRENT DETECTION 10V 10V VBOOT VSA OUT1A OUT2A THERMAL PROTECTION ENA IN1A IN2A VOLTAGE REGULATOR OCDB OCDB PROGCLB ENB IN1B IN2B GATE LOGIC OVER CURRENT DETECTION 10V 5V GATE LOGIC SENSEA BRIDGE A VSB OUT1B OUT2B SENSEB BRIDGE B D99IN1088A August 2010 Doc ID 14335 Rev 5 1/29 www.st.com 29 Contents L6226Q Contents 1 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 1.2 1.3 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 3 4 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.1 4.2 4.3 4.4 4.5 Power stages and charge pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Logic inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Non-dissipative overcurrent detection and protection . . . . . . . . . . . . . . . 12 Thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5 6 7 8 9 10 11 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Paralleled operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Output current capability and IC power dissipation . . . . . . . . . . . . . . 23 Thermal management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 2/29 Doc ID 14335 Rev 5 L6226Q Electrical data 1 1.1 Table 1. Symbol VS VOD Electrical data Absolute maximum ratings Absolute maximum ratings Parameter Supply voltage Differential voltage between VSA, OUT1A, OUT2A, SENSEA and VSB, OUT1B, OUT2B, SENSEB OCD pins voltage range PROGCL pins voltage range Bootstrap peak voltage Input and enable voltage range Voltage range at pins SENSEA and SENSEB Pulsed supply current (for each VS pin), internally limited by the overcurrent protection VSA = VSB = VS, tPULSE < 1 ms VSA = VSB = VS Parameter VSA = VSB = VS VSA = VSB = VS = 60 V, VSENSEA = VSENSEB = GND Value 60 60 -0.3 to + 10 -0.3 to + 7 VS + 10 -0.3 to + 7 -1 to + 4 Unit V V V V V V V OCDA,OCDB PROGCLA, PROGCLB VBOOT VIN,VEN VSENSEA, VSENSEB IS(peak) IS Tstg, TOP 3.55 1.4 -40 to 150 A A °C RMS supply current (for each VS pin) VSA = VSB = VS Storage and operating temperature range 1.2 Table 2. Symbol VS VOD VSENSEA, VSENSEB IOUT TJ fsw Recommended operating conditions Recommended operating conditions Parameter Supply voltage Differential voltage between VSA, OUT1A, OUT2A, SENSEA and VSB, OUT1B, OUT2B, SENSEB Voltage range at pins SENSEA and SENSEB RMS output current Operating junction temperature Switching frequency -25 Parameter VSA = VSB = VS VSA = VSB = VS, VSENSEA = VSENSEB (pulsed tW < trr) (DC) -6 -1 Min 8 Max 52 52 6 1 1.4 +125 100 Unit V V V V A °C kHz Doc ID 14335 Rev 5 3/29 Electrical data L6226Q 1.3 Thermal data Table 3. Symbol Rth(JA) Thermal data Parameter Thermal resistance junction-ambient max. (1) 2 Value 42 Unit °C/W 1. Mounted on a double-layer FR4 PCB with a dissipating copper surface of 0.5 cm on the top side plus 6 cm2 ground layer connected through 18 via holes (9 below the IC). 4/29 Doc ID 14335 Rev 5 L6226Q Pin connection 2 Pin connection Figure 2. Pin connection (top view) Note: 1 2 The pins 2 to 8 are connected to die PAD. The die PAD must be connected to GND pin. Doc ID 14335 Rev 5 5/29 Pin connection Table 4. N° 1, 21 9 11 L6226Q Pin description Pin GND OUT1B OCDB Type GND Signal ground terminals. Function Power output Bridge B output 1. Open drain output Power supply Logic input Logic input Bridge B overcurrent detection and thermal protection pin. An internal open drain transistor pulls to GND when overcurrent on bridge B is detected or in case of thermal protection. Bridge B source pin. This pin must be connected to power ground directly or through a sensing power resistor. Bridge B input 1 Bridge B input 2 Bridge B overcurrent level programming. A resistor connected between this pin and ground sets the programmable current limiting value for the bridge B. By connecting this pin to ground the maximum current is set. This pin cannot be left non-connected. Bridge B enable. LOW logic level switches OFF all power MOSFETs of bridge B. If not used, it has to be connected to +5 V. Bootstrap voltage needed for driving the upper power MOSFETs of both bridge A and bridge B. 12 13 14 SENSEB IN1B IN2B 15 PROGCLB R pin 16 ENB Logic input Supply voltage 17 19 20 22 23 24 25 VBOOT OUT2B VSB VSA OUT2A VCP ENA Power output Bridge B output 2. Power supply Power supply Bridge B power supply voltage. It must be connected to the supply voltage together with pin VSA. Bridge A power supply voltage. It must be connected to the supply voltage together with pin VSB. Power output Bridge A output 2. Output Logic input Charge pump oscillator output. Bridge A enable. LOW logic level switches OFF all power MOSFETs of bridge A. If not used, it has to be connected to +5 V. Bridge A overcurrent level programming. A resistor connected between this pin and ground sets the programmable current limiting value for the bridge A. By connecting this pin to ground the maximum current is set. This pin cannot be left non-connected. Bridge A logic input 1. Bridge A logic input 2. Bridge A source pin. This pin must be connected to power ground directly or through a sensing power resistor. Bridge A overcurrent detection and thermal protection pin. An internal open drain transistor pulls to GND when overcurrent on bridge A is detected or in case of thermal protection. 26 PROGCLA R pin 27 28 29 IN1A IN2A SENSEA Logic input Logic input Power supply Open drain output 30 31 OCDA OUT1A Power output Bridge A output 1. 6/29 Doc ID 14335 Rev 5 L6226Q Electrical characteristics 3 Electrical characteristics TA = 25 °C, Vs = 48 V, unless otherwise specified Table 5. Symbol VSth(ON) VSth(OFF) IS TJ(OFF) Electrical characteristics Parameter Turn-on threshold Turn-off threshold Quiescent supply current Thermal shutdown temperature All bridges OFF; TJ = -25 °C to 125 °C (1) Test condition Min 5.8 5 Typ 6.3 5.5 5 165 Max 6.8 6 10 Unit V V mA °C Output DMOS transistors RDS(on) High-side + low-side switch ON resistance Leakage current TJ = 25 °C TJ = 125 °C (1) 1.47 2.35 1.69 2.70 2 -0.3 Ω Ω mA mA IDSS EN = Low; OUT = VS EN = Low; OUT = GND Source drain diodes VSD trr tfr Logic input VIL VIH IIL IIH Vth(ON) Vth(OFF) Vth(HYS) Low level logic input voltage High level logic input voltage Low level logic input current High level logic input current Turn-on input threshold Turn-off input threshold Input threshold hysteresis 0.8 0.25 GND logic input voltage 7 V logic input voltage 1.8 1.3 0.5 -0.3 2 -10 10 2.0 0.8 7 V V µA µA V V V Forward ON voltage Reverse recovery time Forward recovery time ISD = 2.8 A, EN = LOW If = 1.4 A 1.15 300 200 1.3 V ns ns Switching characteristics tD(on)EN tD(on)IN tRISE tD(off)EN tD(off)IN tFALL Enable to out turn ON delay time (2) Input to out turn ON delay time Output rise time (2) Enable to out turn OFF delay time Input to out turn OFF delay time Output fall time (2) (2) ILOAD =1.4 A, resistive load ILOAD =1.4 A, resistive load (dead time included) ILOAD =1.4 A, resistive load ILOAD =1.4 A, resistive load ILOAD =1.4 A, resistive load ILOAD =1.4 A, resistive load 500 1.9 40 500 500 40 800 800 800 ns µs 250 1000 1000 250 ns ns ns ns Doc ID 14335 Rev 5 7/29 Electrical characteristics Table 5. Symbol tdt fCP L6226Q Electrical characteristics (continued) Parameter Dead time protection Charge pump frequency -25 °C < TJ < 125 °C Test condition Min 0.5 Typ 1 0.6 1 Max Unit µs MHz Over current detection Input supply over current detection threshold Open drain ON resistance OCD turn-on delay time OCD turn-off delay time (3) (3) Is over ROPDR tOCD(ON) tOCD(OFF) -25 °C