L6360

L6360 Datasheet IO-Link communication master transceiver IC Features • • • • • • • • Supply voltage from 18 V to 32.5 V Programmable output stages: high-side, low-side or push-pull (< 2 Ω) Up to 500 mA L+ protected high-side driver COM1, COM2 and COM3 mode supported Additional IEC61131-2 type 1 input Short-circuit and overcurrent output protection through current limitation and programmable cut-off current 3.3 V / 5 V, 50 mA linear regulator 5 mA IO-Link digital input • • • • • • • Fast mode I2C for IC control, configuration and diagnostic Diagnostic dual LED sequence generator and driver 5 V and 3.3 V compatible I/Os Overvoltage protection (> 36 V) Overtemperature protection ESD protection Miniaturized VFQFPN 26L (3.5x5x1 mm) package Applications Product status link L6360 Product summary Order code L6360TR Package VFQFPN 26L (3.5x5x1 mm) Packing Tape and reel Product label • • • Industrial sensors Factory automation Process control Description The L6360 is a monolithic IO-Link master port compliant with PHY2 (3-wire) supporting COM1 (4.8 kbaud), COM2 (38.4 kbaud) and COM3 (230.4 kbaud) modes. The C/QO output stage is programmable: high-side, low-side or push-pull; also cut-off current, cut-off current delay time, and restart delay are programmable. Cut-off current and cut-off current delay time, combined with thermal shutdown and automatic restart, protect the device against overload and short-circuit. C/QO and L+ output stages are able to drive resistive, inductive and capacitive loads. Inductive loads up to 10 mJ can be driven. Supply voltage is monitored and low voltage conditions are detected. The L6360 transfers, through the PHY2(C/QO pin), data received from a host microcontroller through the USART (IN C/QO pin), or to the USART (OUT C/QI pin) data received from PHY2 (C/QI pin). To enable full IC control, configuration and monitoring (i.e. fault conditions stored in the status register), the communication between the system microcontroller and the L6360 is based on a fast mode 2-wire I2C. The L6360 has nine registers to manage the programmable parameters and the status of the IC. Monitored fault conditions are: L+ line, overtemperature, C/Q overload, linear regulator undervoltage, and parity check. Internal LED driver circuitries, in open drain configuration, provide two programmable sequences to drive two LEDs. DS8900 - Rev 8 - July 2021 For further information contact your local STMicroelectronics sales office. www.st.com L6360 Block diagram 1 Block diagram Figure 1. Block diagram V DD VH SEL LINEAR REGULATOR EN L+ Rbias VCC BIAS EN C/Q IN C/Q L+ DIGITAL INTERFACE OUTC/Q Config. digital filter OUTI/Q C/Q I SDA SCL 2 I C INTERFACE C/Q O SA0 SA1 L- SA2 Config. digital filter LED1 LEDs LED2 I/Q UNDERVOLTAGE CONTROL IRQ Overtemperature CONFIGURATION / CONTROL / DIAGNOSTIC RST DS8900 - Rev 8 Protection page 2/61 L6360 Pin configuration 2 Pin configuration Figure 2. Pin connection (top through view) C/QO C/QI 26 25 I/Q L+ VCC 24 23 22 VCC 1 21 L- L- 2 20 LED2 VH 3 19 LED1 VDD 4 18 SA0 SA1 5 17 RST SA2 6 16 SDA Rbias 7 15 SCL SEL 8 14 IRQ EP 9 10 11 12 13 ENC/Q INC/Q OUTC/Q OUTI/Q ENL + Table 1. Pin description Number DS8900 - Rev 8 Name Function Type 1, 22 VCC IC power supply Supply 2, 21 L- L- line (IC ground) Supply 3 VH Linear regulator supply voltage Supply 4 VDD Linear regulator output voltage Output 5 SA1 Serial address 1 Input 6 SA2 Serial address 2 Input 7 Rbias External resistor for internal reference generation Input 8 SEL Linear regulator 3.3 V/5 V voltage selection. Output is 5 V when SEL pin is pulled to GND Input 9 ENC/Q C/Q output enable Input 10 INC/Q C/Q channel logic input Input 11 OUTC/Q C/Q channel logic output Output 12 OUTI/Q I/Q channel logic output Output 13 ENL+ L+ switch enable. When ENL+ is high the switch is closed Input 14 IRQ Interrupt request signal (open drain) Output 15 SCL Serial clock line Input 16 SDA Serial data line Input/output 17 RST Reset - active low Input 18 SA0 Serial address 0 Input 19 LED1 Status/diagnostic LED (open drain) Output 20 LED2 Status/diagnostic LED (open drain) Output page 3/61 L6360 Pin configuration Number DS8900 - Rev 8 Name Function Type 23 L+ L+ line Supply 24 I/Q I/Q channel line Input 25 C/QI Transceiver (C/Q channel) line Input 26 C/QO Transceiver (C/Q channel) line Output EP Exposed Pad Connect to IC ground on the application board - page 4/61 L6360 Absolute maximum ratings 3 Absolute maximum ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VCC Supply voltage VCLAMP VSEL Linear regulator selection pin voltage -0.3 to 4 VDD Linear regulator output voltage 5.5 VH Linear regulator input voltage VCC VSDA, VSCL, VSA0, VSA1, VSA2 I2C voltage -0.3 to VDD + 0.3 VLED1,2 LED1,2 voltage -0.3 to VDD + 0.3 VC/QI, VI/Q C/QI, I/Q voltage -0.3 to VCC + 0.3 VRST Reset voltage -0.3 to VDD + 0.3 VIRQ IRQ voltage -0.3 to VDD + 0.3 VRbias External precision resistance voltage -03 to 4 VESD Electrostatic discharge (human body model) 2000 ICLAMP Current through VCLAMP in surge test (1 kV, 500 Ω) condition 2 A IC/QO, IL+ C/QO, L+ current (continuous) Internally limited A IOUTC/Q, IOUTI/Q OUTC/Q, OUTI/Q output current ±5 mA ISDA I2C transmission data current (open drain pin) 10 mA IRQ Interrupt request signal current 2(1) A ILED1,2 LED1, 2 current 10 mA Eload L+ demagnetization energy 10 mJ PTOT Power dissipation at TC = 25 °C Internally limited W PLR Linear regulator power dissipation 200 mW TJ Junction operating temperature Internally limited TSTG Storage temperature range -55 to 150 V °C 1. Peak value during fast transient test only. DS8900 - Rev 8 page 5/61 L6360 Recommended operating conditions 4 Recommended operating conditions Table 3. Recommended operating conditions Symbol Parameter Min. VCC Supply voltage VH Linear regulator input voltage fSCL SCL clock frequency Rbias Precision resistance -0.1% TJ Junction temperature -40 Typ. Max. Unit 18 32.5 V 7 VCC V 400 kHz 0.1% kΩ 125 °C 124 Table 4. Thermal data Symbol Parameter Typ. Unit Rthj-case Thermal resistance, junction-to-case 6 °C/W Rthj-amb Thermal resistance, junction-to-ambient(1) 50 °C/W 1. Mounted on FR4 PCB with 2 signal Cu layers and 2 power Cu layers interconnected through vias. DS8900 - Rev 8 page 6/61 L6360 Electrical characteristics 5 Electrical characteristics (18 V < VCC < 30 V; -40 °C < TJ < 125 °C; VDD = 5 V; unless otherwise specified). Table 5. Supply Symbol VCLAMP Voltage clamp Test conditions Min. I = 5 mA 36 Typ. Max. Unit V VUV Undervoltage on threshold 16 17 VUVH Undervoltage hysteresis 0.3 1 18 V V VREGLN5H Linear regulator undervoltage high threshold SEL = L 4.3 4.7 VREGLN5L Linear regulator undervoltage low threshold SEL = L 3.6 4.2 VREG5HYS Linear regulator undervoltage hysteresis SEL = L 0.1 VREGLN33H Linear regulator undervoltage high threshold SEL = H 2.8 3.1 VREGLN33L Linear regulator undervoltage low threshold SEL = H 2.5 2.7 VREG33HYS Linear regulator undervoltage hysteresis SEL = H 0.1 V V V VQTHH C/QI and I/Q upper voltage threshold 10.5 12.9 V VQTHL C/QI and I/Q lower voltage threshold 8 11.4 V VQHY C/Q and I/Q hysteresis voltage 1 Vdemag I = 5 mA VfHS C/Q high-side freewheeling diode forward voltage I = 10 mA 0.5 V VfLS C/Q low-side freewheeling diode forward voltage I = 10 mA 0.5 V VLTHY VLTHON IS IOFFCQ ICOQ L+ line diagnostic lower threshold -8.5 V L+ demagnetization voltage VLTHOFF DS8900 - Rev 8 Parameter -6.5 9 10 L+ line diagnostic hysteresis 0.1 1 L+ line diagnostic upper threshold 10 11 Supply current OFF-state C/QO current C/QO low- and high-side cut-off current mA ENC/Q = 0, VC/Q = 0 V Programmable 1 115 190 150 220 300 290 350 440 430 580 720 480 ILIML L+ limitation current ENL+ = 0, VL+ = 0 V Programmable IOUT = 0.2 A at TJ = 25 °C μA 70 L+ cut-off current L+ high-side ON-state resistance V 4 ICOL RONL 12 ON-state VCC at 32.5 V L+ OFF-state current I/Q pull-down current V μA IOFFL IINI/Q V 100 C/QO low- and high-side limitation current C/QI pull-down current 11 V OFF-state ILIMQ IINC/Qi -4.8 mA 500 1600 mA 0 200 μA 730 mA 500 1600 mA 5 6.5 mA 2 3.3 mA 2 3 mA 580 1 Ω page 7/61 L6360 Electrical characteristics Symbol RONL Parameter L+ high-side ON-state resistance RONCQH C/QO high-side ON-state resistance RONCQL C/QO low-side ON-state resistance Test conditions Min. Typ. IOUT = 0.2 A at TJ = 125 °C Max. Unit 2 IOUT = 0.2 A at TJ = 25 °C Ω 1 IOUT = 0.2 A at TJ = 125 °C Ω 2 IOUT = 0.2 A at TJ = 25 °C Ω 0.6 IOUT = 0.2 A at TJ = 125 °C Ω 1.2 Ω Push-pull (CQO rising edge) 140 ns Push-pull (CQO falling edge) 160 ns Push-pull (CQO rising edge) 110 ns Push-pull (CQO falling edge) 225 ns tdINC/Q INC/Q to C/QO propagation delay time tENC/Q ENC/Q to C/QO propagation delay time trPP C/Q rise time in push-pull configuration 10% to 90% 250 860 ns tfPP C/Q fall time in push-pull configuration 10% to 90% 290 860 ns trHS C/Q rise time in high-side configuration 410 ns tfHS C/Q fall time in high-side configuration 700 ns trLS C/Q rise time in low-side configuration 750 ns tfLS C/Q fall time in low-side configuration 530 ns tENL ENL to L+ propagation delay time 1 μs trL+ L+ rise time 3 μs tfL+ L+ fall time 25 μs C/QI to OUTC/Q (falling) propagation delay time 40 ns C/QI to OUTC/Q (rising) propagation delay time 100 ns I/Q to OUTI/Q (falling) propagation delay time 40 ns I/Q to OUTI/Q (rising) propagation delay time 100 ns 100 μs 150 μs 200 μs 250 μs tdC/Qi tdI/Q tdcoq trcoq C/QO low- and high-side cut-off current delay time C/QO restart delay time Programmable Programmable 255 × tdcoq Latched μs 0 tdbq C/QI debounce time Programmable 5 20 μs 100 0 tdbl I/Q debounce time Programmable 5 20 μs 100 DS8900 - Rev 8 tdcol L+ cut-off current delay time Programmable trcol L+ restart delay time Programmable 500 0 64 μs ms page 8/61 L6360 Electrical characteristics Symbol Parameter Test conditions Min. Typ. Max. Unit trcol L+ restart delay time TJSD Junction temperature shutdown 150 °C TJHYST Junction temperature thermal hysteresis 20 °C TJRST Junction temperature restart threshold 130 °C Programmable Latched 1. Unlatch through I2C communication. Table 6. Electrical characteristics - linear regulator Symbol Parameter Test conditions Min. Typ. Max. Unit VDD Linear regulator output voltage SEL = L 4.84 5 5.13 V SEL = H 3.22 3.3 3.37 V ILIMR Linear regulator output current limitation 65 mA Table 7. Electrical characteristics - logic inputs and outputs Symbol Parameter Test conditions Min. Typ. Max. Unit VIL Input low-level voltage 0.8 V VIH Input high-level voltage VIHIS Input hysteresis voltage IIN Input current VIN = 5 V 1 μA VOL Output low-level voltage IOUT = -2 mA 0.5 V VOH Output highlevel voltage IOUT = 2 mA VLIRQ Open drain output low-level voltage IOUT = 2 mA 2.2 V 0.2 V VDD - 0.5 V V 0.5 V Max. Unit 0.5 V Table 8. Electrical characteristics - LED driving Symbol Parameter Test conditions VLED1,2 Open drain output low-level voltage ILED = 2 mA ILED LED1, 2 leakage current VLED1 = VLED2 =5V Min. Typ. 3 nA Table 9. Electrical characteristics - I2C (fast mode) DS8900 - Rev 8 Symbol Parameter VIL(SDA) SDA high level input voltage Test conditions Min. Max. Unit 0.3 V page 9/61 L6360 Electrical characteristics Note: Symbol Parameter VIH(SDA) SDA high level input voltage VIL(SCL) SCL low level input voltage VIH(SCL) SCL high level input voltage IIN I2C SDA, SCL input current tr(SDA) Test conditions Min. Max. 0.7 x VDD V 0.3 0.7 x VDD (0.1 x VDD)