L6377
0.5 A high-side driver quad intelligent power switch
Datasheet - production data
Protection against surge transient
(IEC 61000-4-5)
Immunity against burst transient
(IEC 61000-4-4)
Features
Description
This device is a monolithic intelligent power
switch in multipower BCD technology to drive
inductive, capacitive or resistive loads. Diagnostic
for CPU feedback and extensive use of electrical
protections make this device robust and suitable
for general purpose industrial applications.
Multipower BCD technology
0.5 A output current
8 to 35 V supply voltage range
External programmable current limit
Non-dissipative overcurrent protection
Thermal shutdown
Undervoltage lockout with hysteresys
Diagnostic output for undervoltage,
overtemperature and overcurrent
External asynchronous reset input
Presettable delay for overcurrent diagnostic
Open ground protection
July 2015
Table 1: Device summary
Order code
L6377D
Packing
Tube
SO-14L
L6377D013TR
DocID1637 Rev 5
This is information on a product in full production.
Package
Tape and reel
1/19
www.st.com
Contents
L6377
Contents
1
Pin connections ............................................................................... 5
2
Maximum ratings ............................................................................. 6
3
Electrical characteristics ................................................................ 7
3.1
Schematic diagram ........................................................................... 9
3.2
Input section .................................................................................... 10
3.3
Overtemperature protection ............................................................ 10
3.4
Undervoltage protection .................................................................. 10
4
Overcurrent operation ................................................................... 11
5
Demagnetization of inductive loads ............................................. 13
6
Package information ..................................................................... 15
6.1
7
2/19
SO-14L package information........................................................... 15
Revision history ............................................................................ 18
DocID1637 Rev 5
L6377
List of tables
List of tables
Table 1: Device summary ........................................................................................................................... 1
Table 2: Pin description .............................................................................................................................. 5
Table 3: Absolute maximum ratings ........................................................................................................... 6
Table 4: Thermal data ................................................................................................................................. 6
Table 5: Electrical characteristics ............................................................................................................... 7
Table 6: SO-14L package mechanical data ............................................................................................. 16
Table 7: Document revision history .......................................................................................................... 18
DocID1637 Rev 5
3/19
List of figures
L6377
List of figures
Figure 1: Pin connections (top view) ........................................................................................................... 5
Figure 2: Block diagram .............................................................................................................................. 9
Figure 3: Undervoltage comparator hysteresis ........................................................................................... 9
Figure 4: Switching waveforms ................................................................................................................. 10
Figure 5: Short-circuit operation waveforms ............................................................................................. 11
Figure 6: Input comparator hysteresis ...................................................................................................... 13
Figure 7: External demagnetisation circuit (versus ground) ..................................................................... 13
Figure 8: External demagnetisation circuit................................................................................................ 14
Figure 9: SO-14L package outline ............................................................................................................ 15
Figure 10: SO-14L recommended footprint outline .................................................................................. 17
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L6377
1
Pin connections
Pin connections
Figure 1: Pin connections (top view)
N.C.
1
14
N.C.
GND
2
13
RESET
OUT
3
12
IN+
VS
4
11
DIAG
R SC
5
10
ON DELAY
N.C.
6
9
N.C.
N.C.
7
8
N.C.
GIPG1707151238LM
D96IN368
Table 2: Pin description
Pin
Pin name
Function
1, 6, 7, 8, 9,
14
N.C.
Not connected
2
GND
Ground pin
3
OUT
High-side output. Controlled output with current limitation
4
VS
Supply voltage. Range with undervoltage monitoring
5
RSC
Current limiting setting
10
ON
DELAY
Delay setting for overcurrent diagnostic
11
DIAG
Diagnostic open drain output for overtemperature, undervoltage and
overcurrent
12
IN+
Comparator non-inverting input
13
RESET
Asynchronous reset input
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5/19
Maximum ratings
2
L6377
Maximum ratings
Table 3: Absolute maximum ratings
Symbol
Value
Unit
Pin 4: supply voltage (tw ≤ 10 ms)
50
V
Pin 4: supply voltage (DC)
40
V
VS- VOUT
Pin 4 vs 3: supply to output
differential voltage
Internally limited
V
Vod
Pin 10: externally forced voltage
-0.3 to 7
V
Iod
Pin 10: externally forced current
±1
mA
IRESET
Pin 13: reset input current
(forced)
±2
mA
VRESET
Pin 13: reset input voltage
-0.3 to 40
V
Iout
Pin 3: output current
Internally limited
Vout
Pin 3: output voltage
Internally limited
W
Eil
Total energy inductive load: (TJ =
125 °C
50
mJ
Ptot
Power dissipation
Internally limited
Vdiag
Pin 11: external voltage
-0.3 to 40
V
Idiag
Pin 11: externally forced current
-10 to 10
mA
Ii
Pin 12: input current
20
mA
Vi
Pin 12: input voltage
-10 to Vs+0.3
V
Top
Ambient temperature, operating
range
-25 to 85
°C
TJ
Junction tmperature, operating
range
-25 to 125
°C
Tstg
Storage temperature
-55 to 150
°C
Vs
Parameter
Table 4: Thermal data
Symbol
Rth(JA)
6/19
Parameter
Value
Unit
Thermal resistance junction-ambient
150 max.
°C/W
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L6377
3
Electrical characteristics
Electrical characteristics
VS = 24 V; TJ = -25 to 125 °C, unless otherwise specified
Table 5: Electrical characteristics
Symbol
Pin
Parameter
Test conditions
Min.
Typ.
Max.
Unit
35
V
35
V
8
V
700
mV
DC operation
Supply voltage for valid
diagnostic
Vsmin
VS
Vsth
4
Idiag ≥ 0.5 mA;
Vdiag = 1.5 V;
Operative supply voltage
8
Undervoltage lower
treshold
7
Undervolatge hysteresis
Vshys
Iq
4
Quiescent current
Iqo
300
800
μA
Output on
1.6
mA
Input threshold voltage
0.8
Viths
Input threshold hysteresis
Input low level voltage
12
Vih
Input high level voltage
Iib
Input bias current
500
Output pen
Vith
Vil
24
2
V
50
400
mV
-7
0.8
V
VS < 18 V
2
VS-3
VS >18 V
2
15
-250
250
μA
2
V
Vi = -7 to 15 V
1.3
V
Reset threshold voltage
0.8
Reset low level voltage
0
0.8
V
Vrh
Reset high level voltage
2
40
V
Irb
Reset pull down current
Vrth
Vrl
13
1.3
5
μA
Delay capacitor charging
current
ON delay pin
shorted-to-ground
2.5
μA
Output voltage on RSC pin
Rsc pin floating
1.25
V
Irsc
Output current on RSC pin
Rsc pin shorted-toGND
300
μA
Idlkg
Diagnostic output leakage
current
Diagnostic off
25
μA
Diagnostic output voltage
drop
Idiag = 5 mA
1.5
V
Idch
10
Vrsc
5
11
Vdiag
Output voltage drop
Vdon
3
Iout = 625 mA
TJ = 25 °C
250
Iout = 625 mA
TJ = 125 °C
400
Output leakage current
Vi= low; Vout = 0
Vol
Output low-state voltage
Vi= high; pin
floating
Vcl
Internal voltage clamp
(Vs- Vout)
Io = 200 mA single
pulsed = 300 ms
Iolk
DocID1637 Rev 5
350
mV
48
500
100
μA
0.8
1.5
V
53
58
V
7/19
Electrical characteristics
Symbol
Pin
L6377
Parameter
Test conditions
Short-circuit output
current
ISC
Min.
Vs = 8 to 35 V;
Rl = 2 Ω; Rsc = 5
to 30 kΩ
Typ.
Max.
Unit
5/RSC = kΩ
A
Tmax.
Overtemperature upper
threshold
150
°C
Thys
Overtemperature
hysteresis
20
°C
AC operation
td
Vs = 24 V; Rl = 70
Ω Rl to ground
Rise or fall time
tr - tf
3
Delay time
Slew rate (rise and fall
edge)
Vs = 24 V; Rl = 70
Ω Rl to ground
tON
On-time during shortcircuit condition
50 pF < CDON < 2
nF
fmax.
10
μs
5
dV/dt
tOFF
20
0.7
1
1.5
V/μs
1.28
μs/pF
Off-time during shortcircuit condition
64
tON
Maximum operating
frequency
25
kHz
Source drain NDMOS diode
Forward on voltage
Ifsd = 625 mA
Ifp
Forward peak current
tp = 10 ms; duty
cycle = 20%
trr
Reverse recovery time
Ifsd = 500 mA;
dlfsd/dt = 25 A/μs
tfr
Forward recovery time
Vfsd
8/19
DocID1637 Rev 5
1
1.5
V
1.5
A
200
ns
50
ns
L6377
3.1
Electrical characteristics
Schematic diagram
Figure 2: Block diagram
Figure 3: Undervoltage comparator hysteresis
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Electrical characteristics
L6377
Figure 4: Switching waveforms
3.2
Input section
An input and asynchronous reset, TTL/CMOS compatible with wide voltage range and high
noise immunity (thanks to a built-in hysteresis) is available.
3.3
Overtemperature protection
An on-chip overtemperature protection provides an excellent protection of the device in
extreme conditions. Whenever the temperature, measured on a central portion of the chip,
exceeds Tmax. = 150 °C (typical value) the device shuts down, and the DIAG output goes
low. Normal operation is resumed as the chip temperature (normally after few seconds)
falls below Tmax.-Thys = 130 °C (typical value). The hysteresis avoids that an intermittent
behavior occurs.
3.4
Undervoltage protection
The supply voltage operates correctly in a range from 8 to 35 V. Below 8 V the overall
system has to be considered not reliable. To avoid any misfunctioning, the supply voltage
is continuously monitored to provide an undervoltage protection. As Vs falls below Vsth-Vshys
(typically 7.5 V, see Figure 4: "Switching waveforms" ) the output power MOSFET switches
off and DIAG output goes low. Normal operation is resumed as soon as V s exceeds Vsth.
The hysteretic behaviour prevents intermittent operation at low supply voltage.
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L6377
4
Overcurrent operation
Overcurrent operation
In order to implement a short-circuit protection, the output power MOSFET is driven to
linear mode to limit the output current to the ISC value. This ISC limit is externally set by an
external 1/4 W resistor connected from RSC pin and GND. The value of the resistor must be
chosen according to the following formula:
Equation 1:
Isc (A) = 5/RSC (kohm) with 5 < RSC < 30 (kohm).
Concerning RSC < 5 (kohm) ISC is limited to ISC = 1.1 A (typical value).
This condition (current limited to the ISC value) lasts for a TON time interval, that can be set
by a capacitor (CDON) connected to the ON DELAY pin according to the following formula:
Equation 2:
tON = 1.28 μsec/pF for 50 pF < CDON < 2 nF
After the tON interval has expired the output power MOSFET switches off for the tOFF time
interval:
Equation 3:
tOFF = 64· tON.
Figure 5: Short-circuit operation waveforms
When the tOFF interval has expired, the output power MOSFET switches on. In this manner
two conditions may occur:
the overload is still present. In this case, the output power MOSFET is again driven to
linear mode (limiting the output current to ISC) for another tON, starting a new cycle
the overload condition is removed, and the output power MOSFET is no longer driven
to linear mode
Please, see the DIAG pin (see Figure 5: "Short-circuit operation waveforms" ). This unique
feature is called short-circuit protection and it ensures a very safe operation even in
permanent overload conditions. Note that, the choice of the most appropriate value for the
tON interval (the value of the CDON capacitor), a delay (the tON itself) prevents a misleading
short-circuit information is presented on the DIAG output, when capacitive loads are driven
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Overcurrent operation
L6377
or incandescent lamp (a cold filament has a very low resistive value). The non-dissipative
short-circuit protection can be disabled (keeping tON = 0 but with the output current still
limited to ISC, and diagnostic disabled) simply shorting to ground the ON DELAY pin.
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L6377
5
Demagnetization of inductive loads
Demagnetization of inductive loads
The L6377 has an internal clamping Zener diode, which demagnetises inductive loads.
Note that the limitation comes from the peak power that the package can handle. Attention
must be paid to a proper thermal design of the board. If load current or inductive value are
too big, the peak power dissipation is too high, an external Zener plus diode can perform a
demagnetisation versus ground or versus Vs (see Figure 5: "Short-circuit operation
waveforms" and Figure 6: "Input comparator hysteresis"). The breakdown voltage of the
external Zener diode must be chosen considering the internal clamping voltage (V cl) and
the supply voltage (Vs) according to:
Equation 4:
Vz < Vcl(min.)-Vs(max.)
for demagnetisation versus ground or
Equation 5:
Vs(max.) < Vz < Vcl(min.)
for demagnetisation versus Vs.
Figure 6: Input comparator hysteresis
Figure 7: External demagnetisation circuit (versus ground)
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Demagnetization of inductive loads
L6377
Figure 8: External demagnetisation circuit
14/19
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L6377
6
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
®
®
ECOPACK packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
®
ECOPACK is an ST trademark.
6.1
SO-14L package information
Figure 9: SO-14L package outline
0016019 G
DocID1637 Rev 5
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Package information
L6377
Table 6: SO-14L package mechanical data
mm
Dim.
Min.
Typ.
Max.
A
1.35
1.75
A1
0.10
0.25
A2
1.10
B
0.19
C
1.14
D
8.55
8.75
E
3.80
4.00
e
3.30
1.65
0.25
1.52
1.78
1.27
H
5.80
6.20
h
0.25
0.50
L
0.40
1.27
k
0
ddd
8
0.10
Dimension D doesn't include mold flash, protrusions or gate burrs, which do not
exceed 0.15 mm per side.
Drawing dimensions include single and matrix versions.
16/19
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L6377
Package information
Figure 10: SO-14L recommended footprint outline
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17/19
Revision history
7
L6377
Revision history
Table 7: Document revision history
18/19
Date
Revision
Changes
17-Aug-2001
1
Initial release.
19-Apr-2005
2
Changed style sheet
22-Jun-2007
3
Changed style sheet
25-Feb-2008
4
Removed obsolete package DIP-14
24-Jul-2015
5
Updated IRESET and VRESET parameter in the table of maximum
ratings.
DocID1637 Rev 5
L6377
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