L6399D

L6399 High voltage high and low-side driver Datasheet - production data Applications  Home appliances  Industrial applications and drives  Motor drivers DC, AC, PMDC and PMAC motors systems 62  HVAC  Factory automation Features  Power supply systems  High voltage rail up to 600 V  dV/dt immunity ± 50 V/ns over full temperature range  Driver current capability: – 290 mA source – 430 mA sink  3.3 V, 5 V TTL/CMOS inputs with hysteresis  Internal 320 ns deadtime  Interlocking function  Compact and simplified layout  Bill of material reduction  Fans  Lighting applications Description  Switching times 75/35 ns rise/fall with 1 nF load  Integrated bootstrap diode  Compressors The L6399 is a high voltage device manufactured using BCD™ “offline” technology. It is a singlechip half bridge gate driver for N-channel power MOSFETs or IGBTs. The high-side (floating) section is designed to withstand a voltage rail up to 600 V. The logic inputs are CMOS/TTL compatible down to 3.3 V for easy microcontroller/DSP interfacing.  Flexible, easy and fast design March 2017 This is information on a product in full production. DocID030402 Rev 2 1/18 www.st.com Contents L6399 Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.3 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4.1 AC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4.2 DC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 Timing and waveform definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6 Input logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 7 Bootstrap driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 CBOOT selection and charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 8 Typical application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 9 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 9.1 SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 10 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2/18 DocID030402 Rev 2 L6399 Block diagram 1 Block diagram Figure 1. Block diagram #005453"1
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53*45"5& ". DocID030402 Rev 2 9/18 18 Input logic 6 L6399 Input logic Table 7. Truth table Input Output LIN HIN LVG HVG L L L L L H L H H L H L H (1) H L L(1) 1. Interlocking function. Input logic is provided with interlocking circuitry which prevents the two outputs (LVG, HVG) being active at the same time when both the logic input pins (LIN, HIN) are at a high logic level. In addition, to prevent cross-conduction of the external MOSFETs, after each output is turned off, the other output cannot be turned on before a certain amount of time (DT) (see Figure 4: Deadtime and interlocking timing definition and Figure 5: Deadtime and interlocking waveform definitions). 10/18 DocID030402 Rev 2 L6399 7 Bootstrap driver Bootstrap driver A bootstrap circuitry is needed to supply the high voltage section. This function is normally accomplished by a high voltage fast recovery diode (Figure 6). In the L6399 device a patented integrated structure replaces the external diode. It is realized by a high voltage DMOS, driven synchronously with the low-side driver (LVG), with a diode in series, as shown in Figure 7. An internal charge pump (Figure 7) provides the DMOS driving voltage. CBOOT selection and charging To choose the proper CBOOT value the external MOS can be seen as an equivalent capacitor. This capacitor CEXT is related to the MOS total gate charge: Equation 1 Q gate C EXT = -------------V gate The ratio between the capacitors CEXT and CBOOT is proportional to the cyclical voltage loss. It has to be: Equation 2 CBOOT >>> CEXT E.g.: if Qgate is 30 nC and Vgate is 10 V, CEXT is 3 nF. With CBOOT = 100 nF the drop would be 300 mV. If HVG has to be supplied for a long time, the CBOOT selection has to take into account also the leakage and quiescent losses. E.g.: HVG steady state consumption is lower than 190 A, so if HVG TON is 5 ms, CBOOT has to supply CEXT with 1 C. This charge on a 1 F capacitor means a voltage drop of 1 V. The internal bootstrap driver gives a great advantage: the external fast recovery diode can be avoided (it usually has a high leakage current). This internal diode can work only if VOUT is close to GND (or lower) and in the meanwhile the LVG is on. The charging time (Tcharge) of the CBOOT is the time in which both conditions are fulfilled and it has to be long enough to charge the capacitor. The bootstrap driver introduces a voltage drop due to the equivalent resistance of the internal diode RDSon (typical value: 120 ). At low frequency this drop can be neglected. Anyway increasing the frequency it must be taken in to account. The following equation is useful to compute the drop on the bootstrap DMOS: Equation 3 Q gate V drop = I ch arg e  R BOOT  V drop = ------------------  R DSon T ch arg e where Qgate is the gate charge of the external power MOS. DocID030402 Rev 2 11/18 18 Bootstrap driver L6399 For example: using a power MOS with a total gate charge of 30 nC the drop on the bootstrap diode is about 1 V, if the Tcharge is 5 s. In fact: Equation 4 30nC V drop = ---------------  120  0.72V 5s Vdrop has to be taken into account when the voltage drop on CBOOT is calculated: if this drop is too high, or the circuit topology doesn’t allow a sufficient charging time, an external diode can be used. Figure 6. Bootstrap driver with high voltage fast recovery diode % #0 05 7$$ #005 )7 )7( $#005 7065 50
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-0"%  7$$ %&"%5*.& (/%    -7( %3*7&3 -7(  ". DocID030402 Rev 2 13/18 18 Package information 9 L6399 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 14/18 DocID030402 Rev 2 L6399 9.1 Package information SO-8 package information Figure 9. SO-8 package outline 40 Table 8. SO-8 package mechanical data Symbol Dimensions (mm ) Note Min. Typ. Max. A - - 1.75 - A1 0.10 - 0.25 - A2 1.25 - - - b 0.28 - 0.48 - c 0.17 - 0.23 (1) D 4.80 4.90 5.00 E 5.80 6.00 6.20 - E1 3.80 3.90 4.00 (2) e - 1.27 - - h 0.25 - 0.50 - L 0.40 - 1.27 - L1 - 1.04 - - k 0 - 8 (3) ccc - - 0.10 - 1. The dimension “D” does not include the mold flash, protrusions or gate burrs. The mold flash, protrusions or gate burrs shall not exceed 0.15 mm in total (both sides). 2. The dimension “E1” does not include the interlead flash or protrusions. The interlead flash or protrusions shall not exceed 0.25 mm per side. 3. Degrees. DocID030402 Rev 2 15/18 18 Package information L6399 Figure 10. SO-8 footprint ". 16/18 DocID030402 Rev 2 L6399 10 Order codes Order codes Table 9. Order codes 11 Order codes Package Packaging L6399D SO-8 Tube L6399DTR SO-8 Tape and reel Revision history Table 10. Document revision history Date Revision Changes 03-Mar-2017 1 Initial release. 27-Mar-2017 2 Updated document status to: Datasheet - production data on page 1. DocID030402 Rev 2 17/18 18 L6399 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2017 STMicroelectronics – All rights reserved 18/18 DocID030402 Rev 2