L6494
High voltage high and low-side 2 A gate driver
Datasheet - production data
Description
The L6494 is a high-voltage device manufactured
with the BCD6 “offline” technology. It is a single
chip half-bridge gate driver for N-channel power
MOSFETs or IGBTs.
SO-14
Features
Transient withstand voltage 600 V
dV/dt immunity ± 50 V/ns in full temperature
range
The high-side (floating) section is designed to
stand a DC voltage rail up to 500 V, with 600 V
transient withstand voltage. The logic inputs are
CMOS/TTL compatible down to 3.3 V for easy
interfacing control units such as microcontrollers
or DSP.
Driver current capability:
– 2 A source typ. at 25 °C
– 2.5 A sink typ. at 25 °C
The device is a single input gate driver with
programmable deadtime, and also features an
active-low shutdown pin.
Short propagation delay: 85 ns
Both device outputs can sink 2.5 A and source 2
A, making the L6494 particularly suited for
medium and high capacity power
MOSFETs\IGBTs.
Switching times 25 ns rise/fall with 1 nF load
Integrated bootstrap diode
Single input and shutdown pin
Adjustable deadtime
3.3 V, 5 V TTL/CMOS inputs with hysteresis
UVLO on both high-side and low-side sections
Compact and simplified layout
The independent UVLO protection circuits
present on both the lower and upper driving
sections prevent the power switches from being
operated in low efficiency or dangerous
conditions.
The integrated bootstrap diode as well as all of
the integrated features of this driver make the
application PCB design simpler and more
compact, and help reducing the overall bill of
material.
Bill of material reduction
Flexible, easy and fast design
Applications
Motor driver for home appliances, factory
automation, industrial drives and fans
HID ballasts
Induction heating
Welding
Industrial inverters
UPS
Power supply units
DC-DC converters
November 2017
This is information on a product in full production.
DocID030317 Rev 2
1/18
www.st.com
Contents
L6494
Contents
1
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Pin description and connection diagram . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.3
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5
Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6
Typical application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7
Bootstrap driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
CBOOT selection and charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
8
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
8.1
SO-14 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
9
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
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L6494
1
Block diagram
Block diagram
Figure 1. Block diagram SO-14
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DocID030317 Rev 2
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Pin description and connection diagram
2
L6494
Pin description and connection diagram
Figure 2. Pin connection SO-14 (top view)
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Table 1. Pin description
Pin no.
Pin name Type
Function
1
IN
I
Output drivers logic input (is in phase with HVG and in opposition of
phase with LVG)
2
SD
-
Shutdown logic input (active-low)
4
DT
I
Deadtime setting
6
LVG(1)
O
Low-side driver output
7
VCC
P
Low-side section supply voltage
11
OUT
P
High-side (floating) section common voltage
12
(1)
HVG
O
High-side driver output
13
BOOT
P
High-side (bootstrapped) section supply voltage
3
SGND
P
Signal ground
5
PGND
P
Power ground
8, 9, 10, 14
NC
-
Not connected
1. The circuit guarantees less than 1 V on the LVG and HVG pins (at Isink = 10 mA), with VCC > 3 V. This
allows omitting the “bleeder” resistor connected between the gate and the source of the external MOSFET
normally used to hold the pin low.
4/18
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L6494
Electrical data
3
Electrical data
3.1
Absolute maximum ratings
Table 2. Absolute maximum ratings(1)
Value
Symbol
VCC
VPGND
VOUT
VBOOT
Parameter
Supply voltage
Low-side driver ground
Output voltage
Boot DC voltage
Boot transient withstand voltage (Tpulse < 1 ms)
Unit
Min.
Max.
-0.3
21
V
VCC - 21
VCC + 0.3
V
VBOOT - 21
VBOOT + 0.3
V
-0.3
500
V
-
620
V
Vhvg
High-side gate output voltage
VOUT - 0.3
VBOOT + 0.3
V
Vlvg
Low-side gate output voltage
PGND - 0.3
VCC + 0.3
V
-0.3
15
V
-
50
V/ns
Total power dissipation (TA = 25 °C) SO-14
-
1
W
TJ
Junction temperature
-
150
°C
Tstg
Storage temperature
-50
150
°C
ESD
Human body model
2
kV
-
Package
Value
Unit
SO-14
120
°C/W
Vi
Logic input pins voltage
dVOUT/dt Allowed output slew rate
PTOT
1. Each voltage referred to SGND unless otherwise specified.
3.2
Thermal data
Table 3. Thermal data
Symbol
Rth(JA)
Parameter
Thermal resistance junction to ambient
DocID030317 Rev 2
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Electrical data
3.3
L6494
Recommended operating conditions
Table 4. Recommended operating conditions
Symbol
Pin
VCC
VCC
VPS(1)
VBO(2)
Min.
Max.
Unit
-
10
20
V
SGND - PGND Low-side driver ground -
-5
+5
V
9.3
20
V
-9
480
V
BOOT - OUT
Parameter
Supply voltage
Test condition
Floating supply voltage OUT DC voltage
-
OUT transient
withstand voltage
Tpulse < 1 ms
-
600
V
-
800
kHz
VOUT
OUT
fSW
-
Maximum switching
frequency
HVG, LVG load CL = 1 nF
TJ
-
Junction temperature
-
-40
125
°C
TA
-
Ambient temperature(4) -
-40
125
°C
1. VPS = VPGND - SGND.
2. VBO = VBOOT - VOUT.
3. LVG off. VCC = 12.5 V. Logic is operational if VBOOT > 5 V.
4. Maximum ambient temperature is actually limited by TJ.
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L6494
Electrical characteristics
4
Electrical characteristics
Table 5. Electrical characteristics (VCC = 15 V; TJ = +25 °C; PGND = SGND)
Symbol
Pin
Parameter
Test condition
Min. Typ. Max. Unit
Low-side section supply
VCC_hys
VCC _thON
VCC _thOFF
VCC vs.
SGND
IQCCU
IQCC
VCC UV hysteresis
-
0.5
0.6
0.72
V
VCC UV turn ON threshold
-
8.7
9.3
9.8
V
VCC UV turn OFF threshold
-
8.2
8.7
9.2
V
Undervoltage quiescent supply
current
VCC = SD = 7 V
IN = SGND
-
135
200
A
Quiescent current
VCC = 15 V
SD = 5 V; IN = SGND
-
490
700
A
High-side floating section supply(1)
VBO_hys
VBO UV hysteresis
-
0.48
0.6
0.7
V
VBO_thON
VBO UV turn ON threshold
-
8.0
8.6
9.1
V
VBO_thOFF
VBO UV turn OFF threshold
-
7.5
8.0
8.5
V
VBO = SD = 7 V
IN = SGND
-
20
30
A
VBO quiescent current
VBO = 15 V
SD = IN = 5 V
-
90
120
A
High-voltage leakage current
Vhvg = Vout = Vboot = 600 V
-
-
8
A
Bootstrap diode on-resistance(2)
-
-
175
-
LVG/HVG ON
TJ = 25 °C
1.6
2
-
A
Full temperature range(3)
1.25
-
-
A
2
2.5
-
A
Full temperature range(3)
1.55
-
-
A
-
0.95
-
1.45
V
-
2
-
2.5
V
IQBOU
Undervoltage VBO quiescent
BOOT vs. current
OUT
IQBO
ILK
RDS(on)
Output driving buffers
High/low-side source short-circuit
current
ISO
LVG, HVG
High/low-side sink short-circuit
current
ISI
LVG/HVG ON
TJ = 25 °C
Logic inputs
Vil
Vih
IINh
IINl
ISDh
ISDl
IN, SD vs. Low level logic threshold voltage
SGND
High level logic threshold voltage
IN vs.
SGND
IN logic “1” input bias current
IN = 15 V
120
200
260
A
IN logic “0” input bias current
IN = 0 V
-
-
1
A
SD vs.
SGND
SD logic “1” input bias current
SD = 15 V
-
-
1
A
SD logic “0” input bias current
SD = 0 V
14
17
23
A
DocID030317 Rev 2
7/18
18
Electrical characteristics
L6494
Table 5. Electrical characteristics (VCC = 15 V; TJ = +25 °C; PGND = SGND) (continued)
Symbol
Pin
Parameter
Test condition
Min. Typ. Max. Unit
RPU_SD
SD vs.
SGND
SD pull-up resistor
-
185
250
310
k
RPD_IN
IN vs.
SGND
IN pull-down resistor
-
58
75
125
k
-
85
120
ns
-
85
120
ns
Dynamic characteristics (see Figure 3 and Figure 4)
ton
SD vs.
High/low-side driver turn-on
LVG/HVG propagation delay
toff
SD vs.
LVG/HVG; High/low-side driver turn-off
IN vs.
propagation delay
LVG/HVG
MT
tr
tf
DT
MDT
LVG, HVG
Delay matching, HS and LS turnon/off(4)
-
-
-
30
ns
Rise time
CL = 1 nF
-
25
-
ns
Fall time
CL = 1 nF
-
25
-
ns
Deadtime setting range(5)
-
Matching deadtime(5)
-
VOUT = 0 V; VBOOT = VCC;
CL = 1 nF; Vi = 0 to 3.3 V
RDT = 0 , CL = 1 nF,
0.26 0.40
0.54
s
RDT = 100 k, CL = 1 nF,
CDT = 100 nF
2.10 2.70
3.30
s
RDT = 200 k, CL = 1 nF,
CDT = 100 nF
4.00 5.00
6.00
s
RDT = 0 , CL = 1 nF,
-
-
85
ns
RDT = 100 k, CL = 1 nF,
CDT = 100 nF
-
-
350
ns
RDT = 200 k, CL = 1 nF,
CDT = 100 nF
-
-
700
ns
1. VBO = VBOOT - VOUT.
2. RDSON is tested in the following way:
RDSON = [(VCC - VBOOT1) - (VCC - VBOOT2)] / [I1 (VCC, VBOOT1) - I2 (VCC, VBOOT2)]
where I1 is the BOOT pin current when VBOOT = VBOOT1, I2 when VBOOT = VBOOT2.
3. Characterized, not tested in production.
4. MT = max. (|ton (LVG) - toff (LVG)|, |ton (HVG) - toff (HVG)|, |toff (LVG) - ton (HVG)|, |toff (HVG) - ton (LVG)|).
5. MDT = | DTLH - DTHL | see Figure 4.
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L6494
Electrical characteristics
Figure 3. SD timings
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Figure 4. IN timings and deadtime
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DocID030317 Rev 2
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Electrical characteristics
L6494
Figure 5. Typical deadtime vs. DT resistor value
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L6494
5
Truth table
Truth table
Table 6. Truth table
Input
Output
SD
IN
LVG
HVG
L
X(1)
L
L
H
L
H
L
H
H
L
H
1. X = don't care.
DocID030317 Rev 2
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Typical application diagram
6
L6494
Typical application diagram
Figure 6. Typical application diagram
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Figure 7. Suggested PCB layout (SO-14)
IN
CBOOT
SD
SIGNAL GROUND
VCC
CVCC2
RDT CDT
CVCC1
RPU
SIGNAL GROUND
BOTTOM layer
TOP layer
Rg
POWER GROUND
AM040071
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L6494
7
Bootstrap driver
Bootstrap driver
A bootstrap circuitry is needed to supply the high voltage section. This function is usually
accomplished by a high voltage fast recovery diode (Figure 8). In the L6494 an integrated
structure replaces the external diode.
CBOOT selection and charging
To choose the proper CBOOT value the external MOS can be seen as an equivalent
capacitor. This capacitor CEXT is related to the MOS total gate charge:
Equation 1
Q gate
C EXT = -------------V gate
The ratio between the capacitors CEXT and CBOOT is proportional to the cyclical voltage loss.
It has to be:
Equation 2
C BOOT >>>C EXT
if Qgate is 30 nC and Vgate is 10 V, CEXT is 3 nF. With CBOOT = 100 nF the drop is 300 mV.
If HVG has to be supplied for a long time, the CBOOT selection has also to take into account
the leakage and quiescent losses.
HVG steady-state consumption is lower than 120 A, so if HVG TON is 5 ms, CBOOT has to
supply 0.6 C. This charge on a 1 F capacitor means a voltage drop of 0.6 V.
The internal bootstrap driver gives a great advantage: the external fast recovery diode can
be avoided (it usually has great leakage current).
This structure can work only if VOUT is close to SGND (or lower) and in the meanwhile the
LVG is on. The charging time (Tcharge) of the CBOOT is the time in which both conditions are
fulfilled and it has to be long enough to charge the capacitor.
The bootstrap driver introduces a voltage drop due to the DMOS RDS(on) (typical value:
175 ). At low frequency this drop can be neglected. Anyway, the rise of frequency has to
take into account.
The following equation is useful to compute the drop on the bootstrap DMOS:
Equation 3
Q gate
V drop = I ch arg e R DS on V drop = ------------------R DS on
T ch arg e
where Qgate is the gate charge of the external power MOS, RDS(on) is the on resistance of
the bootstrap DMOS and Tcharge is the charging time of the bootstrap capacitor.
DocID030317 Rev 2
13/18
18
Bootstrap driver
L6494
For example: using a power MOS with a total gate charge of 30 nC the drop on the
bootstrap DMOS is about 1 V, if the Tcharge is 5 s. In fact:
Equation 4
30nC
V drop = --------------- 175 1V
5s
Vdrop has to be taken into account when the voltage drop on CBOOT is calculated: if this drop
is too high, or the circuit topology doesn’t allow a sufficient charging time, an external diode
can be used.
Figure 8. Bootstrap driver with external high voltage fast recovery diode
DBOOT
VCC
BOOT
H.V.
HVG
CBOOT
OUT
TO LOAD
LVG
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L6494
8
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
8.1
SO-14 package information
Figure 9. SO-14 package outline
40
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Package information
L6494
Table 7. SO-14 package mechanical data
Dimensions (mm)
Symbol
Min.
Typ.
Max.
A
1.35
-
1.75
A1
0.10
-
0.25
A2
1.10
-
1.65
B
0.33
-
0.51
C
0.19
-
0.25
D
8.55
-
8.75
E
3.80
-
4.00
e
-
1.27
-
H
5.80
-
6.20
h
0
-
-
25
-
0.50
-
L
0.40
-
1.27
k
0
-
8
ddd
-
-
0.10
Figure 10. SO-14 package suggested land pattern
".
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L6494
9
Ordering information
Ordering information
Table 8. Device summary
10
Order code
Package
Packaging
L6494LD
SO-14
Tube
L6494LDTR
SO-14
Tape and reel
Revision history
Table 9. Document revision history
Date
Revision
Changes
08-Feb-2017
1
Initial release.
14-Nov-2017
2
Updated Section : Description on page 1, Table 4 on
page 6 and Table 5 on page 7.
DocID030317 Rev 2
17/18
18
L6494
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