L6562A
Transition-mode PFC controller
Features
■
Proprietary multiplier design for minimum THD
■
Very accurate adjustable output overvoltage
protection
DIP-8
■
Ultra-low (30µA) Start-up current
■
Low (2.5mA) quiescent current
■
Digital leading-edge blanking on current sense
■
Disable function on E/A input
■
1% (@ TJ = 25 °C) internal reference voltage
■
■
SO-8
Applications
PFC pre-regulators for:
■
-600/+800mA totem pole gate driver with active
pull-down during UVLO and voltage clamp
IEC61000-3-2 compliant SMPS (Flat TV,
monitors, desktop PC, games)
■
HI-END AC-DC adapter/charger up to 400W
DIP-8/SO-8 packages
■
Electronic ballast
■
Entry level server & web server
Figure 1.
Block diagram
Table 1. Device summary
Order codes
Package
Packaging
L6562AN
DIP-8
Tube
L6562AD
SO-8
Tube
L6562ADTR
SO-8
Tape & Reel
August 2007
Rev 3
1/26
www.st.com
26
Contents
L6562A
Contents
1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
5
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
6
Typical electrical characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
7
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7.1
Overvoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7.2
Disable function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.3
THD optimizer circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.4
Operating with no auxiliary winding on the boost inductor . . . . . . . . . . . . 16
7.5
Comparison between the L6562A and the L6562 . . . . . . . . . . . . . . . . . . 17
8
Application examples and ideas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
9
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2/26
L6562A
1
Description
Description
The L6562A is a current-mode PFC controller operating in Transition Mode (TM). Coming
with the same pin-out as its predecessors L6561 and L6562, it offers improved performance.
The highly linear multiplier includes a special circuit, able to reduce AC input current
distortion, that allows wide-range-mains operation with an extremely low THD, even over a
large load range.
The output voltage is controlled by means of a voltage-mode error amplifier and an accurate
(1% @TJ = 25°C) internal voltage reference.
The device features extremely low consumption (60µA max. before start-up and 0 due to a load drop, the voltage
at pin INV will be kept at 2.5V by the local feedback of the error amplifier, a network
connected between pins INV and COMP that introduces a long time constant to achieve
high PF (this is why ∆Vo can be large). As a result, the current through R2 will remain equal
to 2.5/R2 but that through R1 will become:
Equation 2
V O – 2.5 + ∆V O
I' R1 = --------------------------------------R1
The difference current ∆IR1=I'R1-IR2=I'R1-IR1= ∆Vo/R1 will flow through the compensation
network and enter the error amplifier output (pin COMP). This current is monitored inside
the device and if it reaches about 24µA the output voltage of the multiplier is forced to
decrease, thus smoothly reducing the energy delivered to the output. As the current
exceeds 27µA, the OVP is triggered (Dynamic OVP): the gate-drive is forced low to switch
off the external power transistor and the IC put in an idle state. This condition is maintained
until the current falls below approximately 7µA, which re-enables the internal starter and
allows switching to restart. The output ∆Vo that is able to trigger the Dynamic OVP function
is then:
Equation 3
∆VO = R1 · 20 · 10 - 6
An important advantage of this technique is that the OV level can be set independently of
the regulated output voltage: the latter depends on the ratio of R1 to R2, the former on the
individual value of R1. Another advantage is the precision: the tolerance of the detection
current is 13%, i.e. 13% tolerance on ∆Vo. Since ∆Vo
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