L6728AH
High frequency single phase PWM controller with Power Good
Datasheet - production data
Description
The L6728AH is a single phase step-down
controller with integrated high-current drivers, that
provides complete control logic and protection to
realize in a simple way general DC-DC converters
by using a compact VFDFPN 10 package.
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VFDFPN 10
Device flexibility allows managing conversions
with power input VIN as low as 1.5 V and device
supply voltage ranging from 5 V to 12 V.
Features
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The L6728AH device provides a simple control
loop with the voltage mode EA. The integrated
0.8 V reference allows regulating output voltages
with ± 0.8% accuracy over line and temperature
variations. The oscillator is internally fixed to
600 kHz.
Flexible power supply from 5 V to 12 V
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Power conversion input as low as 1.5 V
0.8 V internal reference
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0.8% output voltage accuracy
High-current integrated drivers
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Power Good output
Sensorless and programmable OCP across
low-side RDS(on)
OV / UV protections
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VSEN disconnection protection
The L6728AH provides programmable dual level
overcurrent protection as well as over and
undervoltage protection. Current information is
monitored across the low-side MOSFET RDS(on)
saving the use of expensive and spaceconsuming sense resistors.
The PGOOD output easily provides real-time
information on output voltage status, through
VSEN dedicated output monitor.
Oscillator internally fixed at 600 kHz
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LS-less to manage pre-bias startup
Adjustable output voltage
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Table 1. Device summary
Disable function
Order codes
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Internal soft-start
L6728AH
VFDFPN 10 package
L6728AHTR
Package
VFDFPN 10
Packing
Tube
Tape and reel
Applications
Memory and termination supply
Subsystem power supply (MCH, IOCH, PCI)
CPU and DSP power supply
Distributed power supply
General DC / DC converters
August 2016
This is information on a product in full production.
DocID15726 Rev 2
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www.st.com
Contents
L6728AH
Contents
1
2
Typical application circuit and block diagram . . . . . . . . . . . . . . . . . . . . 4
1.1
Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Pins description and connection diagrams . . . . . . . . . . . . . . . . . . . . . . 5
2.1
Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
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Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
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3.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
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Device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5
Driver section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
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Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
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Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
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Low-side-less start up (LS-less) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
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Overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
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Overcurrent threshold setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
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Output voltage setting and protections . . . . . . . . . . . . . . . . . . . . . . . . 15
Application details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
9.1
Compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
9.2
Layout guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
10.1
Inductor design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
10.2
Output capacitor(s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
10.3
Input capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
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L6728AH
11
Contents
20 A demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
11.1
11.2
12
Demonstration board description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
11.1.1
Power input (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
11.1.2
Output (VOUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
11.1.3
Signal input (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
11.1.4
Test points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Demonstration board characterization . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5 A demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
12.1
12.2
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Demonstration board description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
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12.1.1
Power input (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
12.1.2
Output (VOUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
12.1.3
Signal input (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
12.1.4
Test points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
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Demonstration board characterization . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
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Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
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VFDFPN10 3 x 3 mm package information . . . . . . . . . . . . . . . . . . . . . . . 34
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Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
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Typical application circuit and block diagram
L6728AH
1
Typical application circuit and block diagram
1.1
Application circuit
Figure 1. Typical application circuit
VIN = 1.5V to 12V
VCC = 5V to 12V
CDEC
6
RPG
VCC
7
COMP
/ DIS
CF
CP
UGATE
PHASE
L6728AH
RF
ROS
BOOT
PGOOD
L6728A
10
PGOOD
8
RFB
FB
VSEN
LGATE
/ OC
GND
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Block diagram
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VSEN
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LS
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COUT
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Vout
LOAD
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Figure 2. Block diagram
VCC
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HS
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RFB
L6728A Reference Schematic
1.2
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CBULK
CHF
3
ROCSET
5
ROS
1
VOUT MONITOR
PGOOD
VOCTH
OC
CONTROL LOGIC
&
PROTECTIONS
BOOT
ADAPTIVE ANTI
CROSS CONDUCTION
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CLOCK
PWM
600 kHz
OSCILLATOR
HS
UGATE
PHASE
VCC
LS
ERROR AMPLIFIER
LGATE
/ OC
GND
+
-
L6728AH
L6728A
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FB
IOCSET
COMP
/ DIS
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0.8V
L6728AH
2
Pins description and connection diagrams
Pins description and connection diagrams
Figure 3. Pins connection (top view)
BOOT
PHASE
UGATE
LGATE / OC
GND
2.1
1
10
2
9
3
L6728A
L6728AH
8
4
7
5
6
PGOOD
VSEN
FB
COMP / DIS
VCC
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Pin descriptions
Table 2.Pin description
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Pin #
Name
1
BOOT
HS driver supply.
Connect through a capacitor (100 nF) to the floating node (LS-drain) pin and provide
a necessary bootstrap diode from VCC.
2
PHASE
HS driver return path, current-reading and adaptive deadtime monitor. Connect to the LS
drain to sense RDS(on) drop to measure the output current. This pin is also used by the
adaptive deadtime control circuitry to monitor when the HS MOSFET is OFF.
3
UGATE
HS driver output. Connect directly to the HS MOSFET gate.
4
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GND
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LGATE. LS driver output. Connect directly to the LS MOSFET gate.
OC overcurrent threshold set. During a short period of time following VCC rising over the
UVLO threshold, a 10 A current is sourced from this pin. Connect to GND with an ROCSET
LGATE / OC resistor greater than 5 k to program the OC threshold. The resulting voltage at this pin is
sampled and held internally as the OC set point. A maximum programmable OC threshold is
0.55 V. A voltage greater than 0.6 V activates an internal clamp and causes the OC threshold
to be set at the maximum value.
5
6
Function
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VCC
All internal references, logic and drivers are connected to this pin.
Connect to the PCB ground plane.
Device and drivers power supply.
Operative range from 5 V to 12 V. Filter with at least 1 F MLCC to GND.
COMP. Error amplifier output. Connect with an RF - CF // CP to FB to compensate the device
control loop.
COMP / DIS
DIS. The device can be disabled by pushing this pin lower than 0.75 V (typ.). Setting free the
pin, the device enables again.
Error amplifier inverting input.
Connect with a resistor RFB to the output regulated voltage. Output resistor divider may be
used to regulate voltages higher than the reference.
8
FB
9
VSEN
Regulated voltage sense pin for OVP and UVP protections and PGOOD. Connect to the
output regulated voltage, or to the output resistor divider if the regulated voltage is higher than
the reference.
10
PGOOD
Open drain output set free after SS has finished and pulled low when VSEN is outside the
relative window. Pull up to a voltage equal or lower than VCC. If not used it can be left floating.
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Pins description and connection diagrams
2.2
L6728AH
Thermal data
Table 3. Thermal data
Symbol
Parameter
Unit
RTH(JA)
Thermal resistance junction to ambient
(Device soldered on 2s2p, 67 mm x 69 mm board)
45
°C/W
RTH(JC)
Thermal resistance junction to case
5
°C/W
150
°C
°C
TMAX
Maximum junction temperature
TSTG
Storage temperature range
-40 to 150
TJ
Junction temperature range
-40 to 125
PTOT
Maximum power dissipation at TA = 25 °C
2.25
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Value
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°C
W
L6728AH
Electrical specifications
3
Electrical specifications
3.1
Absolute maximum ratings
Table 4. Absolute maximum ratings
Symbol
Parameter
To GND
VCC
Value
Unit
-0.3 to 15
V
V
VBOOT, VUGATE
To PHASE
to GND
to GND; t < 200 ns
15
33
45
VPHASE
To GND
to GND; t < 200 ns
-5 to 18
-8 to 30
VLGATE
To GND
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PGOOD to GND
Electrical characteristics
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V
-0.3 to VCC+0.3
V
-0.3 to 3.6
V
-0.3 to VCC+0.3
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FB, COMP, VSEN to GND
3.2
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VCC = 5 V to 12 V; TJ = 0 C to 70 C, unless otherwise specified.
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Table 5. Electrical characteristics
Symbol
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Supply current and power-on
ICC
IBOOT
UVLO
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Parameter
VCC supply current
UGATE and LGATE = OPEN
BOOT supply current
UGATE = OPEN; PHASE to GND
VCC turn-ON
VCC rising
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Hysteresis
FSW
Main oscillator accuracy
Ob
Test conditions
Min.
Typ.
Max.
Unit
6
mA
0.7
mA
4.1
0.2
V
V
Oscillator
VOSC
PWM ramp amplitude
dMAX
Maximum duty-cycle
540
600
660
1.4
kHz
V
67
%
Reference and error amplifier
Output voltage accuracy
A0
-0.8
(1)
-
0.8
%
DC gain
120
dB
Gain-bandwidth product(1)
15
MHz
SR
Slew-rate(1)
8
V/s
DIS
Disable threshold
GBWP
COMP falling
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0.85
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Electrical specifications
L6728AH
Table 5. Electrical characteristics (continued)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Gate drivers
IUGATE
HS source current
BOOT - PHASE = 5 V
1.5
A
RUGATE
HS sink resistance
BOOT - PHASE = 5 V
1.1
ILGATE
LS source current
VCC = 5 V
1.5
A
RLGATE
LS sink resistance
VCC = 5 V
0.65
Overcurrent protection
IOCSET
OCSET current source
Sourced from LGATE pin, during OC
setting phase
VOC_SW
OC switchover threshold
VLGATE/OC rising
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10
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VSEN rising
OVP
OVP threshold
UVP
UVP threshold
VSEN falling
VSEN bias current
Sourced from VSEN
Upper threshold
VSEN rising
VSEN
PGOOD
VPGOODL
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Lower threshold
VSEN falling
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PGOOD voltage low
1. Guaranteed by design, not subject to test.
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IPGOOD = -4 mA
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A
mV
0.90
1.00
1.10
V
0.35
0.40
0.45
V
0.50
0.60
0.70
V
P
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et
unlatch, VSEN falling
PGOOD
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600
Over and undervoltage protections
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11
100
nA
0.860
0.890
0.920
V
0.680
0.710
0.740
V
0.4
V
L6728AH
4
Device description
Device description
The L6728AH is a single phase PWM controller with embedded high-current drivers, that
provides complete control logic and protections to realize in an easy and simple way
a general DC-DC step-down converter. Designed to drive the N-channel MOSFETs in
a synchronous buck topology, with its high level of integration this 10-pin device allows
reducing the cost and size of the power supply solution also providing real-time PGOOD in
a compact VFDFPN 0 3 x 3 mm package.
The L6728AH device is designed to operate from a 5 V or 12 V supply. The output voltage
can be precisely regulated to as low as 0.8 V with ± 1% accuracy over line and temperature
variations. The switching frequency is internally set to 600 kHz.
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This device provides a simple control loop with a voltage-mode error-amplifier. The erroramplifier features a 15 MHz gain-bandwidth product and an 8 V/µs slew rate, allowing a high
regulator bandwidth for fast transient response.
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To avoid load damages, the L6728AH provides overcurrent protection as well as
overvoltage, under voltage and feedback disconnection protection. The overcurrent trip
threshold is programmable by a simple resistor connected from the Lgate to GND. Output
current is monitored across the low-side MOSFET RDS(on), saving the use of an expensive
and space-consuming sense resistor. Output voltage is monitored through the dedicated
VSEN pin.
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The L6728AH device implements the soft-start increasing the internal reference in the
closed loop regulation. The low-side-less feature allows the device to perform the soft-start
over pre-biased output avoiding the high-current return through the output inductor and
a dangerous negative spike at the load side.
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The L6728AH device is available in a compact VFDFN10 3 x 3 mm package with an
exposed pad.
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Driver section
5
L6728AH
Driver section
The integrated high-current drivers allow using different types of the power MOSFET (also
multiple MOSFETs to reduce the equivalent RDS(on)), maintaining fast switching transition.
The driver for the high-side MOSFET uses the BOOT pin for the supply and the PHASE pin
for the return. The driver for the low-side MOSFET uses the VCC pin for the supply and the
GND pin for the return.
The controller embodies an anti-shoot-through and adaptive deadtime control to minimize
low-side body diode conduction time, maintaining good efficiency while saving the use of the
Schottky diode:
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To check the high-side MOSFET turn-off, the PHASE pin is sensed. When the voltage
at the PHASE pin drops down, the low-side MOSFET gate drive is suddenly applied.
To check the low-side MOSFET turn off, the LGATE pin is sensed. When the voltage at
the LGATE has fallen, the high-side MOSFET gate drive is suddenly applied.
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If the current flowing in the inductor is negative, voltage on the PHASE pin will never drop.
To allow the low-side MOSFET to turn-on even in this case, a watchdog controller is
enabled: if the source of the high-side MOSFET doesn't drop, the low-side MOSFET is
switched on so allowing the negative current of the inductor to recirculate. This mechanism
allows the system to regulate even if the current is negative.
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Power conversion input is flexible: a 5 V, 12 V bus or any bus that allows the conversion
(see maximum duty-cycle limitations in Table 5 on page 7) can be chosen freely.
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L6728AH
Driver section
Power dissipation
The L6728AH embeds high-current MOSFET drivers for both high-side and low-side
MOSFETs: it is then important to consider the power that the device is going to dissipate in
driving them in order to avoid overcoming the maximum junction operative temperature.
Two main terms contribute in the device power dissipation: bias power and drivers' power.
Device bias power (PDC) depends on the static consumption of the device through the
supply pins and it is simply quantifiable as follow (assuming to supply HS and LS
drivers with the same VCC of the device):
Equation 1
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P DC = V CC I CC + I BOOT
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Drivers power is the power needed by the driver to continuously switch on and off the
external MOSFETs; it is a function of the switching frequency and total gate charge of
the selected MOSFETs. It can be quantified considering that the total power PSW
dissipated to switch the MOSFETs (easy calculable) is dissipated by three main factors:
external gate resistance (when present), intrinsic MOSFET resistance and intrinsic
driver resistance. This last term is the important one to be determined to calculate the
device power dissipation. The total power dissipated to switch the MOSFETs results:
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Equation 2
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P SW = F SW Q gHS V BOOT + Q gLS V CC
External gate resistors helps the device to dissipate the switching power since the same
power PSW will be shared between the internal driver impedance and the external resistor
resulting in a general cooling of the device.
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Soft-start
6
L6728AH
Soft-start
The L6728AH implements a soft-start to smoothly charge the output filter avoiding high
inrush currents to be required from the input power supply. The device gradually increases
the internal reference from 0 V to 0.8 V in 4.5 msec (typ.), in the closed loop regulation,
linearly charging the output capacitors to the final regulation voltage. A pre-charged output
voltage will affect the soft-start duration, resulting in a reduction of this period of time
(< 4 msec).
During the soft-start process all the protections but the UVP are active: the UVP becomes
active as soon as the soft-start ends up.
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The device begins the soft-start phase only when the VCC power supply is above the UVLO
threshold and the overcurrent threshold setting phase has been completed.
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Low-side-less start up (LS-less)
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In order to avoid any kind of the negative undershoot and dangerous return from the load
the during the start-up, the L6728AH performs a special sequence in enabling the LS driver
to switch: during the soft-start phase, the LS driver results disabled (LS = OFF) until the HS
starts to switch. This avoids the dangerous negative spike on the output voltage that can
happen if starting over a pre-biased output.
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If the output voltage is pre-biased to a voltage higher than the final one, the HS would never
start to switch. In this case, at the end of soft-start time, the LS is enabled and discharges
the output to the final regulation value.
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This particular feature of the device masks the LS turn-on only from the control loop point of
view: protections bypass this turning ON the LS MOSFET in case of need.
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Figure 4. LS-less startup (left) vs. non-LS-less startup (right)
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L6728AH
7
Overcurrent protection
Overcurrent protection
The overcurrent function protects the converter from a shorted output or overload, by
sensing the output current information across the low-side MOSFET drain-source onresistance, RDS(on). This method reduces the cost and enhances converter efficiency by
avoiding the use of expensive and space-consuming sense resistors.
The low-side RDS(on) current sense is implemented by comparing the voltage at the PHASE
node when the LS MOSFET is turned on with the programmed OCP thresholds voltages,
internally held. If the monitored voltage is bigger than these thresholds, an overcurrent
event is detected.
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For maximum safety and load protection, the L6728AH implements a dual level overcurrent
protection system:
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1st level threshold: it is the user externally set threshold. If the monitored voltage on
the PHASE exceeds this threshold, a 1st level overcurrent is detected. If four 1st level
OC events are detected in four consecutive switching cycles, overcurrent protection will
be triggered.
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2 level threshold: it is an internal threshold whose value is equal to the 1st level
threshold multiplied by a factor 1.5. If the monitored voltage on the PHASE exceeds
this threshold, overcurrent protection will be triggered immediately.
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When overcurrent protection is triggered, the device turns off both LS and HS MOSFETs in
a latched condition. To recover from overcurrent protection triggered condition, the VCC
power supply must be cycled.
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DocID15726 Rev 2
13/36
36
Overcurrent protection
L6728AH
Overcurrent threshold setting
The L6728AH allows to easily program a 1st level overcurrent threshold ranging from 50 mV
to 550 mV, simply by adding a resistor (ROCSET) between the LGATE and GND. The 2nd
level threshold will be automatically set accordingly.
During a short period of time (about 5 ms) following VCC rising over the UVLO threshold, an
internal 10 µA current (IOCSET) is sourced from the LGATE pin, determining a voltage drop
across the ROCSET. This voltage drop will be sampled and internally held by the device as
the 1st level overcurrent threshold. The OC setting procedure overall time length is about 5
ms.
Connecting a ROCSET resistor between the LGATE and GND, the programmed 1st level
threshold will be:
Equation 3
I OCSET R OCSET
I OCth1 = -------------------------------------------R dsON
the programmed 2nd level threshold will be:
Equation 4
I OCth2
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I OCSET R OCSET
= 1.5 -------------------------------------------R dsON
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In case the ROCSET is not connected, the device sets the OCP thresholds to the maximum
values: an internal safety clamp on the LGATE is triggered as soon as LGATE voltage
reaches 600 mV, setting the maximum threshold and suddenly ending the OC setting
phase.
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14/36
DocID15726 Rev 2
L6728AH
8
Output voltage setting and protections
Output voltage setting and protections
The L6728AH is capable to precisely regulate an output voltage as low as 0.8 V. In fact, the
device comes with a fixed 0.8 V internal reference that guarantee the output regulated
voltage to be within ± 1% tolerance over line and temperature variations (excluding output
resistor divider tolerance, when present).
Output voltage higher than 0.8 V can be easily achieved by adding a resistor ROS between
the FB pin and ground. Referring to Figure 1 on page 4, the steady state DC output voltage
will be:
Equation 5
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R FB
V OUT = V REF 1 + -----------
R OS
where VREF is 0.8 V.
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The L6728AH monitors the voltage at the VSEN pin and compares it to internal reference
voltage in order to provide undervoltage and overvoltage protections as well as the PGOOD
signal. According to the level of the VSEN, different actions are performed from the
controller:
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PGOOD
If the voltage monitored through the VSEN exits from the PGOOD window limits, the
device deasserts the PGOOD signal still continuing switching and regulating. The
PGOOD is asserted at the end of the soft-start phase.
Undervoltage protection
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If the voltage at the VSEN pin drops below the UV threshold, the device turns off both
HS and LS MOSFETs, latching the condition. Cycle VCC to recover.
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Overvoltage protection
If the voltage at the VSEN pin rises over the OV threshold (1 V typ.), overvoltage
protection turns off the HS MOSFET and turns on the LS MOSFET. The LS MOSFET
will be turned off as soon as the VSEN goes below VREF/2 (0.4 V). The condition is
latched, the cycle VCC to recover. Notice that, even if the device is latched, the device
still controls the LS MOSFET and can switch it on whenever the VSEN rises above
0.4 V.
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Feedback disconnection protection
In order to provide load protection even if the VSEN pin is not connected, a 100 nA bias
current is always sourced from this pin. If the VSEN pin is not connected, this current
will permanently pull it up causing the device to detect an OV: thus the LS will be
latched on preventing output voltage from rising out of control.
DocID15726 Rev 2
15/36
36
Application details
L6728AH
9
Application details
9.1
Compensation network
The control loop showed in Figure 5 is a voltage mode control loop. The output voltage is
regulated to the internal reference (when present, the offset resistor between the FB node
and GND can be neglected in control loop calculation).
Error amplifier output is compared to the oscillator saw-tooth waveform to provide the PWM
signal to the driver section. The PWM signal is then transferred to the switching node with
VIN amplitude. This waveform is filtered by the output filter.
)
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The converter transfer function is the small signal transfer function between the output of the
EA and VOUT. This function has a double pole at frequency FLC depending on the L-C output
filter and a zero at FESR depending on the output capacitor ESR. The DC gain of the
modulator is simply the input voltage VIN divided by the peak-to-peak oscillator voltage
VOSC.
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Figure 5. PWM control loop
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VIN
OSC
V OSC
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ERROR
AMPLIFIER
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CF
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V OUT
COUT
PWM
COMPARATOR
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ESR
VREF
_
RFB
RF
CS
RS
ZFB
CP
ZF
The compensation network closes the loop joining VOUT and EA output with transfer
function ideally equal to -ZF/ZFB.
The compensation goal is to close the control loop assuring high DC regulation accuracy,
good dynamic performances and stability. To achieve this, the overall loop needs the high
DC gain, high bandwidth and good phase margin.
The high DC gain is achieved giving an integrator shape to compensation network transfer
function. The loop bandwidth (F0dB) can be fixed choosing the right RF/RFB ratio, however,
for stability, it should not exceed FSW/2. To achieve a good phase margin, the control loop
gain has to cross 0 dB axis with a -20 dB/decade slope.
16/36
DocID15726 Rev 2
L6728AH
Application details
As an example, Figure 6 shows an asymptotic bode plot of a type III compensation.
Figure 6. Example of type III compensation
Gain
[dB]
open loop
EA gain
FZ1 FZ2
FP2
FP1
closed
loop gain
)
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compensation
gain
20log (RF/RFB)
open loop
converter gain
FESR
Open loop converter singularities:
Log (Freq)
F0dB
FLC
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20log (VIN/VOSC )
0dB
a)
1
F LC = ---------------------------------2 L C OUT
b)
1
F ESR = -------------------------------------------2 C OUT ESR
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Compensation network singularities frequencies:
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F Z1 = -----------------------------2 R F C F
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b)
1
F Z2 = ----------------------------------------------------2 R FB + R S C S
c)
1
F P1 = -------------------------------------------------CF CP
2 R F ---------------------
C F + C P
d)
1
F P2 = ------------------------------2 R S C S
DocID15726 Rev 2
17/36
36
Application details
L6728AH
To place the poles and zeroes of the compensation network, the following suggestions may
be followed:
a)
Set the gain RF/RFB in order to obtain the desired closed loop regulator bandwidth
according to the approximated formula (suggested values for the RFB is in the
range of some k):
RF
F 0dB V OSC
---------- = ------------ ------------------R FB
F LC
V IN
b)
Place FZ1 below FLC (typically 0.5 * FLC):
1
C F = ---------------------------- R F F LC
c)
CF
C P = ---------------------------------------------------------2 R F C F F ESR – 1
d)
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Place FP1 at FESR:
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Place FZ2 at FLC and FP2 at the half of the switching frequency:
R FB
R S = --------------------------F SW
------------------ – 1
2 F LC
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1
C S = ------------------------------ R S F SW
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Check that the compensation network gain is lower than the open loop EA gain
before F0dB;
f)
Check the phase margin obtained (it should be greater than 45°) and repeat if
necessary.
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Layout guidelines
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The L6728AH provides control functions and high-current integrated drivers to implement
high-current step-down DC-DC converters. In this kind of application, a good layout is very
important.
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The first priority when placing components for these applications has to be reserved to the
power section, minimizing the length of the each connection and loop as much as possible.
To minimize noise and voltage spikes (EMI and losses) power connections (highlighted in
Figure 7) must be a part of a power plane and anyway realized by wide and thick copper
traces: the loop must be anyway minimized. The critical components, i.e. the power
MOSFETs, must be close one to the other. The use of the multi-layer printed circuit board is
recommended.
The input capacitance (CIN), or at least a portion of the total capacitance needed, has to be
placed close to the power section in order to eliminate the stray inductance generated by
the copper traces. Low ESR and ESL capacitors are preferred, MLCC are suggested to be
connected near the HS drain.
Use a proper VIAs number when power traces have to move between different planes on
the PCB in order to reduce both parasitic resistance and inductance. Moreover, reproducing
the same high-current trace on more than one PCB layer will reduce the parasitic resistance
associated to that connection.
18/36
DocID15726 Rev 2
L6728AH
Application details
Connect output bulk capacitors (COUT) as near as possible to the load, minimizing parasitic
inductance and resistance associated to the copper trace, also adding extra decoupling
capacitors along the way to the load when this results in being far from the bulk capacitors
bank.
Figure 7. Power connections (heavy lines)
VIN
CIN
UGATE
PHASE
L
L6728A
L6728AH
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COUT
LGATE
LOAD
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GND
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The gate traces and phase trace must be sized according to the driver RMS current
delivered to the power MOSFET. The device robustness allows managing applications with
the power section far from the controller without losing performances. Anyway, when
possible, it is recommended to minimize the distance between the controller and power
section.
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Small signal components and connections to critical nodes of the application, as well as
bypass capacitors for the device supply, are also important. Locate the bypass capacitor
(VCC and bootstrap capacitor) and feedback compensation components as close to the
device as practical. For over current programmability, place the ROCSET close to the device
and avoid leakage current paths on the COMP/OC pin, since the internal current source is
only 60 A.
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Systems that do not use the Schottky diode in parallel to the low-side MOSFET might show
big negative spikes on the phase pin. This spike must be limited within the absolute
maximum ratings (for example, adding a gate resistor in series to the HS MOSFET gate), as
well as the positive spike, but has an additional consequence: it causes the bootstrap
capacitor to be overcharged. This extra-charge can cause, in the worst case condition of
maximum input voltage and during particular transients, that boot-to-phase voltage
overcomes the absolute maximum ratings also causing device failures. It is then suggested
in this cases to limit this extra-charge by adding a small resistor in series to the boot
capacitor (one resistor in series to the BOOT).
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Figure 8. Drivers turn-on and turn-off paths
LS DRIVER
LS MOSFET
HS DRIVER
VCC
HS MOSFET
BOOT
CGD
RGATE
CGD
RINT
RGATE
LGATE
RINT
UGATE
CGS
CDS
GND
CGS
CDS
PHASE
DocID15726 Rev 2
19/36
36
Application information
L6728AH
10
Application information
10.1
Inductor design
The inductance value is defined by a compromise between the dynamic response time, the
efficiency, the cost and the size. The inductor has to be calculated to maintain the ripple
current (IL) between 20% and 30% of the maximum output current (typ.). The inductance
value can be calculated with the following relationship:
Equation 6
V IN – V OUT V OUT
L = ------------------------------ -------------F SW I L
V IN
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where FSW is the switching frequency, VIN is the input voltage and VOUT is the output
voltage.
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Increasing the value of the inductance reduces the current ripple but, at the same time,
increases the converter response time to a dynamic load change. The response time is the
time required by the inductor to change its current from initial to final value. Until the inductor
has not finished its charging time, the output current is supplied by the output capacitors.
Minimizing the response time can minimize the output capacitance required. If the
compensation network is well designed, during a load variation the device is able to set
a duty-cycle value very different (0% or 80%) from the steady state one. When this condition
is reached, the response time is limited by the time required to change the inductor current.
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20/36
DocID15726 Rev 2
L6728AH
10.2
Application information
Output capacitor(s)
The output capacitors are basic components to define the ripple voltage across the output
and for the fast transient response of the power supply. They depend on the output voltage
ripple requirements, as well as any output voltage deviation requirement during a load
transient.
During steady-state conditions, the output voltage ripple is influenced by both the ESR and
capacitive value of the output capacitors as follow:
Equation 7
V OUT_ESR = I L ESR
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Equation 8
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V OUT_C = I L --------------------------------------8 C OUT F SW
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Where IL is the inductor current ripple. In particular, the expression that defines VOUT_C
takes in consideration the output capacitor charge and discharge as a consequence of the
inductor current ripple.
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During a load variation, the output capacitors supply the current to the load or absorb the
current stored into the inductor until the converter reacts. In fact, even if the controller
recognizes immediately the load transient and sets the duty-cycle at 80% or 0%, the current
slope is limited by the inductor value. The output voltage has a drop that also in this case
depends on the ESR and capacitive charge/discharge as follow:
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Equation 9
Equation 10
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V OUT_ESR = I OUT ESR
L I OUT
V OUT_C = I OUT -------------------------------------
2 C OUT V L
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Where VL is the voltage applied to the inductor during the transient response
( D MAX V IN – V OUT for the load appliance or VOUT for the load removal).
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MLCC capacitors have typically low ESR to minimize the ripple but also have low
capacitance that do not minimize the voltage deviation during dynamic load variations. On
the contrary, electrolytic capacitors have big capacitance to minimize voltage deviation
during load transients while they do not show the same ESR values of the MLCC resulting
then in higher ripple voltages. For these reasons, a mix between the electrolytic and MLCC
capacitor is suggested to minimize the ripple as well as reducing voltage deviation in the
dynamic mode.
DocID15726 Rev 2
21/36
36
Application information
10.3
L6728AH
Input capacitors
The input capacitor bank is designed considering mainly the input RMS current that
depends on the output deliverable current (IOUT) and the duty-cycle (D) for the regulation as
follow:
Equation 11
I rms = I OUT D 1 – D
The equation reaches its maximum value, IOUT/2, with D = 0.5. The losses depend on the
input capacitor ESR and, in worst case, are:
)
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Equation 12
P = ESR I OUT 2
2
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DocID15726 Rev 2
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L6728AH
11
20 A demonstration board
20 A demonstration board
The L6728AH 20 A demonstration board realizes, in a two-layer PCB, a step-down DC/DC
converter and shows the operation of the device in a general-purpose high-current
application. Different output voltage rails have been considered: 8 V, 5 V, 3.3 V, 2.5 V, 1.25 V
and 0.8 V. The input voltage can range from a bottom value that depends on the chosen rail
up to 15 V buses (absolute maximum). The application can deliver an output current up to
the value fixed by ROCSET (~27 A).
Figure 9. 20 A demonstration board (left) and components placement (right)
)
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Figure 10. 20 A demonstration board’s top (left) and bottom (right) layers
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DocID15726 Rev 2
23/36
36
20 A demonstration board
L6728AH
Figure 11. 20 A demonstration board schematic
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DocID15726 Rev 2
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L6728AH
20 A demonstration board
Table 6. 20A demonstration board - bill of material (common components)
Qty.
Reference
Description
Package
Capacitors
2
C1, C2
Electrolytic capacitor 1800 F 16 V
Sanyo P/N 16ME1800WG
1
C10
MLCC, 100 nF, 50 V, X7R
Murata GRM188R71H104K
SMD0603
3
C11 to C13
MLCC, 4.7 F, 16 V, X7R
Murata GRM31CR71C475K
SMD1206
2
C14, C38
MLCC, 1 F, 16 V, X7R
Murata GRM21BR71C105K
SMD0805
48
C3 to C9, C15 to C20, C39 to
C59, C36, C37, C21 to C23,
C25 to C29, C31 to C34
Not mounted
1
C30
POSCAP 470 F, 6.3 V, 10 m
Sanyo P/N 6TPD470M
1
C24
MLCC, 47 nF, 50 V, X7R
Murata GRM188R71H473K
1
C35
MLCC, 100 pF, 50 V, X7R
Murata GRM188R71H101K
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R1, R2, R20, R17
5
5
1
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N.A.
SMD1206
SMD0603
Resistor, 2R2, 1/16W, 1%
SMD0603
R3, R5, R11, R12, R16
Resistor, 0R, 1/8W, 1%
SMD0805
R4, R10, R14, R15, R21
Not mounted
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R19
Resistor, 22 K, 1/16W, 1%
R18
Resistor, 18 K, 1/16W, 1%
1
L1
Wurth SMD power inductor
670 nH - 1.75 m - 40 A
P/N 744-315-067
1
L2
Not mounted
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Resistors
Radial 10 x 23 mm
N.A.
SMD0603
Inductor
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N.A.
Active components
1
D1
Diode, 1N4148
5
Q1 to Q4, Q8
Not mounted
1
Q5
STD70NH02L
1
Q7
STD95NH02L
1
U1
Controller, L6728AH
DocID15726 Rev 2
SOT23
N.A.
DPACK
VFDFPN 10,
3 x 3 mm
25/36
36
20 A demonstration board
L6728AH
11.1
Demonstration board description
11.1.1
Power input (VIN)
This is the input voltage for the power conversion. The high-side drain is connected to this
input. This voltage can range from 1.5 V to 12 V bus.
If the voltage is between 5 V and 12 V it can supply also the device (through the VCC pin)
and in this case the R16 (0 ) resistor must be present.
11.1.2
Output (VOUT)
)
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Different output voltage rails have been tested. For each rail a few components need to be
changed: these components are used to program the desiderated output voltage and to
compensate the system. The overcurrent-protection limit is set to ~27 A but it can be
changed by replacing the resistors R18.
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Table 7. Rail dependent components
Ref.
8 V rail
Q9
5 V rail
3.3 V rail
2.5 V rail
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1.25 V rail
0.8 V rail
Not mounted
R7
3.6 k
3.6 k
R6, R9
3.6 k
3.6 k
R8, R13
390
680
)-
so
3.6 k
3.6 k
11 k
11 k
4.7 k
4.7 k
22 k
22 k
1.5 k
2.2 k
39 k
Open
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Note:
All the previous resistors are the SMD 0603 package, 1/16 W, 1% tolerance.
11.1.3
Signal input (VCC)
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Using the input voltage VIN to supply the controller no power is required at this input.
However the controller can be supplied separately from the power stage through the VCC
input and, in this case, the R16 (0 ) resistor must be unsoldered.
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11.1.4
26/36
Test points
Several test points are provided to have easy access at the all important signal
characterizing the device:
–
COMP: the output of the error amplifier
–
FB: the inverting input of the error amplifier
–
PGOOD: signaling the regular functioning (active high)
–
VGDHS: the bootstrap diode anode
–
PHASE: the phase node
–
LGATE: the low-side gate pin of the device
–
HGATE: the high-side gate pin of the device.
DocID15726 Rev 2
L6728AH
11.2
20 A demonstration board
Demonstration board characterization
Figure 12 and Figure 17 show the electrical performances of the tamboured in terms of
accuracy and efficiency.
Figure 12. 20 A demonstration board performances
Input Voltage @ 12 V
0,3%
100%
0,2%
90%
Efficiency [%]
Output Voltage Error [%]
Load / Line Regulation
0,1%
0,0%
-0,1%
-0,2%
0A
5A
10A
15A
5
6
7
8
9
10
11
12
13
14
70%
Vout = 0.8 V
60%
2,5
5,0
7,5
Input Voltage [V]
90%
80%
70%
Vout = 0.8 V
Vout = 1.25 V
Vout = 2.5 V
Vout = 3.3 V
Vout = 5 V
2,5
5,0
7,5
10,0
12,5
15,0
Output Current [A]
17,5
20,0
)
(s
Efficiency [%]
Efficiency [%]
100%
90%
40%
0,0
Vout = 8 V
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12,5
15,0
17,5
20,0
22,5
25,0
Input Voltage @ 5 V
100%
50%
10,0
Output Current [A]
Input Voltage @ 8 V
60%
)
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Vout = 3.3 V
Vout = 5 V
40%
0,0
15
Vout = 1.25 V
Vout = 2.5 V
50%
20A
-0,3%
4
80%
70%
60%
so
50%
Ob
22,5
25,0
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80%
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Vout = 0.8 V
Vout = 1.25 V
Vout = 2.5 V
Vout = 3.3 V
40%
0
3
5
8
10
13
15
18
20
23
25
Output Current [A]
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DocID15726 Rev 2
27/36
36
5 A demonstration board
12
L6728AH
5 A demonstration board
The L6728AH 5 A demonstration board realizes, in a two-layer PCB, a step-down DC/DC
converter and shows the operation of the device in a general-purpose high-current
application. Different output voltage rails have been considered: 8 V, 5 V, 3.3 V, 2.5 V, 1.25 V
and 0.8 V. The input voltage can range from a bottom value that depends on the chosen rail
up to 15 V buses (absolute maximum). The application can deliver an output current up to
the value fixed by ROCSET (~6 A).
Figure 13. 5 A demonstration board (left) and components placement (right)
)
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Figure 14. 5 A demonstration board’s top (left) and bottom (right) layers
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DocID15726 Rev 2
L6728AH
5 A demonstration board
Figure 15. 5 A demonstration board schematic
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5 A demonstration board
L6728AH
Table 8. 5 A demonstration board - bill of material
Qty.
Reference
Description
Package
Capacitors
2
C12, C51
MLCC, 10 F, 16 V, X5R
Murata GRM31CR61C106K
SMD1206
1
C10
MLCC, 100 nF, 50 V, X7R
Murata GRM188R71H104K
SMD0603
2
C14, C38
MLCC, 1 F, 16 V, X7R
Murata GRM21BR71C105K
SMD0805
2
C39, C40
MLCC, 22 F, 6.3 V, X5R
Murata GRM31CR60J226K
SMD1206
2
C36
MLCC, 10 nF, 50 V, X7R
Murata GRM188R71H103K
1
C24
MLCC, 47 nF, 50 V, X7R
Murata GRM188R71H223K
1
C35
MLCC, 1 nF, 50 V, X7R
Murata GRM188R71H102K
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R1, R2, R17
3
R3, R5, R16
1
R14
2
R6, R9
2
R8, R13
1
1
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1
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R7
SMD0603
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Resistor, 3R3, 1/16 W, 1%
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Resistors
3
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Resistor, 0R, 1/8 W, 1%
Resistor, 51R, 1/8 W, 1%
Resistor, 2K2, 1/16 W, 1%
Resistor, 3K9, 1/16 W, 1%
SMD0603
Resistor, 270 R, 1/16 W, 1%
R19
Resistor, 22 K, 1/16 W, 1%
R18
Resistor, 18 K, 1/16 W, 1%
L1
Wurth SMD power inductor
1.8 H - 3.68 m - 20 A
P/N 744-318-180
Inductor
1
N.A.
Active components
30/36
1
D1
Diode, BAT54
1
Q5
Dual N-channel MOS,
STS8DNF3LL (the STS8DNH3LL
model can be used as well)
1
U1
Controller, L6728AH
DocID15726 Rev 2
SOT23
SO8
VFDFPN 10
3 x 3 mm
L6728AH
5 A demonstration board
12.1
Demonstration board description
12.1.1
Power input (VIN)
This is the input voltage for the power conversion. The high-side drain is connected to this
input. This voltage can range from 1.5 V to 12 V bus.
If the voltage is between 5 V and 12 V it can supply also the device (through the Vcc pin)
and in this case the R16 (0 ) resistor must be present.
12.1.2
Output (VOUT)
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Different output voltage rails have been tested. For each rail a few components need to be
changed: these components are used to program the desiderate output voltage. The OCP
limit is set to ~6 A but it can be changed by replacing the resistors R18.
Table 9. Rail dependent components
Ref.
8 V rail
5 V rail
3.3 V rail
R8, R13
240
430
680
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2.5 V rail
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1 k
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1.25 V rail
0.8 V rail
3.9 k
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Note:
All the previous resistors are the SMD 0603 package, 1/16 W, 1% tolerance.
12.1.3
Signal input (VCC)
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Using the input voltage VIN to supply the controller no power is required at this input.
However the controller can be supplied separately from the power stage through the VCC
input (5-12 V) and, in this case, the R16 (0 ) resistor must be unsoldered.
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12.1.4
Test points
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Several test points are provided to have easy access at all important signal characterizing
the device:
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–
COMP: the output of the error amplifier
–
FB: the inverting input of the error amplifier
–
PGOOD: signaling the regular functioning (active high)
–
VGDHS: the bootstrap diode anode
–
PHASE: the phase node
–
LGATE: the low-side gate pin of the device
–
the HGATE: the high-side gate pin of the device.
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5 A demonstration board
12.2
L6728AH
Demonstration board characterization
Figure 16 and Figure 17 show the electrical performances of the demonstration board in
terms of accuracy and efficiency.
Figure 16. 5 A demonstration board performances
Input Voltage @ 12 V
0,3%
100%
0,2%
90%
Efficiency [%]
Output Voltage Error [%]
Load / Line Regulation
0,1%
0,0%
-0,1%
-0,2%
0A
2.5A
5
6
7
8
9
10
11
12
13
14
70%
60%
0,5
1,0
1,5
2,0
90%
90%
Efficiency [%]
Efficiency [%]
100%
80%
70%
Vout = 0.8 V
Vout = 1.25 V
Vout = 2.5 V
Vout = 3.3 V
Vout = 5 V
0,5
1,0
1,5
2,0
2,5
3,0
uc
3,0
3,5
4,0
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Input Voltage @ 5 V
100%
40%
0,0
2,5
Vout = 8 V
Output Current [A]
Input Voltage @ 8 V
50%
Vout = 3.3 V
Vout = 5 V
Input Voltage [V]
60%
Vout = 1.25 V
Vout = 2.5 V
40%
0,0
15
3,5
4,0
4,5
Output Current [A]
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5,5
60%
50%
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5,0
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et
80%
70%
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Vout = 0.8 V
50%
5A
-0,3%
4
80%
4,5
5,0
Vout = 0.8 V
Vout = 1.25 V
Vout = 2.5 V
Vout = 3.3 V
5,5
40%
0,0
0,5
1,0
1,5
2,0
2,5
3,0
3,5
4,0
4,5
5,0
5,5
Output Current [A]
Figure 17. Demonstration boards power consumption at 0 A output current
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5A Demoboard Power Consumption
od
Power [W]
1,0
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0,8
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0,6
Pr
1,2
1,0
Power [W]
1,2
so
20A Demoboard Power Consumption
0,4
0,6
0,4
0,2
0,2
0,0
0,0
4
0,8
5
6
7
8
9
10
11
12
13
14
15
4
5
6
7
8
9
10
Input Voltage [V]
Input Voltage [V]
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L6728AH
13
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
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Package information
13.1
L6728AH
VFDFPN10 3 x 3 mm package information
Figure 18. VFDFPN10 3 x 3 mm package outline
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Table 10. VFDFPN10 3 x 3 mm package mechanical data
Pr
Dimensions (mm)
Symbol
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Min.
Typ.
Max.
0.80
0.90
1.00
A1
0.02
0.05
A2
0.70
A3
0.20
A
b
0.18
D
D2
2.21
34/36
2.26
2.31
3.00
1.49
e
L
0.30
3.00
E
E2
0.23
1.64
1.74
0.50
0.3
0.4
M
0.75
m
0.25
DocID15726 Rev 2
0.5
L6728AH
14
Revision history
Revision history
Table 11. Document revision history
Date
Revision
20-May-2009
1
Initial release
2
Updated VFDFPN 10 figure on page 1 (replaced by new
figure).
Updated Figure 18 on page 34 (replaced by new figure).
Updated Table 10 on page 34 (removed mils values).
Minor modifications throughout document.
01-Aug-2016
Changes
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L6728AH
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IMPORTANT NOTICE – PLEASE READ CAREFULLY
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STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and
improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on
ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order
acknowledgement.
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Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or
the design of Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2016 STMicroelectronics – All rights reserved
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