L6918A

L6918 L6918A 5 BIT PROGRAMMABLE MULTIPHASE CONTROLLER s s s s s s s s s s OUTPUT CURRENT IN EXCESS OF 100A ULTRA FAST LOAD TRANSIENT RESPONSE REMOTE SENSE BUFFER INTEGRATED 2A GATE DRIVERS 5 BIT VID VOLTAGE POSITIONING, VRM 9.0 0.6% INTERNAL REFERENCE ACCURACY DIGITAL 2048 STEP SOFT-START OVP & OCP PROTECTIONS Rdson or Rsense CURRENT SENSING 1200KHz EFFECTIVE SWITCHING FREQUENCY, EXTERNALLY ADJUSTABLE POWER GOOD OUTPUT AND INHIBIT PACKAGE: SO28 DESCRIPTION L6918A is a master device that it has to be combined with the L6918,slave, realizing a 4-phases topology, interleaved. The device kit is specifically designed to provide a high performance/high density DC/DC conversion for high current microprocessors and distributed power. Each device implements a dual-phase step-down controller with a 180° phase-shift between each phase. A precise 5-bit DAC allows adjusting the output voltage from 1.100V to 1.850V with 25mV binary steps. The high peak current gate drives affords to have high system switching frequency, typically of 1200KHz, and higher by external adjustement. The device kit assure a fast protection against OVP, UVP and OCP. An internal crowbar, by turning on the low side mosfets, eliminates the need of external protection. In case of over-current, the system works in Constant Current mode. SO28 ORDERING NUMBERS: L6918D, L6918AD L6918DTR, L6918ADTR s s APPLICATIONS s HIGH DENSITY DC-DC FOR SERVERS AND WORKSTATIONS SUPPLY FOR HIGH CURRENT MICROPROCESSORS DISTRIBUTED POWER s s PIN CONNECTIONS LGATE1 VCCDR PHASE1 UGATE1 BOOT1 VCC SGND COMP FB VPROG_OUT SYNC_OUT SLAVE_OK ISEN1 PGNDS1 1 2 3 4 5 28 27 26 25 24 PGND LGATE2 PHASE2 UGATE2 BOOT2 PGOOD VID4 VID3 VID2 VID1 VID0 OSC / INH / FAULT ISEN2 PGNDS2 LGATE1 VCCDR PHASE1 UGATE1 BOOT1 VCC SGND COMP FB VSEN FBR FBG ISEN1 PGNDS1 1 2 3 4 5 6 28 27 26 25 24 23 PGND LGATE2 PHASE2 UGATE2 BOOT2 PGOOD VPROG_IN SYNC_IN SLAVE_OK SYNC / ADJ SYNC_OUT OSC / INH / FAULT ISEN2 PGNDS2 L6918A (Master) 6 7 8 9 10 11 12 13 14 23 22 21 20 19 18 17 16 15 L6918 7 8 9 10 11 12 13 14 (Slave) 22 21 20 19 18 17 16 15 October 2002 1/35 L6918 L6918A L6918A (MASTER) DEVICE BLOCK DIAGRAM SYNC_ OUT ROSC / INH SGND VCCDR BOOT1 2 PHASE OSCILLATOR LOGIC PWM ADAPTIVE ANTI CROSS CONDUCTION HS UGATE1 PHASE1 SLAVE_OK SYNCH. CIRCUITRY P WM1 CU RREN T COR RECTIO N LOGIC AND PROTECTIONS CH1 OCP LS LGATE1 ISEN1 VCC VCC DR TO TAL CUR RENT CURR ENT A VG PGOOD CURRENT CURRENT READING CURRENT CURRENT READING CU RREN T COR RECTIO N PGNDS1 PGND PGNDS2 ISEN2 CH2 OCP CH1 OCP DIGITAL SOFT- STAR T CH2 OCP I FB LOGIC PWM A DAPTIVE ANTI CROSS CONDUCTION LS LGATE2 VID4 VID3 VID2 VID1 VID0 PHASE2 HS UGATE2 BOOT2 P WM2 DAC ERROR AMPLIFIER Vc c VSEN FB COMP Vcc L6918 (SLAVE) DEVICE BLOCK DIAGRAM SLAVE / ADJ SYNC_OUT ROSC / INH SGND VCCDR BOOT1 SYNC_I N SYNCH. CIRCUITRY SLAVE_OK 2 PHASE OSCILLATOR P WM1 LOGIC LOGIC PWM ADAPTIVE ANT I CROSS CONDUCTION HS UGATE1 PHASE1 CU RREN T COR RECTIO N LOGIC AND PROTECTIONS CH1 OCP LS LGATE1 ISEN1 VCC VCC DR TO TAL CUR RENT CURR ENT A VG PGOOD CURRENT CURRENT READING CURRENT CURRENT READING CU RREN T COR RECTIO N PGNDS1 PGND PGNDS2 ISEN2 CH2 OCP CH1 OCP 1 0k CH2 OCP FBG FBR 10 k 10 k I FB LOGIC PWM A DAPTIVE AN TI CROSS CONDUCTION VPROG_IN LS LGATE2 PHASE2 HS UGATE2 BOOT2 P WM2 1 0k REMOTE BUFFER ERROR AMPLIFIER V SEN VSEN Vc c FB COMP Vcc 2/35 L6918 L6918A ABSOLUTE MAXIMUM RATINGS Symbol Vcc, VCCDR VBOOT-VPHASE VUGATE1-VPHASE1 VUGATE2-VPHASE2 LGATE1, PHASE1, LGATE2, PHASE2 to PGND VID0 to VID4 All other pins to PGND VPHASEx Sustainable Peak Voltage t35µA): the device enters in Quasi-Constant-Current operation. The low-side mosfets stays ON until IINFO becomes lower than 35µA skipping clock cycles. The high side mosfets can be turned ON with a TON imposed by the control loop at the next available clock cycle and the device works in the usual way until another OCP event is detected. The device limits the bottom of the inductor current triangular waveform. So the average current delivered can slightly increase also in Over Current condition since the current ripple increases. In fact, the ON time increases due to the OFF time rise because of the current has to reach the I OCP bottom. The worst-case condition is when the duty cycle reaches its maximum value (d=50% internally limited). When this happens, the device works in Constant Current and the output voltage decrease as the load increase. Crossing the UVP threshold causes the Slave device to pull down the SLAVE_OK line. All mosfets are turned off and all the devices involved in the regulation stop working. Cycle the power supply to restart operation. Figure 6 shows the constant current working condition RSENSE IPHASE 15/35 L6918 L6918A Figure 6. Constant Current operation Ipeak IMAX IOCPx UVP Vout Droop effect TonMAX TonMAX (IFB=50µA) (I FB =70µA 2·IOCPx Iout IMAX,TO It can be observed that the peak current (Ipeak) is greater than the 140% but it can be determined as follow: VIN – Voutmin V IN – Vout MIN I peak = IOCPx + ------------------------------------ ⋅ Ton MAX = IO CPx + ------------------------------------- ⋅ 0.5 ⋅ T L L Where VoutMIN is the minimum output voltage (UVP threshold). The device works in Constant-Current, and the output voltage decreases as the load increase, until the output voltage reaches the under-voltage threshold (VoutMIN). When this threshold is crossed, all mosfets are turned off, the FAULT pin is driven high and the device stops working. Cycle the power supply to restart operation. The maximum average current during the Constant-Current behavior results: Ipeak – I OCP x IMA X ,T OT = 2 ⋅ I MAX = 2 ⋅  IO CPx + ------------------------------------- -  2 In this particular situation, the switching frequency results reduced. The ON time is the maximum allowed (TonMAX) while the OFF time depends on the application: Ipea k – IOCPx TOF F = L ⋅ ------------------------------------VO UT 1 f = -----------------------------------------Ton MAX + T OF F Over current is set anyway when I INFOx reaches 35µA. The full load value is only a convention to work with convenient values for IFB. Since the OCP intervention threshold is fixed, to modify the percentage with respect to the load value, it can be simply considered that, for example, to have on OCP threshold of 170%, this will correspond to IINFOx = 35µA (IFB = 70µA). The full load current will then correspond to IINFOx = 20.5µA (IFB = 41µA). INTEGRATED DROOP FUNCTION The devices use the droop function to satisfy the requirements of high performance microprocessors, reducing the size and the cost of the output capacitor. This method "recovers" part of the drop due to the output capacitor ESR in the load transient, introducing a dependence of the output voltage on the load current As shown in figure 7, the ESR drop is present in any case, but using the droop function the total deviation of the output voltage is minimized. In practice the droop function introduces a static error proportional to the output current that can be represented by an equivalent output resistance ROUT. Since the device has an average current mode regulation, the information about the total current delivered is used to implement the Droop Function. This current (equal to the sum of both IINFOx) is sourced from the FB pin. Connecting a resistor between this pin and Vout, the total current information flows only in this resistor because the compensation network between 16/35 L6918 L6918A FB and COMP has always a capacitor in series (See fig. 8). The voltage regulated by each device is then equal to: R SENSE V OUT = VID – RFB ⋅ I F B = VID – R F B ⋅ --------------------- ⋅ IOUT Rg Where IOUT is the output current of each device (equal to the total load current I LOAD divided by the number of devices N) Since IFB depends on the current information about the two phases of each device, the output characteristic vs. load current is given by: RSENSE R S ENSE IL OAD VOUT = VID – RFB ⋅ I O UT = VID – R F B ⋅ --------------------- ⋅ I OUT = VID – R F B ⋅ --------------------- ⋅ --------------Rg Rg 2 Where ROUT is the equivalent output resistance due to the droop function and IOUT is still the output current of each device (that is the total current delivered to the load ILOAD divided by 2. Figure 7. Output transient response without (a) and with (b) the droop function E RD O S RP E RD O S RP M V AX N V OM D V ROOP M V IN (a) (b) Figure 8. Active Droop Function Circuit VDROOP To VOUT RFB COMP FB Total Current Info (IINFO1+IINFO2 ) Ref The feedback current is equal to 50µA at nominal full load (IFB = IINFO1 + IINFO2) and 70µA at the OCP intervention threshold, so the maximum output voltage deviation is equal to: ∆ V FULL _POSITIVE_LOAD = +R F B ⋅ 50 µ A ∆ V O L_INTERVENTION = +RF B ⋅ 70 µ A 17/35 L6918 L6918A Droop function is provided only for positive load; if negative load is applied, and then IINFOx