L9177ATR

L9177A Datasheet Automotive engine management control IC for small engines Features TQFP64 exposed pad down • • GADG1606171506PS • • • • • 3 relay drivers – 2 with parallel and serial driving, 1 with serial driving – Output internally clamped to 45 V – Minimum guaranteed output current 1 A – Ron 1.5 Ω worst case (at Tj = 150 °C) • Tachometer driver – Parallel and serial driving – Minimum guaranteed output current 25 mA – Ron 5 Ω worst case (at Tj = 150 °C) • Current limited low side driver (LSD) – Serial driving – Output internally clamped to 45 V – Minimum guaranteed output current 1 A (2 A during in-rush) – Ron 1.5 Ω worst case (at Tj = 150 °C) • Stepper motor driver – Parallel driving – Minimum guaranteed output current 500 mA - full step – Ron 2.6 Ω worst case on the diagonal (at Tj = 150 °C) • O2 sensor heater – Parallel and serial driving – Output internally clamped to 45 V – Minimum guaranteed output current 3 A – Ron 0.5 Ω worst case (at Tj = 150 °C) • Protected high side driver – 100 mA min. current limitation threshold Product status link L9177A Product summary Order code Package Packing L9177ATR TQFP64 (10x10 mm), exposed pad down (7.5x7.5 mm) Tape and reel AEC-Q100 qualified Supply voltage from 6 V to 18 V – Basic functionality guaranteed down to 3.9 V 5 V regulator up to 300 mA with thermal shutdown protection in current limitation condition 5 V tracking regulator up to 40 mA and short to battery protection 5 V standby regulator up to 2.5 mA 2 channels injectors drivers – Parallel and serial driving – Output internally clamped to 60 V – Minimum overcurrent at 2.8 A – Ron 0.6 Ω worst case (at Tj = 150 °C) DS12175 - Rev 5 - November 2020 For further information contact your local STMicroelectronics sales office. www.st.com L9177A • • • • • • Full diagnosis by SPI – Injector driver: OL, STG, OC – Relay and current limited LSD drivers: OL, STG, OC – O2 sensor heater: OL, STG, OC – Tachometer: OL, STG, OC – Stepper motor driver: OL, STG, STB, OC – general diagnostic: over-temperature Protection for STB, STG (for stepper motor drivers and tracking regulator) Self configuring variable reluctance sensor interface K-line transceiver Microcontroller reset logic Small Factor form package TQFP64 10 x 10 mm exposed pad down Description L9177A is a device realized in ST BCD proprietary technology, able to provide the full set of power supplies and signal preprocessing peripherals needed to control a 2 Cylinder internal combustion Engine for Low End Application (e.g. small motorcycle, K-car, nautical engines, etc.). L9177A integrates a 5 V 300 mA main voltage regulator, a 5 V 40 mA tracking regulator for sensor supply and a 2.5 mA 5 V standby regulator. The two channels injector drivers, the O2 sensor heater and two relay drivers can be controlled both with parallel input and with SPI interface. One additional relay driver and the current limited low side driver are controlled by SPI. The stepper motor driver is designed for a double winding coil motor, used for engine idle speed control. Low side drivers implement SR control to minimize emission. A protected 50 mA high side driver is provided. A Variable Reluctance Sensor interface allows the connection to a commercial magnetic pick-up, allowing the indirect measurement of internal combustion engine crank angle. A K-line (standard ISO-9141 compatible) is provided as data communication interface. All functionalities are fully protected and provide complete diagnostics via a 24-bit SPI interface. An overall protection against over temperature is provided as well. The device is available in TQFP64 10x10 mm package with exposed pad for power dissipation optimization. DS12175 - Rev 5 page 2/55 L9177A Block diagram and pin description 1 Block diagram and pin description 1.1 Block diagram Figure 1. Block diagram VDD VDD_TRK VDD_SB HS_OUT VB_1 5V regulator 300mA 5V tracking Vreg 40mA 5V st-by V reg2.5mA Standby mode Operating mode KEY RESET RESET IN1 VRIN+ VROUT INJECTOR DRIVER (2 CHANNEL) Diagnosis Open Load Over-current Short to GND IN2 VRIN- HS switch 100mA Variable Reluctance Sensor Interface PWM INJ1 INJ2 GND_INJ1 GND_INJ2 STEPPER MOTOR DRIVER Diagnosis Open Load Over-current Short to GND/VB VB DIR Over-current>2.8A 60V Clamp RON 0.5 ohm Over-current>0.7A RON 2.6 ohm OUTA OUTB OUTC OUTD EN Current Reference Generator REXT ILS_TACH TACHOMETER DRIVER Diagnosis Open Load Over-current Short to GND Over-current>0.1A RON 5 ohm O2 SENSOR HEATER INO2H Diagnosis Open Load Over-current Short to GND SI /CS O2H GND O2H SPI SO Over-current>4A 60V Clamp RON 0.5 ohm TACH SCK RELAY DRIVER (3 CHANNELS) Diagnosis Open Load Over-current Short to GND IN_REL1 IN_REL2 Over-current>1.2A 45V Clamp RON 0.5 ohm REL1 REL2 REL3 GND_P_1 CURRENT LIMITED LOW SIDE DRIVER KL_TX K-LINE KL_RX KL_LINE Diagnosis Open Load Over-current Short to GND Over-current>1.2A (2A in-rush) 45V Clamp RON 1.5 ohm L GND_P_2 GND_A/GND_P GAPGPS00585 DS12175 - Rev 5 page 3/55 L9177A Pin description 1.2 Pin description VDD_SB VB OUTD OUTC NC NC NC GND GND NC OUTB NC OUTA NC VB_1 EN Figure 2. Pin connection (top view) 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 DIR 1 48 PWM NC 2 47 NC VDD_TRK 3 46 VDD REXT 4 45 KL_UNE HS_OUT 5 44 KL_RX VRIN+ 6 43 KL_TX VRIN- 7 42 INJ2 VROUT 8 41 IN2 O2H 9 40 GND_NJ2 TACH 10 39 GND_NJ1 ILS_TAC 11 38 IN1 GND_O2H 12 37 INJ1 NC 13 36 KEY INO2H 14 35 CS RESET 15 34 SCK IN-REL2 16 33 SI L SO L NC REL3 GND_P_2 NC NC NC REL1 NC GND_P_1 REL2 NC NC IN_REL1 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 GAPG0403151617PS Table 1. Pin function DS12175 - Rev 5 Pin # Pin name 1 DIR 2 NC 3 VDD_TRK 4 REXT 5 HS_OUT 6 I/O type Class Logic input to set stepper motor direction I SIGNAL Not connected - - Tracking voltage regulator output O PWR External resistor for precision current reference I SIGNAL High side switch output O PWR VRIN+ VRS positive differential input I SIGNAL 7 VRIN- VRS negative differential input I SIGNAL 8 VROUT VRS output O SIGNAL 9 O2H O2 sensor heater output O PWR 10 TACH Tachometer driver output O PWR 11 ILS_TACH Tachometer driver input I SIGNAL 12 GND_O2H O2 sensor heater ground GND PWR 13 NC 14 INO2H Description Not connected - - O2 sensor heater input I SIGNAL page 4/55 L9177A Pin description DS12175 - Rev 5 Pin # Pin name 15 RESET 16 Description I/O type Class Reset signal to the micro O SIGNAL IN_REL2 Relay 2 parallel control input I SIGNAL 17 IN_REL1 Relay 1 parallel control input I SIGNAL 18 NC Not connected - - 19 NC Not connected - - 20 REL2 Relay 2 driver output O PWR 21 GND_P_1 Power ground relay 1-2 O PWR 22 NC Not connected - - 23 REL1 Relay 1 driver output O PWR 24 NC Not connected - - 25 NC Not connected - - 26 NC Not connected - - 27 REL3 Relay 3 driver output O PWR 28 GND_P_2 GND PWR 29 NC Not connected - - 30 L Current limited LSD driver output O PWR 31 L Current limited LSD driver output O PWR 32 SO SPI data out O SIGNAL 33 SI SPI data in I SIGNAL 34 SCK SPI serial clock I SIGNAL 35 CS SPI chip select I SIGNAL 36 KEY Key signal I SIGNAL 37 INJ1 Injector 1driver power output O PWR 38 IN1 Injector 1 driver input command I SIGNAL 39 GND_INJ1 Injector 1 ground GND PWR 40 GND_INJ2 Injector 2 ground GND PWR 41 IN2 Injector 2 driver input command I SIGNAL 42 INJ2 Injector 2 driver power output O PWR 43 KL_TX K-Line TX digital IN I SIGNAL 44 KL_RX K-Line RX digital OUT O SIGNAL 45 KL_LINE K-Line I/O PWR 46 VDD 5 V voltage regulator output O PWR 47 NC Not connected - - 48 PWM Logic Input to set Stepper Motor Speed I SIGNAL 49 VDD_SB 5 V standby voltage regulator output O PWR 50 VB Battery line to bridge 2 I PWR 51 OUTD Output bridge 2 O PWR 52 NC Not connected - - 53 OUTC Output bridge 2 O PWR 54 NC Not connected - - Power ground for current limited LSD page 5/55 L9177A Pin description DS12175 - Rev 5 Pin # Pin name 55 NC 56 GND 57 GND 58 NC 59 Description I/O type Class - - Analog and power ground GND PWR Analog and power ground GND PWR Not connected - - NC Not connected - - 60 OUTB Output bridge 1 O PWR 61 OUTA Output bridge 1 O PWR 62 NC Not connected - - 63 VB_1 Battery line to bridge1 I PWR 64 EN Logic input to enable stepper motor I SIGNAL - Pad Exposed pad GND PWR Not connected page 6/55 L9177A Electrical specifications 2 Electrical specifications 2.1 Operating range The device may not operate properly if maximum operating conditions are exceeded. Table 2. Operating conditions Parameter Value Unit VB, VB_1 supply voltage 6 to 18 (1) V I/O logic 0 to VDD V -0.3 to VB, VB_1 V -0.3 to clamp voltage V Stepper motor outputs Low side outputs 1. See Section 2.1.1 . 2.1.1 Supply voltage • • Below 3.9 V the device is in a safety state (internal circuitries are on but all the outputs are off). From 3.9 V to 5.5 V (Functionalities during Crank phase): – Reset function; VDD > 3.3 V (rds-on state) IVDD = 100 mA; 3.3 V < VDD_TRK < VDD (rds-on state); – – • From 5.5 V to 6 V (low battery): – All the functions are granted with the following degraded parameters; VDD > 4.510 V; Tracking error < 100 mV (Iload = 40 mA, rds-on state). • • From 6 V to 18 V: normal operating range From 18 V to VB_off: • – All the functions are granted with increased power dissipation and no reset is asserted during transient. From VB_off to 40 V (internal circuitries are on but all the outputs are off): – 2.2 Low-sides, K-Line, H-Bridge OFF if Reset = 0; SPI not available, internal registers resetted if Reset = 0; All Diagnosis disabled if Reset = 0; VRS function limited (Vdiff max = 1000 mV) The device is on and in a safety state. Absolute maximum ratings Maximum ratings are absolute ratings; exceeding any one of these values may cause permanent damage to the integrated circuit. Table 3. Absolute maximum ratings Parameter DS12175 - Rev 5 Condition Min Max Unit DC supply voltage pin VB/VB_1 -0.3 40 V I/O low voltage pins(1) - -0.3 7 V I/O low voltage digital pins (2) - -0.3 VDD+0.3 V I/O power pins voltage range (3) - -0.3 Clamp voltage V TACH pin - -0.3 40 V OUTA-D - -0.3 VB +0.3 V KEY pin To be protected with R_key to limit sourced/ sinked current to ± 5 mA in dc conditions -0.3 and ±20 mA during transients 10 V page 7/55 L9177A Absolute maximum ratings Parameter Condition Min Max Unit -0.3 VDD + 0.3 V (ISO-pulses on battery line) VRIN- / VRIN+ Max current |20 mA| to be limited with external resistors VDD_TRK pin - -2 40 V KL_LINE pin - -16 40 V Maximum voltage shift between GND pins PIN GND, GND_O2H, GND_P_1,2, GND_INJ1,2, GNDA, GNDP -0.3 0.3 V Injector drivers - 50 mJ O2 sensor heater - 60 mJ Relay/current limited drivers - 25 mJ Injector drivers - 18 mJ O2 sensor heater - 22 mJ Relay/current limited drivers - 8 mJ Static (room temperature, max reverse diode voltage 1.5 V) - 2.5 Dynamic (guarantee by iso-pulse test immunity on application board) - - - 2.2 - - Static (room temperature, max reverse diode voltage 1.5 V) - 1.2 Dynamic (guarantee by iso-pulse test immunity on application board) - - Static (room temperature, max reverse diode voltage 1.5 V) - 1.5 Dynamic (guarantee by iso-pulse test immunity on application board) - - Static (room temperature, max reverse diode voltage 1.5 V) - 0.5 Dynamic (guarantee by iso-pulse test immunity on application board) - - I/O power pins (3)maximum energy (single pulse, max. current) I/O power pins (3)maximum energy (continuous pulse, max. current, 36 million pulses with T = 100 ms) Reverse current through O2H output without supply voltage (4) Static (room temperature, max reverse Reverse current through INJx outputs without supply diode voltage 1.5 V) voltage (4) Dynamic (guarantee by iso-pulse test immunity on application board) Reverse current through L output without supply voltage (4) Reverse current through RLYx outputs without supply voltage (4) Reverse current through TACH output without supply voltage (4) A A A A A 1. Pins are VDD, VDD_SB, REXT, DIR 2. Pins are CS, SCK, SI, SO, VROUT, RESET, PWM, EN, INO2H, ILS_TACH, IN, KL_TX, KL_RX 3. Pins are O2H, L, INJ1-2, REL1-2-3 4. Reverse battery connection, parameter not tested for info only Table 4. ESD protection Item Min Max Unit HBM -2 2 kV All pins MM -200 200 V All pins CDM (values for corner pins in brackets) -500 / (-750) 500 / (750) V Pins to connector (3) HBM -4 4 kV All pins (1)(2) Condition 1. OUTA-D, TACH, O2H, L, INJ1-2, REL1-2-3 vs. GNDP2, GNDO2: -1.5 / 1.5 kV 2. OUTA-D, TACH, O2H, L, INJ1-2, REL1-2-3 vs. GNDP1: -1 / 1 kV DS12175 - Rev 5 page 8/55 L9177A Latch-up test 3. Pins are OUTA-D, TACH, O2H, L, INJ1-2, KEY, REL1-2-3,VB,KL_LINE, VDD_TRK all GND connected together. The device is AEC-Q100 compliant. 2.3 Latch-up test According to JEDEC 78 class 2 level A. 2.4 Temperature ranges and thermal data Table 5. Temperature ranges and thermal data Symbol Parameter Min Max Unit Operating temperature (ECU environment) -40 125 °C Operating junction temperature -40 150 °C Tstg Storage temperature -40 150 °C Tot Thermal shut-down temperature 155 200 °C OThys Thermal shut-down temperature hysteresis 10 RTh j-amb Thermal resistance junction-to-ambient (1) 20 °C/W RTh j-case Thermal resistance junction-to-case 2 °C/W Tamb Tj °C 1. with 2s2p PCB thermally enhanced. 2.5 Electrical characteristics VB = 6 V to 18 V, Tamb = -40 °C to 125 °C. 2.5.1 Supply Table 6. Supply electrical characteristics Symbol Parameter Condition Min Typ Max Unit VB Operating supply voltage range - 6 - 18 V VB_off Vbat switch off threshold voltage - 30 32 34 V VB OVh Overvoltage threshold hysteresis - 0.5 - - V VB UVL Undervoltage disable LOW threshold - 3.5 3.7 3.9 V VB UVh Undervoltage threshold hysteresis - 0.3 - 1 V IVB(dis) Standby current from VB, VB_1 VB = VB_1 = 13 V, device disabled, KEY < 0.7 V - - 120 µA Quiescent current VB = VB_1 = 13 V, outputs floating - - 20 mA ASIC Bias reference Application info - 1.22 - V Internal clock reference Application info - 5.6 - MHz Tdgc_VB_OV VB overvoltage shut-down filter time Guaranteed by scan 22.5 30 37.5 µs Tdgc_VB_UV VB undervoltage shut-down filter time Guaranteed by scan 0.8 1 1.2 µs IVB Vrext fint_clk DS12175 - Rev 5 page 9/55 L9177A Electrical characteristics 2.5.2 Key Table 7. Key electrical characteristics Symbol Parameter Condition Min Typ Max Unit V_Key_L Input level low - - - 1.5 V V_Key_H Input level high - 3.3 - - V Input voltage hysteresis - 0.5 - 1.8 V Internal pull down - 50 150 300 kΩ Guaranteed by scan 26 - 40 µs - - 200 µs V_Key_Hyst R_Key T_key_deglitch Key input filter time T_key_delay Maximum delay time from Key to regulator enable Time from key rising edge to 20% VDD rising edge Figure 3. Input threshold OFF V_Key_Hyst V_Key_L ON V_Key_H GADG1911180723PS Figure 4. Key block diagram GAPGPS00588 2.5.3 Digital pins Table 8. Digital pins characteristics Symbol Parameter Condition Min Typ Max Unit V in_L Input level low - - - 0.3*VDD V V in_H Input level high - 0.7*VDD - - V V h in Input voltage hysteresis - 0.1 - - V R_pull Internal pull-down/pull-up (1)(2)(3) - 50 150 250 kΩ Active pull-down - 10 - 100 µA I_pull_down 1. Pins with active pull-down: DIR. 2. Pins with pull-down: EN, PWM, ISL-TACH, INO2H, IN_REL1-2, IN1-2; 3. Pins with pull-up: SI, SCK, CS, KL-TX; DS12175 - Rev 5 page 10/55 L9177A Electrical characteristics 2.5.4 Digital output pins Table 9. Digital output pins characteristics Symbol Parameter Condition Min Typ Max Unit - - 0.4 V VDD-0.5 - - V I sink= 2mA Output level low I source= 2mA Output level high (1)(2) 1. Pins with push-pull stage and tri-state condition: SDO 2. Pins with open drain output: RESET, VROUT; 2.5.5 5 V voltage regulator Table 10. VDD output electrical characteristics Symbol VDD Parameter Output voltage Condition VB = 6 V to 18 V Min Typ Max Unit 4.9 5 5.1 V -25 - 25 mV -25 - 25 mV Ln_vdd Line regulation Ld_vdd Load regulation Vdd_OS Max overshoot Recovery from ISO pulse stimuli on battery line (guaranteed by design) - - 5.5 V Vdd_SR Voltage slew-rate at power-on Cload = 4.7 µF 2 - 25 V/ms Load current - 5 - 300 mA Idd_max Current limitation Output short to 4 V 350 - 600 mA Idd_STG Short to ground current limitation Output shorted to GND 350 - 700 mA PSRR Power supply rejection ratio Sin wave @ 1 kHz 1 Vpp; VB = 13 V; Iload = 5 mA to 300 mA 40 - - dB VB - Vdd - Vdddropout voltage VB = 5 V; Iload = 300 mA 0.30 - 0.75 V 22.5 30 37.5 µs Idd Vdr5 Iload = 150 mA VB = 13 V Iload = 5 mA to 300 mA Tdcg_VDD VDD thermal shutdown filter time Guaranteed by scan DS12175 - Rev 5 page 11/55 L9177A Electrical characteristics Figure 5. 5 V main regulator block diagram GADG0412171216PS 2.5.6 Reset Table 11. Reset function electrical characteristics Symbol Parameter Condition Min Typ Max Unit VUV_LO Output low voltage 1 < VDD < Vth_UV, Ireset = 2 mA - - 0.6 V IUV_LO Reset current capability 1 < VDD < Vth_UV, Vreset = 0.6 V 2 - - mA Leakage current VUV_reset = 4.5 V - - 1 µA Vth_UV VDD under voltage low threshold VB= 13.5 V 4.5 - VDD - 150 mV V Vth_UV Tht VDD under voltage high threshold - 4.5 - VDD - 50 mV V VDD under voltage hysteresis - 50 - - mV Power on UV reset delay - 17 22 30 ms UV reset filter VDD < Vth_UV 25 50 75 µs Ilk Vth_UV HYS Td_UV_ rst TfUV_reset Figure 6. Reset GAPGPS00590 DS12175 - Rev 5 page 12/55 L9177A Electrical characteristics 2.5.7 5 V tracking voltage regulator Table 12. VDD_TRK output electrical characteristics Symbol DVddtrk Vshort Parameter Condition VB = 6 V, Output voltage tracking error Itrk= 1 to 40 mA Min Typ Max Unit -15 - 15 mV Tracking output short circuit voltage range - -2 - VB V Output current limitation Output short to 4 V 50 - 100 mA Tracking output reverse current (limited by the regulator) Output shorted to VB = 16 V - - 10 mA Load current - 1 - 40 mA Ln_vdd_trk Line regulation V B= 6 V to 18 V - Iload= 40 mA -15 - 15 mV Ld_vdd_trk Load regulation V B= 13 V Iload = 1 to 40 mA -15 - 15 mV 40 - - dB Itrk_max Itrk_sb Idd PSRR Sin wave @ 1 kHz 1 Vpp Power supply rejection ratio VB = 13 V, Iload = 1 to 40 mA Figure 7. 5 V tracking regulator block diagram 5V_internal GADG0412171138PS 2.5.8 Standby regulator Table 13. VDD_SB output electrical characteristics Symbol Parameter Condition Min Typ Max Unit 4.75 5 5.25 V -25 - 25 mV -25 - 25 mV Vddsb Output voltage Ln_vsb Line regulation Ld_vsb Load regulation Vdd_OS Max overshoot - - - 5.5 V Load current - 0.1 - 2.5 mA Idd DS12175 - Rev 5 VB = 6 V to 18 V Iload = 1 mA VB = 13 V Iload= 0.1 mA to 2.5 mA page 13/55 L9177A Electrical characteristics Symbol Parameter Condition Min Typ Max Unit Isb_max Current limitation Output short to 4 V 5 - 50 mA Vsb_SR Voltage slew-rate at power on Cload = 1 µF 2 - 30 V/ms 40 - - dB Sin wave @ 1 kHz 1 Vpp PSRR Power supply rejection ratio VB = 13 V Iload = 0.1 to 1 mA Figure 8. 5 V standby regulator block diagram 1µF GAPGPS00592 2.5.9 High side switch Table 14. HS_OUT output electrical characteristics Symbol Parameter Condition Min Typ Max Unit Ron_hs Ron Ihs = 50 mA - - 14 Ω Ihs_max Current limitation VB = 13.5 V 100 - 400 mA DS12175 - Rev 5 page 14/55 L9177A Electrical characteristics Figure 9. High-side driver block diagram GAPGPS00593 The High side switch is intended as a protected battery and is directly controlled by key input (see Figure 21). 2.5.10 Injector driver Table 15. Injector driver electrical characteristic Symbol Parameter Condition Min Typ Max Unit I max Output current - - - 2.2 A I_oc Overcurrent threshold - 2.8 - 5 A VDS Output clamping voltage I = 2.2 A 55 - 65 V Ron On resistance I = 2.2 A - - 0.6 Ω Ilk_off Leakage current Vout= 18 V, Key = 0 V - - 10 µA Ilk_on Pull-Down diagnosis current V out= 18 V, Key = 5 V - - 100 µA ton-off Turn on-off delay from CMD edge to 50% output variation - - 6 µs Open load output voltage Driver in OFF condition 0.46*VDD 0.5*VDD 0.54*VDD V Diagnostic high threshold Driver in OFF condition 0.54*VDD 0.6*VDD 0.66*VDD V Diagnostic low threshold Driver in OFF condition 0.36*VDD 0.4*VDD 0.44*VDD V OFF diagnostic masking time Guaranteed by scan 0.75 1 1.25 ms Tdcg_noise OFF diagnostic Deglitch filter time Guaranteed by scan 2.16 3.6 5.04 µs Tdcg ON diagnostic Deglitch filter time Guaranteed by scan 15 20 25 µs VOL Vdiagth_H (1) V diagth_L (1) Tmask 1. Vdiagth_L < Vout < Vdiagth_H → Open Load; Vout< Vdiagth_L → Short to GND DS12175 - Rev 5 page 15/55 L9177A Electrical characteristics Figure 10. Low-side driver block diagram GAPGPS00594 Figure 11. Low-side timing diagram (injectors, relays, current limited LSD, tach, O2H) VDD V in_H V in_L VIN 0V ton_off ton_off VB VOUT 50% 50% GADG0412170937PS DS12175 - Rev 5 page 16/55 L9177A Electrical characteristics 2.5.11 Relay drivers Table 16. Relay driver characteristics Symbol Parameter Condition Min Typ Max Unit Imax Output current - - - 1 A I_oc Overcurrent threshold - 1.2 - 2.5 A VDS Output clamping voltage I=1A 40 - 50 V Ron On resistance I=1A - - 1.5 Ω Ilk_off Leakage current Vout = 18 V, Key = 0 V - - 10 µA Ilk_on Pull-Down diagnosis current Vout = 18 V, Key = 5 V - - 100 µA ton_off Turn on-off delay From CMD (serial or parallel) rising edge - - 6 µs VOL Open load output voltage Driver in OFF condition 0.46*VDD 0.5*VDD 0.54*VDD V Vdiagth_H (1) Diagnostic high threshold Driver in OFF condition 0.54*VDD 0.6*VDD 0.66*VDD V Vdiagth_L (1) Diagnostic low threshold Driver in OFF condition 0.36*VDD 0.4*VDD 0.44*VDD V OFF diagnostic masking time Guaranteed by scan 2.63 3.5 4.38 ms Tdcg_noise Tmask OFF diagnostic Deglitch filter time Guaranteed by scan 2.16 3.6 5.04 µs Tdcg ON diagnostic Deglitch filter time Guaranteed by scan 15 20 25 µs Min Typ Max unit 1. Vdiagth_L < Vout < Vdiagth_H → Open Load; Vout < Vdiagth_L → Short to GND 2.5.12 Current limited low side driver (LSD) Table 17. Current limited LSD driver characteristics Symbol Parameter Condition ILI Linear current limitation VB = 18 V, settling time = 300 µs 2 - 2.45 A Ioc Overcurrent threshold Masked for driver during in-rush 1.2 - 1.95 A Diagnosis masking time in OFF condition Guaranteed by scan 2 - 5 ms VDS Output clamping voltage I = 200 mA 40 - 50 V Ron On resistance I = 200 mA - - 1.5 Ω Ilk_off Leakage current Vout = 18 V, Key = 0 V - - 10 µA Ilk_on Pull-Down diagnosis current Vout = 18 V, Key = 5 V - - 100 µA ton_off Turn on-off delay From SPI CS rising edge - - 6 µs VOL Open load output voltage Driver in OFF condition 0.46*VDD 0.5*VDD 0.54*VDD V Vdiagth_H (1) Diagnostic high threshold Driver in OFF condition 0.54*VDD 0.6*VDD 0.66*VDD V Vdiagth_L (1) Diagnostic low threshold Driver in OFF condition 0.36*VDD 0.4*VDD 0.44*VDD V OFF diagnostic masking time Guaranteed by scan 2.63 3.5 4.38 ms Tdcg_noise OFF diagnostic Deglitch filter time Guaranteed by scan 2.16 3.6 5.04 µs Tdcg ON diagnostic Deglitch filter time Guaranteed by scan 15 20 25 µs ON diagnostic inrush current mask time Guaranteed by scan 252 336 420 µs tdgmsk Tmask Tmask_rush DS12175 - Rev 5 page 17/55 L9177A Electrical characteristics 1. Vdiagth_L < Vout < Vdiagth_H→ Open Load; Vout < Vdiagth_L→ Short to GND 2.5.13 Tachometer driver Table 18. Tachometer driver electrical characteristics Symbol Parameter Condition Min Typ Max Unit 100 - 500 mA Ioc Overcurrent threshold - Ron On resistance I = 25 mA - - 5 Ω Ilk_off Leakage current Vout = 18 V, Key = 0 V - - 10 µA Ilk_on Pull-Down diagnosis current Vout = 18 V, Key = 5 V - - 100 µA ton_off Turn on-off delay From CMD (serial or parallel) rising edge - - 6 µs VOL Open load output voltage driver in OFF condition 0.46*VDD 0.5*VDD 0.54*VDD V Vdiagth_H (1) Diagnostic high threshold Driver in OFF condition 0.54*VDD 0.6*VDD 0.66*VDD V Vdiagth_L (1) Diagnostic low threshold Driver in OFF condition 0.36*VDD 0.4*VDD 0.44*VDD V OFF diagnostic masking time Guaranteed by scan 0.75 1 1.25 ms Tdcg_noise OFF diagnostic Deglitch filter time Guaranteed by scan 2.16 3.6 5.04 µs Tdcg ON diagnostic Deglitch filter time Guaranteed by scan 15 20 25 µs Tmask 1. Vdiagth_L < Vout < Vdiagth_H → Open Load; Vout < Vdiagth_L → Short to GND 2.5.14 Stepper motor driver Table 19. Stepper motor driver electrical characteristics Symbol Parameter Condition Min Typ Max Unit 0.85 - 2 A - - 2.6 Ω - - 20 kHz Ioc Overcurrent threshold RdsON On resistance HS+LS fstepper Working frequency Application info OUTA_B_C_D output voltage OUTA short to OUTB; OUTC short to OUTD; Stepper driver disable 0.44*VDD 0.5*VDD 0.54*VDD V Vdiagth_H Diagnostic high threshold Driver in OFF condition 0.54*VDD 0.6*VDD 0.66*VDD V Vdiagth_L Diagnostic low threshold Driver in OFF condition 0.36*VDD 0.4*VDD 0.44*VDD V IDSS_OUT Output leakage current Driver in OFF condition - - 10 µA Over current switch_off time Guaranteed by scan - - 25 µs trb Rise output time VB = 12 V, RI = 39 Ω - - 15 µs tfb Fall output time VB = 12 V, RI = 39 Ω - - 15 µs trb-a Rise output time Tamb = 25 °C, - - 10 µs tfb-a Fall output time VB = 12 V, RI = 39 Ω - - 10 µs tpHLb Turn-off in/out delay time - - 15 µs tpLHb Turn-off in/out delay time - - 15 µs Vout_off (1)(2)(3) tscvb ON condition I out= 0.5 A, T j= 150 °C, V B= 14 V VB = 12 V, RI = 39 Ω Vreverse_HS Reverse HS diode drop Driver in OFF condition Iinjected= 0.5 A - - 1.5 V Vreverse_LS Reverse LS diode drop Driver in OFF condition ISourced = 0.5 A - - -1.5 V DS12175 - Rev 5 page 18/55 L9177A Electrical characteristics Symbol Parameter Condition Tdgc_step_OFF OFF Diagnostic Deglitch filter time Guaranteed by scan Tmask Tdgc_step_ON Min Typ Max Unit 93.8 125 156.3 µs Masking time Guaranteed by scan 0.75 1 1.25 ms ON Diagnostic Deglitch filter time Guaranteed by scan 15 20 25 µs 1. VoutA < Vdiagth_H and VoutB > Vdiagth_Lor VoutC < Vdiagth_H and VoutD > Vdiagth_L → No Fault 2. VoutA_B_C_D Vdiagth_H and VoutB < Vdiagth_L or VoutC > Vdiagth_H and VoutD < Vdiagth_L → Open load VoutA_B_C_D > Vdiagth_H → Short to Battery Figure 12. Stepper motor driver block diagram (*) Chanel 1 is connected to VB (**) Chanel 2 is connected to VB_1 VB(*); VB_1 (**) (**) (*) GAPGPS00596 DS12175 - Rev 5 page 19/55 L9177A Electrical characteristics Figure 13. Stepper motor operations EN PWM DIR VoutA VoutB VoutC VoutD GADG2408171141PS 2.5.15 O2 sensor heater driver Table 20. O2 sensor heater driver characteristics Symbol R dsON Parameter Condition Min Typ Max Unit On resistance Iout= 3 A - - 0.5 Ω Output clamping voltage Iout= 3 A 40 - 50 V Ilk_off Leakage current Vout= 18 V,Key = 0 V - - 10 µA Ilk_on Pull-Down diagnosis current Vout= 18 V, Key = 5 V - - 100 µA ton_off Turn on-off delay From CMD (serial or parallel) rising edge - - 6 µs VOL Open load output voltage Driver in OFF condition 0.46*VDD 0.5*VDD 0.54*VDD V IOC Overcurrent threshold 3.8 - 5 A VC Vdiagth_H (1) Diagnostic high threshold Driver in OFF condition 0.54*VDD 0.6*VDD 0.66*VDD V V diagth_L (1) Diagnostic low threshold Driver in OFF condition 0.36*VDD 0.4*VDD 0.44*VDD V OFF diagnostic masking time Guaranteed by scan 0.75 1 1.25 ms Tdcg_noise OFF diagnostic Deglitch filter time Guaranteed by scan 2.16 3.6 5.04 µs Tdcg ON diagnostic Deglitch filter time Guaranteed by scan 15 20 25 µs Tmask 1. V diagth_L < V out Vdiagth_H) or (VRIN- < Vdiagth_L) then Fault is detected. DS12175 - Rev 5 page 21/55 L9177A Electrical characteristics Figure 14. VRS block diagram GAPGPS00598 2.5.17 K-line Table 22. K-Line interface electrical characteristics Pin Symbol Parameter ITXsource Transmitter input source current KL_TX K_LINE ITXsink - Min. Typ. Max. Unit 10 - 100 µA Transmitter input sink current KL_TX = VDD - - 2.1 µA IKL_TX KL_TX Internal Pull-up - - 200 - kΩ VKoutL Transmitter output low voltage -1 - 1.5 V VKinH Receiver input high voltage - 0.7xVB - VB V VKinL Receiver input low voltage - -1 - 0.35xVB V VKH Receiver input hysteresis - 0.05xVB - 0.3xVB V IKleak Receiver leakage current KL_LINE = VB,KL_TX = High - - 1 µA IKshort Transmitter short circuit current KL_LINE = VB, KL_TX = Low 60 - - mA Reverse battery or GND loss current ENABLE = KEY = VB = 0 V, - - 10 mA IKpull-up KLINE internal pull-up KL_TX = High 60 - 140 kΩ IKuv Under voltage current KEY = High, KL_TX = Low, VB = 13.5 V, KL_LINE = -1 V - - 1 mA IKrev K_LINE DS12175 - Rev 5 Test conditions IsinkK_LINE = 35 mA, KL_TX = Low KL_LINE = -13.5 page 22/55 L9177A Electrical characteristics Pin Symbol Parameter Test conditions KL_RX VRXoutL KL_RX output low voltage KL_TX to K_LINE Tp_HLT Transmitter turn-on delay time K_LINE T_fT Transmitter fall time KL_LINE to KL_RX TpR Receiver turn-on delay time T_fR Receiver fall time T_rR Receiver rise time fMax Max transmission Operating frequency Typ. Max. Unit - - 0.4 V - - 5 µs - - 10 µs - - 4 µs - - 2 µs - - 2 µs - - 60 kHz Isink= 0.4 mA CKline = 10 nF, RKline = 510 Ω CKline = 10 nF, RKline = 510 Ω Cload= 20 pF, RPKL_Rx = 2 kΩ C load= 20 pF, RPKL_Rx = 2 kΩ KL_RX K_LINE Min. Cload= 20 pF, RPKL_Rx = 2 kΩ Application info Figure 15. K-line block diagram 2 GAPGPS00599 2.5.18 SPI interface Table 23. SPI characteristics and timings Symbol SICin SCKCin tSCKCS DS12175 - Rev 5 Parameter Input capacitance Clock inactive time before frame Test conditions Min Typ Max Unit - - - 20 pF - - - 20 pF - 100 - - ns page 23/55 L9177A Electrical characteristics Symbol Parameter Test conditions Min Typ Max Unit - - 500 ns - - 500 ns tCSSO Access time tSOdis Output data (SO) disable time tlead Channels select (CS) lead time See (1) 500 - - ns Output valid time See (1), @ fCLK= 5.4 MHz 60 - - ns tSOCS Output data (SO) disable time No capacitor on SO, see (1) - 500 ns tSIsetup Input data (SI) set-up time @ fCLK= 5.4 MHz 20 - - ns tSIhold Input data (SI) hold time @ fCLK= 5.4 MHz 20 - - ns CLK period - 185 - - ns Clock inactive time after frame - 600 - - ns CS de asserted time - 600 - - ns tSCKFSO tSCK tCSSCK tCSN See (1) No Capacitor on SO, See (2) 1. see Figure 17. SPI timing diagram 2. see Figure 16. SO loading for disable time measurement Figure 16. SO loading for disable time measurement +5 V VDD 4.0 V 1 kΩ SO tSOdis 1.0 V SO 1 kΩ CS GADG0412170958PS Figure 17. SPI timing diagram t SOCS t CSSO CS t lead t SCKCS SCK t CSSCK DIN DIN23 DIN22 DIN21 DIN20 DIN... DIN... DIN1 DOUT... DOUT... DIN0 t SCKFSO DOUT DOUT23 DOUT22 DOUT21 DOUT20 DOUT... DOUT0 GADG0412171035PS DS12175 - Rev 5 page 24/55 L9177A Functional description 3 Functional description 3.1 Chip working conditions Table 24. A outputs working conditions - Standby Run mode VB_OV VB_UV Reset Over current Thermal warning VDD_SB regulator ON ON ON ON ON Current limitation ON VDD regulator OFF ON OFF OFF ON Current limitation OFF if linked with VDD current limitation VDD_TRK regulator OFF ON OFF OFF ON Current limitation OFF if linked with VDD_TRK current limitation All LS drivers OFF ON OFF OFF OFF Over current switch off ON Diagnostics of all LS drivers OFF ON OFF OFF ON(1) - ON HS Driver OFF ON OFF OFF OFF Current limitation ON Stepper Motor Driver OFF ON OFF OFF OFF Over current switch off ON K-line Transceiver OFF ON OFF OFF OFF Current limitation ON VRS OFF ON OFF OFF OFF - ON SPI Default Default ON ON Default Default Default 1. The diagnostic currents and comparator are switched on in reset condition. 3.2 Chip bias current generation The Internal current generator circuit is buffering internal band-gap voltage (1.2 V typ.) on a high precision external resistor (10 kΩ ±1 %) and generates an accurate current reference used to create all the chip bias currents. DS12175 - Rev 5 page 25/55 L9177A Power up/down sequences Figure 18. Current generator block diagram GAPGPS00602 3.3 Power up/down sequences The figures below show the power-on, power-off and time diagram behaviour of the device. VDD_SB (standby voltage) rises together with battery input, and in standby it is always present if battery is present, no matter the KEY_IN status. When the KEY_IN signal rises up and remains stable for at least T_key_deglitch (see Table 7), the device goes in ON state, meaning that all voltage regulators and functions are active. Wake-up is an intermediate status between standby and on mode, with current consumption higher than the standby one. When Key_IN goes low, device goes in OFF mode but standby regulator remains ON. DS12175 - Rev 5 page 26/55 L9177A SPI Figure 19. Power-up sequence VB VDD_SB Key_IN V_Key_H State STBY Wake_Up On State T_key_deglitch VDD RESET Vth_UV Tht Td_UV_rst GAPGPS00603 Figure 20. Power-down sequence VB VDD_SB Key_IN VDD RESET V_Key_L Vth_UV TfUV_reset GAPGPS00604 Reset signal detects a VDD undervoltage longer than TfUV_reset by going to low level. When VDD recovers to normal level Reset signal returns to high level after Power_On_UV_Reset_Delay time (Td_UV_RST). The Reset signal resets all the internal SPI registers to default value. 3.4 SPI SPI is a standard four wires interface, that communicates with a data word of 24 bits. By means of SPI all the channels can be driven in serial way and diagnosis is sent out.Timing of SPI's operations are reported in Figure 17. The input data (DIN) is read on the rising edge of the SPI's clock (SCLK), in the same way the output data (DOUT) must be read by the Microcontroller on the SCLK's rising edge. 3.4.1 Data in (DIN) DIN command is used to turn On/Off internal channels which do not have Parallel Input command, and to clear diagnostic latches. DIN is decoded at the end of the frame if the integrity checks are passed. DS12175 - Rev 5 page 27/55 L9177A SPI Table 25. Data in (DIN) words content DIN23 DIN22 DIN21 DIN20 DIN19 DIN18 DIN17 DIN16 Mask L_0 L_1 VRS Diag VRS Hys0 VRS Hys1 VRS Hys2 0 DIN15 DIN14 DIN13 DIN12 DIN11 DIN10 DIN9 DIN8 INJ1_0 INJ1_1 INJ2_0 INJ2_1 O2H_0 O2H_1 RLY1_0 RLY1_1 DIN7 DIN6 DIN5 DIN4 DIN3 DIN2 DIN1 DIN0 RLY2_0 RLY2_1 RLY3_0 RLY3_1 TACH_0 TACH_1 Clear diag Parity Data in structure (MSB first) • Mask bit is used to mask serial command for diagnosis only readings on DOUT: 0 - Read Diag. All DIN bits are ignored. 1 - Write. All DIN are transferred into the internal registers. • Command bits are used to control the output drivers: (INJ1-2, O2H, RLY1-2-3, L and TACH) as described in the following table: Table 26. Data in command bits structure • • • • xxx_0 xxx_1 0 1 Turn-off driver / parallel polarity 0 1 1 Turn-on driver / parallel polarity 1 X 0 No change (the driver will maintain the previous condition) Description VRS Diag bit is used active high to enable diagnostic phase of VRS block, the diagnosis can be done only when the phonic wheel is stopped. Programmable VRS Hysteresis: VRS hysteresis is programmable in 5 steps according to Table 27. Clear Diag, when set to 1 generates a request to clear those diagnostic flags which are latched. In addition odd parity bit (that is the last bit of the frame and includes in its calculation the "Don't care" bits) is used for DIN word check together with falling clock edges count. Table 27. Data in VRS hysteresis DS12175 - Rev 5 Hys 0 Hys 1 Hys 2 0 0 0 Auto adaptive hysteresis 1 0 0 Hys VRS = 100 mV 0 1 0 Hys VRS = 200 mV 1 1 0 Hys VRS = 350 mV 0 0 1 Hys VRS = 650 mV 1 0 1 Hys VRS = 1000 mV 1 1 1 Not Valid (Hys doesn't change) Description page 28/55 L9177A Diagnosis 3.4.2 Data out (DOUT) Status flags are sampled and sent out through DOUT pin at each R/W SPI operation. The structure of the 24 bit word is described in Table 28. A three bits diagnosis is provided for stepper motor driver, a two bit diagnosis for other drivers. VRS diagnosis is coded as '0' means No Fault, while '1' means Fault. Over temperature warning is coded as '0' means No Fault, while '1' means Fault. The SPI default value is: all bits set to zero. Table 28. Data out (DOUT) words content DOUT23 DOUT22 DOUT21 DOUT20 DOUT19 DOUT18 DOUT17 DOUT16 INJ1 Diag0 INJ1 Diag1 INJ2 Diag0 INJ2 Diag1 O2H Diag0 O2H Diag1 RLY1 Diag0 RLY1 Diag1 DOUT15 DOUT14 DOUT13 DOUT12 DOUT11 DOUT10 DOUT9 DOUT8 RLY2 Diag0 RLY2 Diag1 RLY3 Diag0 RLY3 Diag1 L Diag0 L Diag1 TACH Diag0 TACH Diag1 DOUT7 DOUT6 DOUT5 DOUT4 DOUT3 DOUT2 DOUT1 DOUT0 VRS Diag Thermal Warning Brdg1 Diag0 Brdg1 Diag1 Brdg1 Diag2 Brdg2 Diag0 Brdg2 Diag1 Brdg2 Diag2 Data out structure Table 29. Two bits diagnosis (normal drivers) Bit 0 Bit 1 0 0 No Fault 1 0 Short to Ground (OFF) 0 1 Open Load (OFF) 1 1 Overcurrent (ON) Fault Table 30. Three bits diagnosis (bridge stage) 3.5 Bit 0 Bit 1 Bit 2 0 0 0 No Fault 1 0 0 Short to Ground (OFF) 1 0 1 Short to VBAT (OFF) 0 1 0 Open Load (OFF) 1 1 0 Overcurrent (ON) Fault Diagnosis The device provides a full set of diagnosis; deglitch timings listed below are digital, generated from internal clock and their accuracy is guaranteed by scan patterns and clock measurement. 3.5.1 Voltage regulators thermal warning and shutdown The 5V linear voltage regulator/tracking regulator is shut down when the thermal shutdown temperature is reached and also the regulator is in current limitation. The shutdown is filtered with Tdcg filter of 30 µs ±25 %. As soon as the over temperature disappears the regulator is switched on again. Over temperature flag without any latch is present via SPI. DS12175 - Rev 5 page 29/55 L9177A Diagnosis 3.5.2 Overvoltage shut down If the VB_off voltage is reached after Tdgc filtering time of 30 µs ±25 % the device enters a safety state where the main outputs are switched-off. Voltage regulators, all low side channels, stepper motor driver and KLINE are switched off and reset is asserted. As soon as the battery goes below VB_off minus VB_off_h the device recovers standard operation. 3.5.3 Undervoltage shut down If the VB_UV voltage is reached after analog Tdgc 1 µs ±20 % filtering time the device enters a safety state where main outputs are switched-off. Voltage regulators, all low side channels, stepper motor driver and KLINE are switched off. As soon as the battery rises above VB_UV plus the hysteresis the device recovers normal operation. Figure 21. An example of under and over voltage time diagram VB_off VB VB_off VB 0 LIMITED VB KEY 0 VDD 5V 0 VDD_TRK Vth_UV Tht Vth_UV Tht 5V 0 HS_OUT Tdgc_VB_OV VB 0 RST 5V Td_UV_rst TfUV_reset Td_UV_rst Td_UV_rst 0 BATTERY LINE STAND-BY IGNITION KEY CONNECTION SWITCH ON VDD UNDERVOLTAGE VB OVERVOLTAGE PROTECTION IGNITION KEY SWITCH OFF STAND-BY GADG0412171117PS 3.5.4 Low side on/off diagnosis (INJ, RLY's, TACH, O2H) About low side channels OFF diagnosis, the device issues a masking filter Tmask after channel turning off (falling edge of driving command) to avoid false fault detecting due to output transition from low to high. Tmask is of 1 ms ±25 % for all channels except for the relays, for which Tmask is 3.5 ms ±25 %. Once masking time has expired a deglitch filter Tdgc_noise of 3.6 µs ±40 % for noise immunity is activated. A fault longer than deglitch time is latched. OFF state diagnostic fault can be overwritten by ON state fault. OFF state fault does not prevent the driver from switching on. The latched fault is cleared on request. During on-phase if an over current fault occurs the drivers enter in current limitation condition for a digital filtering time Tdgc of 20 µs ±25 %,then it is switched OFF and the fault is latched. The channel is turned ON again by input command transition. The latched fault is cleared on request via SPI. Over current fault has higher priority respect to OFF condition faults. DS12175 - Rev 5 page 30/55 L9177A Diagnosis Figure 22. Low side driver diagnosis time diagram GAPGPS00606 DS12175 - Rev 5 page 31/55 L9177A Diagnosis Figure 23. Low side driver diagnosis I-V relationship GAPGPS00607 3.5.5 Current limited low side driver on/off diagnosis In OFF condition diagnosis is the same as Low side, with Tmask 3.5 ms ±25 % and Tdgc_noise 3.6 µs ± 40 %, while in ON condition initial Inrush current is masked for Tmask_rush of 336 µs ±25 % then, if an over current fault occurs the drivers enter in current limitation condition for a digital filtering time Tdgc of 20 µs ±25 %, then it is switched OFF and the fault is latched. The channel is turned ON again by input command transition. The latched fault is cleared on request via SPI. Over current fault has higher priority with respect to OFF condition faults. DS12175 - Rev 5 page 32/55 L9177A Diagnosis Figure 24. Current limited low side driver diagnosis time diagram GAPGPS00608 3.5.6 Stepper motor driver OFF diagnosis (EN signal low and output in high impedance state) In OFF condition Short to GND/Short to VB or Open Load condition is continuously detected through a deglitch filter of 125 µs ±25 %, after Tmask masking time of 1 ms ±25 % to filter ON/ OFF transition. To avoid false diagnostic due to motor residual movement, the stepper has to be disabled at least 40 ms after the PWL signal has been disabled. A fault longer than deglitch time is latched. OFF state diagnostic fault can be overwritten by ON state fault. OFF state fault does not prevent the stepper from switching on. The latched fault is cleared on request. 3.5.7 Stepper motor driver ON diagnosis (EN signal high and output driven by input commands) In ON condition when over current fault is detected and validated after digital filtering time Tdgc of 20 µs ±25 %, the bridge is turned OFF and the fault is latched. The bridge is turned ON again by input command EN transition. The latched fault is cleared on request. Over current fault has higher priority with respect to OFF condition faults. Each Bridge has dedicated fault diagnosis detection coded by three bits. DS12175 - Rev 5 page 33/55 L9177A Diagnosis Figure 25. Stepper motor driver diagnosis time diagram GAPGPS00609 Figure 26. Stepper motor driver diagnosis I-V relationship GAPGPS00610 DS12175 - Rev 5 page 34/55 L9177A VRS interface 3.5.8 VRS diagnosis VRS block enters diagnosis phase on request via SPI and then generates a Fault bit. If the fault exceeds the Tdgc filter time of 30 µs ±20 %, it is latched. The latched fault is cleared on request via SPI. The VRS diagnostic can only be activated when the phonic wheel is in stop condition. Figure 27. VRS diagnosis I-V relationship GAPGPS00611 3.6 VRS interface 3.6.1 Function characteristic The flying wheel interface is an interface between the µP and the flying wheel sensor: it conditions signal coming from magnetic pick-up sensor or hall effect sensor and feeds the digital signal to microcontroller that extracts flying wheel rotational position, angular speed and acceleration. Figure 28. VRS typical characteristics ω VRS IN + Ls Vdiff Rs IN - GAPGPS00571 DS12175 - Rev 5 page 35/55 L9177A VRS interface Figure 29. VRS interface structure VRS voltage Auto adaptative Hysteresis Int_vrs Auto adaptative Time filtering block Out_vrs GAPGPS00612 3.6.2 Auto-adaptative hysteresis Input signals difference is obtained through a full differential amplifier; its output, DV signal, is fed to peak detection circuit and then to A/D converter implemented with 4 voltage comparator (5 levels Pvi).Output of A/D is sent to Logic block (hysteresis selection Table 32) that implements correlation function between Peak voltage and hysteresis value; hysteresis value is used by square filtering circuit which conditions DV signal. Figure 30. Auto-adaptive hysteresis block diagram Hysteresis Squarer Circuit and Temporal Filtering Int_vrs + VRS voltage – DV Hysteresis Value H Peak Detection Circuit AD converter PVi H Hysteresis Selection Table PV GAPGPS00613 Figure 31. Hysteresis output voltage level Hysteresis output voltage (mV) H4 H3 H2 H1 H0 0 PV1 PV2 PV3 PV4 Quantized peak detector output voltage (mV) GAPGPS00614 To the previous 5 levels PV = [0 PV1 PV2 PV3 PV4] correspond to a set of 5 thresholds: • H = [HO HIH2 H3 H4] The advised values for the previous defined vectors are: • PV = [0 PV1 PV2 PV3 PV4] = [0, 900, 1560, 2230, 2900] mV • H = [H0 H1 H2 H3 H4] = [100, 200, 350, 650, 1000] mV DS12175 - Rev 5 page 36/55 L9177A VRS interface Table 31. Peak voltage detector precision Pick voltage [PV] Value Unit Min. Typ. Max. PV1 850 900 950 mV PV2 1452 1560 1638 mV PV3 2118 2230 2341 mV PV4 2755 2900 3045 mV Table 32. Hysteresis threshold precision Pick voltage [PV] Note: DS12175 - Rev 5 Value Unit Min. Typ. Max. H0 70 100 130 mV HV1 140 200 220 mV HV2 250 347 390 mV HV3 490 644 720 mV HV4 730 1000 1120 mV Hysteresis voltages are achieved by injecting an hysteresis bias current on V RIN± external resistors (typ. 10 kΩ each, see Figure 38). The resulting HV voltage is HV = I_hys * Rtyp. Changing the value of R the hysteresis value would change in a linear mode. page 37/55 L9177A VRS interface Figure 32. Input-output behaviour of VRS interface 0.15 hysteresis 0.1 0.05 VRS voltage [V] threshold 0.0 -0.05 -0.1 0.53 0.535 DT1 0.54 0.545 DT2 Tf 0.55 0.555 Tf = Filtering time DT2Tf 1 0.8 Squared signal 0.6 0.4 0.2 0 0.53 0.535 0.54 0.545 0.55 0.555 0.56 GAPGPS00615 3.6.3 Auto-adaptative time filter This characteristic is useful to set the best internal filter time as function of the input signal frequency. The Tfilter time depends on the previous period duration Tn according to the following formula: Tfilter(n+1) = 1/32 * Tn if Tn > Tfilter(n) The filtering time purpose is to filter very short spikes. The digital filtering time is applied to internal squared signal (int_vrs), obtained by voltage comparators. The output of time filtering block is out_vrs signal. The filtering time Tfilter is applied to int_vrs signal in two different ways: • Rising edge: if int_vrs high level lasts less than Tfilter, out_vrs is not set to high level. • In absence of any spikes during input signal rising edge out_vrs signal is expected with a delay of Tfilter time. • Falling edge: the falling edge of int_vrs is not delayed through time filtering block: after falling edge for a time Tfilter any other transition on int_vrs signal is ignored The initial value (Default) and maximum for Tfilter must be considered at RPM_min = 20 e.g. Tmax filter = 180 µs. The minimum available value is Tmin filter = 2.8 µs. DS12175 - Rev 5 page 38/55 L9177A VRS interface Figure 33. Auto-adaptative time filter behaviour 1 Vdiff Vdiff max Hys Vdiff min 8000 1/32 * T(n-1) Vout 1/32 * T(n) T(n) 1/32 * T(n+1) T(n+1) 1/32 * T(n+2) T(n+2) [s] 1/32 * T(n+3) T(n+3) [s] RPM RPM max RPM min [s] GAPGPS00616 Figure 34. Auto-adaptative time filter behaviour 2 Vdiff Vdiff max 1/32 * T(n) Hys Vdiff min 8000 Filter Time Vout [s] Mask Time 1/32 * T(n-1) T(n) 1/32 * T(n) T(n+1) 1/32 * T(n+1) T(n+2) 1/32 * T(n+2) T(n+3) 1/32 * T(n+3) [s] GAPGPS00617 DS12175 - Rev 5 page 39/55 L9177A Low side drivers 4 Low side drivers Low side drivers have a voltage slew rate control during switch-on/off phase to reduce emissions. The slew-rate control is achieved controlling the gate charging current and the behavior is described in Figure 35 and Figure 36. Figure 35. Low side drivers slew rate implementation VB VLVT + + VREF CMD VDD IP1 IP2 IN1 IN2 GAPGPS00618 DS12175 - Rev 5 page 40/55 L9177A Low side drivers Figure 36. Low side drivers slew rate IP2 Igate IP1 IP1 Igate IN1 IN1 IN2 Vgate Vgate VOUT VOUT 80% IOUT VLVT VLVT 20% not controlled not controlled IOUT GAPGPS00619 At switch-on command the charging current is provided by current generator IP1 and is kept constant until the output voltage is decreased of roughly 80% of typical battery level. At this point the low side transistor is on and VLVT signal is set to logic 1 to connect IP2 current generator in parallel with IP1, completing the gate charge curve and providing maximum gate drive. When the power transistor is switched-off the gate is discharged quickly using both IN1 and IN2 currents; as soon as the output voltage reaches roughly 20 % of the nominal battery voltage only IN1 is kept connected to complete the gate discharging. In Table 33 the values for IPx and INx current generators are reported for each low side. As an example Figure 37 shows the resulting slew rate, in typical conditions, of O2H low side driver. Table 33. Values for IPx and INx current generators for each low side DS12175 - Rev 5 Low side IP1 IP2 IN1 IN2 Unit O2H 243 81 253 337 µA INJ 174 23 180 124 µA RLY’s 78 0 80 120 µA L 78 0 62 119 µA TACH 22 0 21 25 µA page 41/55 L9177A Low side drivers Figure 37. O2H low side driver slew rate Vout TYP condition (Rload = 10ohm, Cload = 10nF) @ room temperature 80% 80% 13V 20% 20% 4.41V/µs 4.41V/µs 2V 1.8V 2V 2.65V [s] Iout 1.27A 432mA/µs 450mA/µs [s] 60ns DS12175 - Rev 5 100ns GAPGPS00620 page 42/55 L9177A Application circuit 5 Application circuit Figure 38. Application circuit To Sensor Battery Battery VB C_Vtrk D1 VB C1VB_MAIN VB R_KEY VB1 HS_OUT VDD_TRK INJ1 KEY Injector 1 Injector 2 INJ2 VDD_StandBy GNDJ C_VDD_stby OUTA VDD OUTB R_reset C_OUTA C_OUTB C_VDD RESET Stepper ENABLE Motor OUTC IN1 C_OUTC OUTD IN2 C_OUTD INO2H VRIN+ VDD C_VRS+_out R_VRS+ RF_1 R_VROUT R_VRS- L9177A DIR CF_1 CF_2 VRIN- VROUT SPC5x C_VRS+_in RF_2 From Pick-Up C_VRS-_in C_VRS-_out TACH PWM EN To Tachimeter To Oxygen Sensor O2H ILS_TACH REXT SI R_ext REL1 /CS REL2 SCK REL3 IN_REL1 To Relays SO L IN_REL2 KL_LINE KL_TX VDD RX_pull-up KL_RX GNDO2H GND_A/P GND_P2 GND_P1 GAPG1303150713PS 5.1 Bill of material Table 34. Bill of material Block Component Name Supply Capacitor C1VB_MAIN Diode D1 Key Resistor R_Key Current limiting resistor Rext Resistor R_ext Pull-up resistor DS12175 - Rev 5 Usage Bulk capacitor Min Typ Max Unit 220 µF 20 kΩ 10 (1%) kΩ Reverse polarization protection diode page 43/55 L9177A Bill of material Block Component Name Reset Resistor R_reset VDD Capacitor VDD_trk Capacitor Vdd_sby Capacitor VRS Capacitor C_VRS+_in VRS Capacitor VRS Min Pull-up resistor Typ Max 1 kΩ µF 1.5 Ω 2.2 100 µF 10 100 mΩ 1 10 µF 200 mΩ Filter Capacitor 100 pF C_VRS-_in Filter Capacitor 100 pF Capacitor C_VRS+_out Filter Capacitor 470 pF VRS Capacitor C_VRS-_out Filter Capacitor 470 pF VRS Resistor R_VRS+ Current limiting resistor 10 kΩ VRS Resistor R_VRS- Current limiting resistor 10 kΩ VRS Capacitor CF_1 Filter Capacitor 470 pF VRS Capacitor CF_2 Filter Capacitor 100 nF VRS Resistor RF_1 Filter resistor 33 kΩ VRS Resistor RF_2 Filter resistor 33 kΩ VRS Resistor R_VROUT Pull-up resistor K-Line Resistor RX_pull-up Pull-up resistor 2 kΩ Stepper Capacitor C_OUTA EMI filter capacitor 10 nF Stepper Capacitor C_OUTB EMI filter capacitor 10 nF Stepper Capacitor C_OUTC EMI filter capacitor 10 nF Stepper Capacitor C_OUTD EMI filter capacitor 10 nF C_VDD ESR C_Vtrk value C_Vtrk ESR C_VDD_stby value C_VDD_stby ESR Output capacitor (Ceramic or Tantalum) Output capacitor Output capacitor 4.7 Unit 60 DS12175 - Rev 5 C_VDD value Usage 10 kΩ page 44/55 L9177A Package information 6 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 6.1 TQFP 10x10 64L exposed pad down package information Figure 39. TQFP 10x10 64L exposed pad down package outline BOTTOM VIEW θ2 θ1 θ θ3 (see SECTION A-A) TOP VIEW 7278840_Rev12.0_PkgCode_9I GADG091220191138PKG9l DS12175 - Rev 5 page 45/55 L9177A TQFP 10x10 64L exposed pad down package information Table 35. TQFP 10x10 64L exposed pad down package mechanical data Note Ref Min. Typ. Max. Ө 0° 3.5° 7° - Ө1 0° - - - Ө2 11° 12° 13° - Ө3 11° 12° 13° - A - - 1.2 15 A1 0.05 - 0.15 12 A2 0.95 1 1.05 15 b 0.17 0.22 0.27 9, 11 b1 0.17 0.2 0.23 11 c 0.09 - 0.2 11 c1 0.09 - 0.16 11 D - 12.00 BSC - 4 D1 - 10.00 BSC - 2, 5 (see # in Notes below) D2 See VARIATIONS 13 D3 See VARIATIONS 14 e - 0.50 BSC - - E - 12.00 BSC - 4 E1(*) - 10.00 BSC - 2, 5 E2 See VARIATIONS 13 E3 See VARIATIONS 14 L 0.45 0.6 0.75 - L1 - 1.00 REF - - N - 64 - 16 R1 0.08 - - - R2 0.08 - 0.2 - S 0.2 - - - Tolerance of form and position aaa - 0.20 - bbb - 0.20 - ccc - 0.08 - ddd - 0.08 - 1, 7, 19 VARIATIONS Pad option 6.0 x 6.0 (T3) DS12175 - Rev 5 D2 - - 6.40 E2 - - 6.40 D3 4.80 - - E3 4.80 - - 13, 14 page 46/55 L9177A TQFP 10x10 64L exposed pad down package information Notes 1. 2. 3. 4. 5. Dimensioning and tolerancing schemes conform to ASME Y14.5M-1994. The Top package body size may be smaller than the bottom package size up to 0.15 mm. Datum A-B and D to be determined at datum plane H. To be determined at seating datum plane C. Dimensions D1 and E1 do not include mold flash or protrusions. Allowable mold flash or protrusions is “0.25 mm” per side. D1 and E1 are Maximum plastic body size dimensions including mold mismatch. 6. Details of pin 1 identifier are optional but must be located within the zone indicated. 7. All Dimensions are in millimeters. 8. No intrusion allowed inwards the leads. 9. Dimension “b” does not include dambar protrusion. Allowable dambar protrusion shall not cause the lead width to exceed the maximum “b” dimension by more than 0.08 mm. Dambar cannot be located on the lower radius or the foot. Minimum space between protrusion and an adjacent lead is 0.07 mm for 0.4 mm and 0.5 mm pitch packages. 10. Exact shape of each corner is optional. 11. These dimensions apply to the flat section of the lead between 0.10 mm and 0.25 mm from the lead tip. 12. A1 is defined as the distance from the seating plane to the lowest point on the package body. 13. Dimensions D2 and E2 show the maximum exposed metal area on the package surface where the exposed pad is located (if present). It includes all metal protrusions from exposed pad itself. Type of exposed pad is variable depending on leadframe pad design (T1, T2, T3), as shown in the figure below. End user should verify D2 and E2 dimensions according to specific device application. 14. Dimensions D3 and E3 show the minimum solderable area, defined as the portion of exposed pad which is guaranteed to be free from resin flashes/bleeds, bordered by internal edge of inner groove. 15. The optional exposed pad is generally coincident with the top or bottom side of the package and not allowed to protrude beyond that surface. 16. “N” is the number of terminal positions for the specified body size. 17. For Tolerance of Form and Position see Table. 18. Critical dimensions: a. Stand-off b. Overall width c. Lead coplanarity DS12175 - Rev 5 page 47/55 L9177A TQFP 10x10 64L exposed pad down package information 19. For Symbols, Recommended Values and Tolerances see Table below: Symbol Definition Notes aaa The tolerance that controls the position of the terminal pattern with respect to Datum A and B. The center of the tolerance zone for each terminal is defined by basic dimension e as related to Datum A and B. For flange-molded packages, this tolerance also applies for basic dimensions D1 and E1. For packages tooled with intentional terminal tip protrusions, aaa does not apply to those protrusions. bbb The bilateral profile tolerance that controls the position of the plastic body sides. The centers of the profile zones are defined by the basic dimensions D and E. ccc The unilateral tolerance located above the seating plane where in the bottom surface of all terminals must be located. This tolerance is commonly know as the “coplanarity” of the package terminals. ddd The tolerance that controls the position of the terminals to each other. The centers of the profile zones are defined by basic dimension e. This tolerance is normally compounded with tolerance zone defined by “b”. 20. Notch may be present in this area (MAX 1.5 mm square) if center top gate molding technology is applied. Resin gate residual not protruding out of package top surface. DS12175 - Rev 5 page 48/55 L9177A TQFP 10x10 64L exposed pad down package information Figure 40. Recommended footprint Note: DS12175 - Rev 5 Dimensions in the footprint of are mm. Parts marked as ES are not yet qualified and therefore not approved for use in production. ST is not responsible for any consequences resulting from such use. In no event will ST be liable for the customer using any of these engineering samples in production. ST’s Quality department must be contacted to run a qualification activity prior to any decision to use these engineering samples. page 49/55 L9177A Revision history Table 36. Document revision history Date Revision 20-Sep-2017 1 Changes Initial release. Updated Table 1. Pin function pin 27 column "Class" from SIGNAL to PWR; 29-Sep-2017 2 Updated Section 2.1.1 Supply voltage; Changed titles: Section 3.5.6 Stepper motor driver OFF diagnosis (EN signal low and output in high impedance state) and Section 3.5.7 Stepper motor driver ON diagnosis (EN signal high and output driven by input commands); Updated "Notes" in the Table 4. ESD protection; Updated unit of "T_key_deglitch" parameter" in Table 7. Key electrical characteristics and "R_pull" in Table 8. Digital pins characteristics. Corrected typos in the titles of the sections: Section 3.5.6 Stepper motor driver OFF diagnosis (EN signal low and output in high impedance state) and Section 3.5.7 Stepper motor driver ON diagnosis (EN signal high and output driven by input commands). Updated Table 1. Pin function. 05-Dec-2017 3 Substituted in the datasheet (texts, tables and drawings) "Vdd" with "VDD". Updated: Figure 5. 5 V main regulator block diagram; Section 2.5.9 High side switch; Figure 10. Low-side driver block diagram; Figure 16. SO loading for disable time measurement; Figure 17. SPI timing diagram; Section 3.4.1 Data in (DIN); Section 3.4.2 Data out (DOUT); Section 3.5.3 Undervoltage shut down; Section 5.1 Bill of material. Updated: DS12175 - Rev 5 26-Nov-2018 4 17-Nov-2020 5 Section Description; Section 2.1 Operating range; Section 2.2 Absolute maximum ratings; Table 8. Digital pins characteristics; Figure 5. 5 V main regulator block diagram; Figure 3. Input threshold; Table 17. Current limited LSD driver characteristics; Section 3.5.5 Current limited low side driver on/off diagnosis; Figure 17. SPI timing diagram; Figure 19. Power-up sequence; Figure 20. Powerdown sequence; Section 3.4.1 Data in (DIN); Figure 21. An example of under and over voltage time diagram; Section 3.5.8 VRS diagnosis; Figure 38. Application circuit; Table 34. Bill of material. Changed in all document "LAMP" pin in "L" (Current limited LSD). Updated Section 2.5 Electrical characteristics. Removed L9177A Order code in cover page. page 50/55 L9177A Contents Contents 1 2 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 Operating range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.1 3 Supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Absolute maximum ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 Latch-up test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 Temperature ranges and thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.5 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.5.1 Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.5.2 Key . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.5.3 Digital pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.5.4 Digital output pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.5.5 5 V voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.5.6 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.5.7 5 V tracking voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.5.8 Standby regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.5.9 High side switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.5.10 Injector driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.5.11 Relay drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.5.12 Current limited low side driver (LSD). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.5.13 Tachometer driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.5.14 Stepper motor driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.5.15 O2 sensor heater driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2.5.16 Variable reluctance sensor interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 2.5.17 K-line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 2.5.18 SPI interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 3.1 DS12175 - Rev 5 Chip working conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 page 51/55 L9177A Contents 3.2 Chip bias current generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.3 Power up/down sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.4 SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3.5 3.6 3.4.1 Data in (DIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3.4.2 Data out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3.5.1 Voltage regulators thermal warning and shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3.5.2 Overvoltage shut down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.5.3 Undervoltage shut down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.5.4 Low side on/off diagnosis (INJ, RLY's, TACH, O2H) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.5.5 Current limited low side driver on/off diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 3.5.6 Stepper motor driver OFF diagnosis (EN signal low and output in high impedance state). 33 3.5.7 Stepper motor driver ON diagnosis (EN signal high and output driven by input commands) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 3.5.8 VRS diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 VRS interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 3.6.1 Function characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 3.6.2 Auto-adaptative hysteresis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 3.6.3 Auto-adaptative time filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 4 Low side drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40 5 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43 5.1 6 Bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45 6.1 TQFP 10x10 64L exposed pad down package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 DS12175 - Rev 5 page 52/55 L9177A List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . ESD protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Temperature ranges and thermal data . . . . . . . . . . . . . . . . . . Supply electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . Key electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . Digital pins characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . Digital output pins characteristics . . . . . . . . . . . . . . . . . . . . . . VDD output electrical characteristics. . . . . . . . . . . . . . . . . . . . Reset function electrical characteristics. . . . . . . . . . . . . . . . . . VDD_TRK output electrical characteristics . . . . . . . . . . . . . . . VDD_SB output electrical characteristics. . . . . . . . . . . . . . . . . HS_OUT output electrical characteristics . . . . . . . . . . . . . . . . Injector driver electrical characteristic . . . . . . . . . . . . . . . . . . . Relay driver characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . Current limited LSD driver characteristics . . . . . . . . . . . . . . . . Tachometer driver electrical characteristics . . . . . . . . . . . . . . . Stepper motor driver electrical characteristics . . . . . . . . . . . . . O2 sensor heater driver characteristics . . . . . . . . . . . . . . . . . . Variable reluctance sensor interface electrical characteristics. . . K-Line interface electrical characteristics. . . . . . . . . . . . . . . . . SPI characteristics and timings . . . . . . . . . . . . . . . . . . . . . . . A outputs working conditions . . . . . . . . . . . . . . . . . . . . . . . . . Data in (DIN) words content . . . . . . . . . . . . . . . . . . . . . . . . . Data in command bits structure . . . . . . . . . . . . . . . . . . . . . . . Data in VRS hysteresis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Data out (DOUT) words content . . . . . . . . . . . . . . . . . . . . . . . Two bits diagnosis (normal drivers) . . . . . . . . . . . . . . . . . . . . Three bits diagnosis (bridge stage). . . . . . . . . . . . . . . . . . . . . Peak voltage detector precision . . . . . . . . . . . . . . . . . . . . . . . Hysteresis threshold precision . . . . . . . . . . . . . . . . . . . . . . . . Values for IPx and INx current generators for each low side. . . . Bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TQFP 10x10 64L exposed pad down package mechanical data . Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . DS12175 - Rev 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 . 7 . 7 . 8 . 9 . 9 10 10 11 11 12 13 13 14 15 17 17 18 18 20 21 22 23 25 28 28 28 29 29 29 37 37 41 43 46 50 page 53/55 L9177A List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. DS12175 - Rev 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Key block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 V main regulator block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 V tracking regulator block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 V standby regulator block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . High-side driver block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Low-side driver block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Low-side timing diagram (injectors, relays, current limited LSD, tach, O2H) Stepper motor driver block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . Stepper motor operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VRS block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . K-line block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SO loading for disable time measurement . . . . . . . . . . . . . . . . . . . . . . . SPI timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Current generator block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power-up sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power-down sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . An example of under and over voltage time diagram . . . . . . . . . . . . . . . . Low side driver diagnosis time diagram . . . . . . . . . . . . . . . . . . . . . . . . . Low side driver diagnosis I-V relationship. . . . . . . . . . . . . . . . . . . . . . . . Current limited low side driver diagnosis time diagram . . . . . . . . . . . . . . . Stepper motor driver diagnosis time diagram . . . . . . . . . . . . . . . . . . . . . Stepper motor driver diagnosis I-V relationship . . . . . . . . . . . . . . . . . . . . VRS diagnosis I-V relationship . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VRS typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VRS interface structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Auto-adaptive hysteresis block diagram . . . . . . . . . . . . . . . . . . . . . . . . . Hysteresis output voltage level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input-output behaviour of VRS interface. . . . . . . . . . . . . . . . . . . . . . . . . Auto-adaptative time filter behaviour 1 . . . . . . . . . . . . . . . . . . . . . . . . . . Auto-adaptative time filter behaviour 2 . . . . . . . . . . . . . . . . . . . . . . . . . . Low side drivers slew rate implementation . . . . . . . . . . . . . . . . . . . . . . . Low side drivers slew rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . O2H low side driver slew rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TQFP 10x10 64L exposed pad down package outline . . . . . . . . . . . . . . . Recommended footprint. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 . 4 10 10 12 12 13 14 15 16 16 19 20 22 23 24 24 26 27 27 30 31 32 33 34 34 35 35 36 36 36 38 39 39 40 41 42 43 45 49 page 54/55 L9177A IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2020 STMicroelectronics – All rights reserved DS12175 - Rev 5 page 55/55