L9333MD-TR

L9333 QUAD LOW SIDE DRIVER ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ WIDE OPERATING SUPPLY VOLTAGE RANGE FROM 4.5V UP TO 32V FOR TRANSIENT 45V VERY LOW STANDBY QUIESCENT CURRENT TYPICALLY < 2µA INPUT TO OUTPUT SIGNAL TRANSFER FUNCTION PROGRAMMABLE HIGH SIGNAL RANGE FROM -14V UP TO 45V FOR ALL INPUTS 3.3V CMOS COMPATIBLE INPUTS DEFINED OUTPUT OFF STATE FOR OPEN INPUTS FOUR OPEN DRAIN DMOS OUTPUTS, WITH RDSon = 1.5 FOR VS > 6V AT 25°C OUTPUT CURRENT LIMITATION CONTROLLED OUTPUT SLOPE FOR LOW EMI OVERTEMPERATURE PROTECTION FOR EACH CHANNEL INTEGRATED OUTPUT CLAMPING FOR FAST INDUCTIVE RECIRCULATION VFB > 45V MULTIPOWER BCD TECHNOLOGY SO20 (12+4+4) DIE ORDERING NUMBERS: L9333MD (SO20 12+4+4) L9333DIE1 (DIE) ■ STATUS MONITORING FOR - OVERTEMPERATURE - DISCONNECTED GROUND OR SUPPLY VOLTAGE DESCRIPTION The L9333 is a monolithic integrated quad low side driver. It is intended to drive lines, lamps or relais in automotive or industrial applications. BLOCK DIAGRAM IN 4 OUT 4 CHANNEL4 VS OUT 1 RIN IN 1 = & PRG THERMAL SHUT-DOWN CHANNEL1 RIN PRG 4 DIAG DIAGNOSTIC LOGIC Vint REN EN REFERENCE VS Vlogic GND VS GND D98AT379 September 2013 1/13 L9333 PIN CONNECTION (Top view) IN1 1 20 PROG IN2 2 19 OUT1 DIAG 3 18 OUT2 GND 4 17 GND GND 5 16 GND GND 6 15 GND GND 7 14 GND VS 8 13 OUT3 IN3 9 12 OUT4 IN4 10 11 EN D98AT380 PIN FUNCTION Pin N° Pin Name 1 IN 1 Input 1 2 IN 2 Input 2 3 DIAG Diagnostic 4, 5, 6, 7, 14, 15, 16, 17 GND Ground 8 VS Supply Voltage 9 IN 3 Input 3 10 IN 4 Input 4 11 EN Enable 12 OUT4 OUTPUT4 13 OUT 3 OUTPUT 3 18 OUT 2 OUTPUT 2 19 OUT 1 OUTPUT 1 20 PRG 2/13 Description Programming L9333 ABSOLUTE MAXIMUM RATINGS Symbol VS dVS/dt VIN, VEN, VPRG Parameter Value Unit Supply voltage DC Supply voltage Pulse (T = 400ms) -0.3 to 32 -0.3 to 45 V V Supply voltage transient -10 to +10 V/µs Input, Enable, Programming Pin voltage -14 to 45 V -0.3 to 45 1) V -0.3 to 45 V VOUT Output voltage VDIAG Diagnostic output voltage Note 1) : In flyback phase the output voltage can reach 60V. ESD - PROTECTION Value against GND Unit Supply pins and signal pins ±2 KV Output pins ±4 KV Parameter Note: Human-Body-Model according to MIL 883C. The device widthstand ST1 class level. THERMAL DATA Symbol Parameter TJSD Temperature shutdown threshold TJSDhys Temperature shutdown hysteresis Min Typ 175 Max Unit 220 °C 20 K SO 12+4+4 Rth (j-p) Thermal resistance junction to pins 15 °C/W Rth (j-a) Thermal resistance junction to ambient 2) 50 °C/W Note 2) : With 6cm2 on board heat sink area. LIFE TIME Symbol Parameter Condition tB useful life time VS  14V EN = low tb operating life time 4.5V  VS  32V EN = high Value Unit 20 years 5000 hours 3/13 L9333 OPERATING RANGE: Within the operating range the IC operates as described in the circuit description, including the diagnostic table. Symbol Parameter VS VIN, VEN, VPRG Condition Min Max Unit Supply voltage 4.5 32 V Input voltage -14 45 V -0.3 60 V VOUT Output voltage VDIAG Diagnostic output voltage -0.3 45 V Junction temperature -40 150 °C TJ Voltage will be limited by internal ZDiode clamping ELECTRICAL CHARACTERISTCS The electrical characteristics are valid within the defined Operating Conditions, unless otherwise specified. The function is guaranteed by design until TJSDon switch-on-threshold. Symbol Parameter Test Condition Min. Typ. Max. Unit VS 10 60 k Note 3) : Current direction depends on the programming setting (PRG=high leads into a positive current see also Blockdiagram page 1) Enable EN VENlow Input voltage LOW -14 1 V VENhigh Input voltage HIGH 2 45 V REN Input impedance -14V < VEN < 1.5V 5 IEN Input current 1.5V < VEN < 45V 5 4/13 k 80 µA L9333 ELECTRICAL CHARACTERISTCS (continued) Symbol Parameter Test Condition Min. Typ. Max. Unit 1.7 3.8  1 5 µA 25 µA Outputs OUT1- OUT4 RDSon Output ON-resistor VS > 6V, IO = 0.3A IOLeak Leakage current VO = VS = 14V; Ta < 125°C VO = VS = 14V; Ta < 150°C VOClamp IOSC CO Output voltage during clamping EFB  2mJ; 10 mA < IO < 0.3A 45 52 60 V Short-circuit current VS > 6V 400 700 1000 mA internal output capacities VO > 4.5V 100 pF 0.8 V 5 15 mA 0.1 1 µA 5 µA Diagnostic Output DIAG VDlow Output voltage LOW IDL = 0.6mA IDmax Max. output current internal current limitation; VD = 14V IDLeak Leakage current VD = VS = 14 V; Ta < 125 °C 1 VD = VS = 14 V; Ta < 150 °C Timing Characteristics 4) td,on On delay time VS = 14V 2 3.5 µs td,off Off delay time Cext = 0F; Lext = 0H 3 4.5 µs tset Enable settling time only testing condition 20 µs ON or OFF Diagnostic delay time 10mA  I0  200mA 10 µs 16 V/µs td,DIAG Sout Output voltage slopes 2.5 9 Note : All parameters are measured at 125°C. Note 4) : See also Fig.3 Timing Characteristics 5/13 L9333 Figure 1. Timing Characteristics VEN Active t VPROG Non Inverting Mode Inverting Mode t VIN t VOUT VS 0.8VS 5) 0.2VS t tset td,off td,on Note 5): Output voltage slope not controller for enable low Note 5) : Output voltage slope not controlled for enable low! 6/13 tset D01AT486 L9333 FUNCTIONAL DESCRIPTION The L9333 is a quad low side driver for lines, lamps or inductive loads in automotive and industrial applications. The logic input levels are 3.3V CMOS compatible. This allows the device to be driven directly by a microcontroller. For the noise immunity, all input thresholds have a hysteresis of typ. 100mV. Each input (IN, EN and PRG) is protected to withstand voltages from -14V to 45V. The device is activated with a 'high' signal on ENable. ENable 'low' switches the device into the sleep mode. In this mode the quiescent current is typically less than 2µA. A high signal on PRoGramming input changes the signal transfer polarity from noninverting to the inverting mode. This pin can be connected either to VS or GND. If these pins are not connected, the forced status of the PRG and EN pin is low. For packaged applications it is still recommended to connect all input pins to ground respective VS to avoid EMC influence. The forced condition leads to a mode change if the PRG pin was high before the interruption. Independent of the PRoGramming input, the OUTput switches off, if the signal INput pin is not connected. This function is verified using a leakage current of 5µA (sink for PRG=high; source for PRG=low) during circuit test. Each output driver has a current limitation of min 0.4A and an independent thermal shut-down. The thermal shut-down deactivates that output, which exceeds temperature switch off level. When the junction temperature decreases 20K below this temperature threshold the output will be activated again. This 20K is the hysteresis of the thermal shutdown function. The Gates, of the output DMOS transistors are charged and discharged with a current source. Therefore the output slope is limited. This reduces the electromagnetic radiation. For inductive loads an output voltage clamp of typically 52V is implemented. The DIAGnostic is an open drain output. The logic status depends on the PRoGramming pin. If the PRG pin is 'low' the DIAG output becomes low, if the device works correctly. At thermal shut-down of one channel or if the ground is disconnected the DIAGnostic output becomes high. If the PRG pin is 'high' this output is switched off at normal function and switched on at overtemperature. For the fault condition of interrupted ground, the potential of VS and Diagnostic should be equal. DIAGNOSTIC TABLE Pins EN PRG IN OUT DIAG H L L L (on) L (on) H L H H (off) L (on) H H L H (off) H (off) H H H L (on) H (off) L X X H (off) H (off) Overtemperature, disconnected ground or supply voltage H L X H (off) * H (off) Overtemperature H H X H(off) * L(on) Normal function X = not relevant * selective for each channel at overtemperature 7/13 L9333 Figure 2. Application for Inverting Transfer Polarity BOARD VOLTAGE 14V VCC = 5V or 3.3V 33μF PRG VCC VS DIAG INT 2W 12mH M VCC = 5V 250mA OUT1 A0:8 MICRO CONTROLLER 8 ADDRESS DECODER EN 240Ω OUT2 VCC OUT3 D0 IN1 D1 IN2 D2 IN3 D3 IN4 IN OUT4 L9333 50KHz 10μH GND 50pF GND GND D01AT487 Figure 3. Application for non Inverting Transfer Polarity BOARD VOLTAGE 14V 33μF VS PRG DIAG 2W EN 12mH M 250mA IN1 IN2 VCC = 5V L9333 OUT1 240Ω OUT2 VCC OUT3 IN3 IN OUT4 10μH IN4 50pF GND GND D01AT488 Note We recommend to use the device for driving inductive loads with flyback energy EFB  2mJ. 8/13 L9333 EMC SPECIFICATION EMS (electromagnetic susceptibility) Measurement setup: DUT mounted on a specific application board is driven in a typical application circuit (see below). Two devices are stimulated by a generator to read and write bus signals. They will be monitored externally to ensure proper function. Measurement method: a) The two bus lines are transferred 2m under a terminated stripline. That's where they were exposed to the RF-field. Stripline setup and measurement method is described in DIN 40839-4 or ISO 11452-5. b) DUT mounted on the same application board is exposed to RF through the tophole of a TEM-cell. Measurement method according SAE J1752. c) The two bus lines are transferred into a BCI current injection probe. Setup and measurement method is described in ISO 11452-4. Failure criteria: Failure monitoring is done by envelope measurement of the logic signals with a LeCroy oscilloscope with acceptance levels of 20% in amplitude and 2% time. Limits: The device is measured within the described setup and limits without fail function. The Electromagnetic Susceptivity is not tested in production. a) Field strength under stripline of > 250V/m in the frequency range 1 - 400MHz modulation:AM 1kHz 80%. b) Field strength in TEM-cell of > 500V/m in the frequency range 1 - 400MHz modulation: AM 1kHz 80%. c) RF-currents with BCI of > 100mA in the frequency range 1 - 400MHz modulation: AM 1kHz 80%. Measured Circuit The EMS of the device was verified in the below described setup. 9/13 10/13 1 1 1 1KHz 2 500Hz 2 250Hz 2 125Hz 5 4 17 16 7 U(t) 8 13 14 1 11 D01AT489 9 14V Flat cable STRIPLINE 2m 9 IN4 5 4x 4.7nF IN3 4 IN1 10nF 33μF IN2 4x 10KΩ SM6T39A SMBYW01-200 17 16 1 EN VS GND L9333 4.7nF OUT4 4 x 1nF OPTIONAL 7 8 OUT3 14 19 4 x 100Ω OPTIONAL 13 4.7nF JUMPER 20KΩ 11 OUT2 OUT1 DIAG PRG JUMPER 10KΩ 4.7nF 10KΩ ANECHOIC CHAMBER L9333 Figure 4. L9333 mm inch OUTLINE AND MECHANICAL DATA DIM. MIN. TYP. MAX. MIN. TYP. MAX. A 2.35 2.65 0.093 0.104 A1 0.1 0.3 0.004 0.012 B 0.33 0.51 0.013 0.020 C 0.23 0.32 0.009 0.013 D 12.6 13 0.496 0.512 E 7.4 7.6 0.291 0.299 e 1.27 0.050 H 10 10.65 0.394 0.419 h 0.25 0.75 0.010 0.030 L 0.4 1.27 0.016 0.050 SO20 (12+4+4) K 0˚ (min.)8˚ (max.) L h x 45˚ A B e A1 K C H D 20 11 E 1 0 1 SO20MEC PAD 11/13 L9333 L9333 SIZE 2.53x2.37mm -125.00 / 991.00 OUT2 125.00 / 991.00 OUT3 GND1 GND2 -1063.00 / 779.50 1063.00 / 779.50 OUT1 OUT4 -1063.00 / 300.00 1063.00 / 300.00 PRG EN -1075.50 / 84.00 0:0 1075.50 / 98.00 IN1 IN4 -1075.50 / -332.50 1075.50 / -332.50 IN2 IN3 -1075.50 / -769.00 DIAG 1075.50 / -769.00 TSD 68.50 / -1014.25 -846.50 / -999.50 VS 846.50 / -999.50 D01AT490 12/13 L9333 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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