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L9654

L9654

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    -

  • 描述:

    IC AED SMARTPOWER

  • 数据手册
  • 价格&库存
L9654 数据手册
L9654 Quad squib driver and dual sensor interface ASIC for safety application Datasheet - production data  Support Manchester protocol for satellite sensors  Supports for variable bit rate detection  Independent current limit and fault timer shutdown protection for each satellite output  Short to ground and short to battery detection and reporting for each satellite channel *$3*36 LQFP48  5.5 MHz SPI interface Features  Satellite message error detection  4 deployment drivers sized to deliver 1.2 A (min) for 2 ms (min) and 1.75 A (min) for 1ms (min).  2 kV ESD capability on all pins  Low voltage internal reset  Package: 48 lead LQFP  Technology: ST Proprietary BCD5s (0.57 μm)  Independently controlled high-side and lowside MOS for diagnosis  Analog output available for resistance Description  Squib short to ground, short to battery and MOS diagnostic available on SPI register L9654 is intended to deploy up to 4 squibs and to interface up to 2 satellites.  Capability to deploy the squib with 1.2 A (min.) or 1.75 A under 35 V load-dump condition and the low-side MOS is shorted to ground Squib drivers are sized to deploy 1.2 A (min.) for 2 ms (min.) during load dump and 1.75 A (min.) for 1 ms (min.) during load dump.  Capability to deploy the squib with 1.2 A (min.) at 6.9 V VRES and 1.75 A at 12 V VRES. Diagnostic of squib driver and squib resistance measurement is controlled by micro controllers.  Interface with 2 satellite sensors  Programmable independent current trip points for each satellite channel Satellite interfaces support Manchester decoder with variable bit rates. Table 1. Device summary Order code Package Packing L9654 LQFP48 Tray L9654TR LQFP48 Tape and reel November 2013 This is information on a product in full production. DocID14218 Rev 3 1/59 www.st.com Contents L9654 Contents 1 2 Block diagram and application schematic . . . . . . . . . . . . . . . . . . . . . . . 7 1.1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.2 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 3 4 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.3.1 DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.3.2 AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.2 Power on reset (POR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.3 RESETB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.4 MSG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.5 IREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.6 Loss of ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.7 Deployment and reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.8 Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.9 4.8.1 Chip select (CS_A, CS_D, CS_S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.8.2 Serial clock (SCLK, SCLK_A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.8.3 Serial data output (MISO, MISO_A) . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.8.4 Serial data input (MOSI, MOSI_A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Deployment drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.9.1 4.10 2/59 Arming interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 DEPEN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.10.1 Deployment driver diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.10.2 Continuity diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.10.3 Short to battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 DocID14218 Rev 3 L9654 Contents 4.11 4.12 4.13 4.14 4.10.4 Short to ground and open circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4.10.5 Resistance measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4.10.6 MOS diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4.10.7 Low-side MOS diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4.10.8 High-side MOS diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 4.10.9 Loss of ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Deployment driver SPI bit definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 4.11.1 Deployment driver MOSI bit definition . . . . . . . . . . . . . . . . . . . . . . . . . . 32 4.11.2 Deployment driver register mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 4.11.3 Deployment driver command mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 4.11.4 Deployment driver diagnostic mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 4.11.5 Deployment driver monitor mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 4.11.6 Deployment driver MISO bit definition . . . . . . . . . . . . . . . . . . . . . . . . . . 39 4.11.7 Deployment driver register mode response . . . . . . . . . . . . . . . . . . . . . . 39 MISO register mode response summary . . . . . . . . . . . . . . . . . . . . . . . . . 40 4.12.1 Deployment driver command mode response . . . . . . . . . . . . . . . . . . . . 41 4.12.2 Deployment driver diagnostic mode response . . . . . . . . . . . . . . . . . . . . 42 4.12.3 Deployment driver status response . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 4.12.4 Deployment driver SPI fault response . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Arming SPI bit definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 4.13.1 Arming MOSI_A bit definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 4.13.2 ARM[01..23] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 4.13.3 ARM[01..23]* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 4.13.4 Arming MISO_A bit definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 4.13.5 ARM[01..23] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Satellite sensor interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 4.14.1 Current sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 4.14.2 Manchester decoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 4.14.3 Communication protocols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 4.14.4 "A" protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 4.14.5 "B" variable length protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 4.14.6 FIFO buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 4.14.7 Satellite continuity check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 4.14.8 Message waiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 4.14.9 Satellite serial data input (MOSI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 4.14.10 Satellite MOSI bits definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 4.14.11 Satellite module configuration register (CH1 only) . . . . . . . . . . . . . . . . 50 DocID14218 Rev 3 3/59 4 Contents L9654 4.14.12 Channel configuration registers (CCR1, CCR2, CCR3, CCR4) . . . . . . . 51 4.14.13 SPI MISO bits layout for configuration report . . . . . . . . . . . . . . . . . . . . 55 5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 4/59 DocID14218 Rev 3 L9654 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Table 44. Table 45. Table 46. Table 47. Table 48. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Maximum operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 DC specification general . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 DC specification: deployment drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Satellite interface DC specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 AC specification: deployment drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 AC specifications: satellite . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 SPI timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 SPI transmission during a deployment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Deployment driver SPI response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 MOSI bit layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 MOSI mode bits definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 MOSI register mode message definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Pulse stretch timer table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 MOSI command mode message definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 MOSI diagnostic mode message definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Channel selection decoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 MOSI monitor mode message definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 MISO bit layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 MISO mode bits definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 MISO register mode response definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 MISO register mode response summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 MISO command mode response definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 MISO diagnostic mode response definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 MISO status response definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 MISO SPI fault response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Arming MOSI_A bit definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Arming MISO_A bit definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Satellite MOSI bits layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 MOSI satellite interface registers map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Master configuration register definition (CH1 only). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Channel configuration register definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Current ranges supported are given in following table . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Satellite/decoder control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 "B" protocol configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Bit time selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Mode select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 SPI mode selects reply for satellite channels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Satellite MISO bits definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 SPI MISO bits layout when reporting FIFO data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 MISO Manchester message data definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Status bits definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Satellites fault codes definition supporting "A" protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Satellites fault codes definition supporting "B" protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Document revision history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 DocID14218 Rev 3 5/59 5 List of figures L9654 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. 6/59 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 MOS settling time and turn-on time 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 MOS settling time and turn-on time 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 SPI timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 SPI timing measurement. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 SPI block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Arming daisy-chain configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Arming SPI transmission. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Deployment drivers diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Deployment sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Deployment flow chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Deployment driver diagnostic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Continuity diagnostic flow chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Resistance measurement flow chart. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Low-side diagnostic flow chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 High-side driver diagnostic flow chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Satellite interface block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Manchester decoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Manchester decoding using satellite protocol as an example. . . . . . . . . . . . . . . . . . . . . . . 47 "A" satellite protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 "B" satellite protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 LQFP48 mechanical data and package dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 DocID14218 Rev 3 L9654 Block diagram and application schematic 1 Block diagram and application schematic 1.1 Block diagram Figure 1. Block diagram &6B$ 6&/.B$ 026,B$ 0,62B$ $UPLQJ ,QWHUIDFH &6B' &6B6 6&/. 026, 0,62 63, ,5() 9&& 7(67 '(3(1 9%8&. 5(6(7 $287 ,&+ ,&+ ,&+ ,)9 ,&+ ,)9 06* 'HSOR\PHQW 'ULYHU 6HQVRU ,QWHUIDFH 95(6  64+ 64/ *1' 95(6  64+ 64/ *1' 95(6  64+ 64/ *1' 95(6  64+ 64/ *1' *1' 95(6  64+ 64/ *1' 95(6  64+ 64/ *1' 95(6  64+ 64/ *1' *1' 95(6  64+ 64/ *1' $*1' '*1' *$3*36 1.2 Application schematic Figure 2. Application schematic , 62%3 M& M& K7 6$$ 62%3 62%3 62%3 62%3 31( )2%& 6$$ 31( 6"5#+ M& M& 2ESETPINOF0OWER3UPPLY 0ROCESSOR)/ K7 !$#)NPUT P& P& M& P& M& 31, M& 6"5#+ M& 31, 2%3%4" #3?$ #3?3 3#,+ -/3) -)3/ #3?! 3#,+?! -/3)?! -)3/?! $%0%. M& 31( M& M& M& M& M& M& M& M& 31, 31( 31, )#( P& 3ATELLITE3ENSOR P& 3ATELLITE3ENSOR )#( -3' !/54 !/54?'.$ 4%34 '.$ '.$ '.$ '.$ '.$ *$3*36 DocID14218 Rev 3 7/59 58 Pin description 2 L9654 Pin description Table 2. Pin function 8/59 Pin # Pin name Description I/O type Reset state 1 MISO_A Output Hi-Z 2 NC - - 3 RESETB Input Pullup 4 GND Signal ground (analog & digital) - - 5 VDD VDD supply voltage Input - 6 NC - - 7 CS_A SPI chip select for arming interface Input Pulldown 8 CS_S SPI chip select for satellite interface Input Pulldown 9 CS_D SPI Chip select for deployment driver Input Pulldown 10 DEPEN Deployment enable Input Pulldown 11 MOSI SPI data in Input Hi-Z 12,13 NC No connect - - 14 MOSI_A Arming SPI data in Input Hi-Z 15 SCLK_A Arming SPI clock Input Hi-Z 16 SCLK SPI clock Input Hi-Z 17 GND2 Power ground for loop channel 2 - - 18 SQL2 Low-side driver output for channel 2 Output Pulldown 19 SQH2 High-side driver output for channel 2 Output Hi-Z 20 VRES2 Reserve voltage for loop channel 2 Input - 21 VRES3 Reserve voltage for loop channel 3 Input - 22 SQH3 High-side driver output for channel 3 Output Hi-Z 23 SQL3 Low-side driver output for channel 3 Output Pulldown 24 GND3 Power ground for loop channel 3 - - 25 TEST Test pin Input Pulldown 26 NC - - 27 V8BUCK Input - 28 NC - - 29 ICH2 Output Hi-Z 30 NC - - 31 ICH1 Output Hi-Z 32 NC - - 33 IREF Output - Arming SPI data out No connect Reset pin No connect No connect Supply Voltage for Satellite Interface and Resistance Measurement No connect Current sense output for channel 2 No connect Current sense output for channel 1 No connect External current reference resistor DocID14218 Rev 3 L9654 Pin description Table 2. Pin function (continued) Pin # 34 2.1 Pin name Description I/O type Reset state - - Output Hi-Z No connect - - - - AOUT_GND Ground reference for AOUT 35 AOUT Analog output for loop diagnostics 36 NC 37 GND1 Power ground for loop channel 1 38 SQL1 Low-side driver output for channel 1 Output Pulldown 39 SQH1 High-side driver output for channel 1 Output Hi-Z 40 VRES1 Reserve voltage for loop channel 1 Input - 41 VRES0 Reserve voltage for loop channel 0 Input - 42 SQH0 High-side driver output for channel 0 Output Hi-Z 43 SQL0 Low-side driver output for channel 0 Output Pulldown 44 GND0 Power ground for loop channel 0 - - 45 NC No connect - - 46 MSG Message waiting Output Pulldown 47 MISO SPI data out Output Hi-Z 48 NC No connect - - Thermal data Table 3. Thermal data Symbol Rth j-amb Parameter Thermal resistance junction-to-ambient DocID14218 Rev 3 Value. Unit 68 °C/W 9/59 58 Electrical specification L9654 3 Electrical specification 3.1 Maximum ratings The device may not operate properly if maximum operating condition is exceeded. Table 4. Maximum operating conditions Symbol VDD V8BUCK VRES Parameter Supply voltage V8BUCK voltage VRES voltage (VRES0, VRES1, VRES2, VRES3) VI Discrete input voltage (RESETB, DEPEN, CS_A, CS_D, CS_S, SCLK, SCLK_A, MOSI, MOSI_A, MISO, MISO_A) Tj Junction temperature 3.2 Value Unit 4.9 to 5.1 V 7 to 8.5 V 35 V 0.3 to (VDD +0.3) V -40 to 150 °C Absolute maximum ratings Maximum ratings are absolute ratings; exceeding any one of these values may cause permanent damage to the integrated circuit. Table 5. Absolute maximum ratings Symbol Value Unit -0.3 to 5.5 V V8BUCK voltage 0.3 to 40 V VRES VRES voltage (VRES0, VRES1, VRES2, VRES3) 0.3 to 40 V SQL-H Squib high and low-side drivers (SQH0, SQH1, SQH2, SQH3, SQL0, SQL1, SQL2, SQL3) 0.3 to 40 V -0.3 to 5.5 V -3 to 40 V -0.3 to 5.5 V 150 °C VDD V8BUCK VI ICHx Parameter Supply voltage Discrete input voltage (RESETB, DEPEN, CS_A, CS_D, CS_S, SCLK, SCLK_A, MOSI, MOSI_A, MISO, MISO_A) Satellite input voltage (ICH1, ICH2, ICH3, ICH4) - Analog/digital outputs voltage (AOUT, IREF, MSG, IF3V3, IF4V4) Tj Maximum steady-state junction temperature Tamb Ambient temperature -40 to 95 °C Tstg Storage temperature -65 to 150 °C 10/59 DocID14218 Rev 3 L9654 Electrical specification 3.3 Electrical characteristics 3.3.1 DC characteristics VRES = 6.5 to 35 V, VDD = 4.9 to 5.1 V, V8BUCK = 7.0 V to 8.5 V, Tamb = -40°C to +95°C. Table 6. DC specification general Symbol Parameter (1) VRST VRST_L (2) IDD RIREF_H RIREF_L Internal voltage reset VDD Input current VDD Resistance threshold IREF VIH_RESETB Input voltage threshold VIL_RESETB RESETB VHYS VIH_DEPEN Input voltage threshold VIL_DEPEN DEPEN IPD VIH_TEST VIL_TEST ITEST IPU IV8BUCK VIH VIL VHYS Input pull-down current DEPEN Test condition Min. Typ Max. VDD drops until deployment drivers are disabled 4.0 - 4.5 2.1 - 3.0 Normal operation; ICH1-2 = 0 A 4.5 - 7.0 Unit V Short to –0.3V on SQH; ICH1-2 = 0 A 4.2 - 7.9 Short to –0.3V on SQL; ICH1-2 = 0A 4.2 - 7.9 Deployment; ICH1-2 = 0A 4.2 - 7.9 - 20.0 - 60.0 kΩ mA - 2.0 - 9.0 kΩ - - - 2.0 V - 0.8 - - 100 - 400 mV V - - - 2.0 V - 0.8 - - V VIN = VIL to VDD 10 - 50 μA - - - 3.6 V - 0.8 - - V Input pull-down current TEST TEST = 5 V 1.0 - 2.5 mA Input pull-up current RESETB RESETB = VIH to GND 10 - 60 μA Current consumption V8BUCK 25 - 40 μA - - 2.0 V 0.8 - - V 100 - 400 mV - 1 μA Input voltage threshold TEST - Input voltage threshold MOSI, Input Logic = 1 MOSI_A, SCLK, SCLK_A, Input Logic = 0 CS_S, CS_D, CS_A - ILKG Input leakage current MOSI, MOSI_A, SCLK, SCLK_A IPD Input pulldown current CS_S, CS_D, CS_A VIN = VDD VIN = 0 to VIH -1 - - μA VIN = VIL to VDD 10 - 50 μA IOH = -800 μA VDD–0.8 - - V VOL Output voltage MISO, MISO_A, MSG IOL = 1.6 mA - - 0.4 V IHI_Z Tri-state current MISO, MISO_A, MISO = VDD - - 1 μA MISO = 0 V -1 - - μA VOH 1. VRST shall have a POR de-glitch timer. 2. VRST L shall have no timer. DocID14218 Rev 3 11/59 58 Electrical specification L9654 VRES = 6.5 to 40 V, VDD = 4.9 to 5.1 V, V8BUCK = 7.0 V to 8.5 V, Tamb = -40 °C to +95 °C. Table 7. DC specification: deployment drivers Symbol VOH Parameter Output voltage AOUT VOL IZ ILKG Tri-state current AOUT Leakage current SQH ISTG ILKG Bias current VRES(1) ILKG ISTG Leakage current SQL ISTB Test conditions Min. Typ Max. Units High Saturation Voltage; IAOUT = -500μA VDD04 - - V Low Saturation Voltage; IAOUT = +500μA - - 0.3 V AOUT = VDD - - 1 μA AOUT = 0V -1 - - μA V8BUCK = VDD = 0, VRES = 36 V, VSQH = 0 V - - 50 μA V8BUCK = 18V; VDD = 5V; VSQH = -0.3V -5 - - mA V8BUCK = 18 V; VDD = 5 V; VRES = 36V; SQH shorted to SQL - - 10 μA V8BUCK = VDD = 0, VSQL = 18 V -10 - 10 μA V8BUCK = 18 V; VDD = 5V; VSQL = -0.3 V -5 - - mA V8BUCK = 18 V; VDD = 5 V; VSQL = 18 V - - 5 mA IPD Pull-down current SQL VSQL = 1.8 V to VDD 900 - 1300 μA IPD_SQH Pull-down current SQH VSQH = SBTH to VRES 900 - 1300 μA VBIAS Diagnostics bias voltage ISQH = -1.5 mA (nominal: 2.0 V) 1.80 - 2.20 V IBIAS Diagnostics bias current VSQH = 0V -7 - - IPD VSTB Short to battery threshold (Nominal 3.0 V) 2.70 - 3.30 V VSTG Short to ground threshold (Nominal 1.0 V) 0.90 - 1.10 V VI_th MOS test load voltage detection - 100 - 300 mV ISRC Resistance measurement current source VDD = 5.0 V; V8BUCK = 7.0 V to 26.5 V 38 - 42 mA ISINK Resistance measurement current sink - 45 - 55 mA RDSon Total high and low-side MOS On resistance High-side MOS + Low-side MOS VRES = 6.9 V; I = 1.2 A @95 °C - - 2.0 Ω RDSon High-side MOS on resistance VRES = 35 V; IVRES = 1.2 A; Tamb = 95 °C - - 0.8 Ω RDSon Low-side MOS on resistance VRES = 35 V; IVRES = 1.2 A; Tamb = 95 °C - - 1.2 Ω MOSI Register mode bit D10=”0” RLOAD = 1.7 ΩVRES = 6.9 to 35 V 1.20 - 1.47 A MOSI Register mode Bit D10=”1” RLOAD = 1.7 ΩVRES = 12 to 35 V 1.75 - 2.14 A RLOAD = 1.75 Ω 2.15 - 3.5 A 0 - 10.0 Ω IDEPL_12A Deploiment current IDEPL_175A ILIM Low-side MOS current limit RL RANGE Load resistance range(2) 1. Not applicable during a diagnostic. 2. Test conditions for load resistance measurements 12/59 DocID14218 Rev 3 L9654 Electrical specification VDD = 4.9 to 5.1 V, V8BUCK = 7.0 V to 8.5 V, Tamb = -40 °C to +95 °C. Table 8. Satellite interface DC specifications Symbol I_Lim Vhdp Parameter Current limit High-side voltage drop Test conditions Min Typ Max Unit High-side short to -0.3 V (-)75 - (-)150 mA High-side short to Battery - - 5 mA V8BUCK =Vcc=0 measured @ V8BUCK - - 5 mA I=50 mA @105°C; V8BUCK=7.0V - - 1 V I=25 mA @105°C; V8BUCK=7.0V - - 0.5 V Bit
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