L9658TR

L9658 Octal squib driver and quad sensor interface ASIC for safety application Features ■ 8 deployment drivers sized to deliver 1.2 A (min) for 2 ms (min) and 1.75 A (min) for 1 ms (min) ■ Independently controlled high-side and lowside MOS for diagnosis ■ Analog output available for resistance ■ Squib short to ground, short to battery and MOS diagnostic available on SPI register ■ Hall effect sensor support on satellite channels 3 and 4. ■ Capability to deploy the squib with 1.2 A (min) or 1.75 A under 35 V load-dump condition and the low side MOS is shorted to ground ■ Low voltage internal reset ■ 2 kV ESD capability on all pins ■ Package: 64 leads LQFP ■ Technology: ST proprietary BCD5s (0.57 µm) ■ LQFP64 Capability to deploy the squib with 1.2 A (min) at 6.9 V VRES and 1.75 A at 12 V VRES ■ Interface with 4 satellite sensors ■ Programmable independent current trip points for each satellite channel ■ Support Manchester protocol for satellite sensors ■ Supports for variable bit rate detection ■ Independent current limit and fault timer shutdown protection for each satellite output Squib drivers are sized to deploy 1.2 A minimum for 2 ms minimum during load dump and 1.75 A minimum for 1ms minimum during load dump. ■ Short to ground and short to battery detection and reporting for each satellite channel Diagnostic of squib driver and squib resistance measurement is controlled by micro controller. ■ 5.5 MHz SPI interface ■ Satellite message error detection Satellite interfaces support Manchester decoder with variable bit rate. Table 1. Description L9658 is intended to deploy up to 8 squibs and to interface up to 4 satellites. 2 satellite interfaces can be used to interface Hall sensors. Device summary Order code Package Packing L9658 LQFP64 Tray L9658TR LQFP64 Tape and reel September 2013 Doc ID 14219 Rev 3 1/64 www.st.com 1 Contents L9658 Contents 1 2 Block diagram and application schematic . . . . . . . . . . . . . . . . . . . . . . . 7 1.1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.2 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 3 4 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.3.1 DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.3.2 AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.2 Power on reset (POR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.3 RESETB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.4 MSG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.5 IREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.6 Loss of ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.7 Deployment and reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.8 Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.9 4.8.1 Chip select (CS_A, CS_D, CS_S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.8.2 Serial clock (SCLK, SCLK_A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.8.3 Serial data output (MISO, MISO_A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.8.4 Serial data input (MOSI, MOSI_A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Deployment drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.9.1 4.10 2/64 Arming interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 DEPEN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.10.1 Deployment driver diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.10.2 Continuity diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4.10.3 Short to battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Doc ID 14219 Rev 3 L9658 Contents 4.11 4.12 4.13 4.14 4.10.4 Short to ground and open circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4.10.5 Resistance measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4.10.6 MOS diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4.10.7 Low side MOS diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4.10.8 High side MOS diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 4.10.9 Loss of ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Deployment driver SPI bit definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 4.11.1 Deployment driver MOSI bit definition . . . . . . . . . . . . . . . . . . . . . . . . . . 32 4.11.2 Deployment driver register mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 4.11.3 Deployment driver command mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 4.11.4 Deployment driver diagnostic mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 4.11.5 Example of short between loops diagnostic . . . . . . . . . . . . . . . . . . . . . 38 4.11.6 Deployment driver monitor mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 4.11.7 Deployment driver MISO bit definition . . . . . . . . . . . . . . . . . . . . . . . . . . 41 4.11.8 Deployment driver register mode response . . . . . . . . . . . . . . . . . . . . . . 41 MISO register mode response summary . . . . . . . . . . . . . . . . . . . . . . . . . 42 4.12.1 Deployment driver command mode response . . . . . . . . . . . . . . . . . . . . 43 4.12.2 Deployment driver diagnostic mode response . . . . . . . . . . . . . . . . . . . . 44 4.12.3 Deployment driver status response . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 4.12.4 Deployment driver SPI fault response . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Arming SPI bit definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 4.13.1 Arming MOSI_A bit definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 4.13.2 ARM[01..67] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 4.13.3 ARM[01..67]* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 4.13.4 Arming MISO_A bit definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 4.13.5 ARM[01..67] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Satellite sensor interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 4.14.1 Current sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 4.14.2 Manchester decoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 4.14.3 Communication protocols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 4.14.4 "A" protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 4.14.5 "B" variable length protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 4.14.6 FIFO buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 4.14.7 Satellite continuity check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 4.14.8 (IFx/Vx) hall effect support mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 4.14.9 (IFx/Vx) raw data out mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 4.14.10 Message waiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Doc ID 14219 Rev 3 3/64 Contents L9658 4.14.11 Satellite serial data input (MOSI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 4.14.12 Satellite MOSI bits definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 4.14.13 Satellite module configuration register (CH1 only) . . . . . . . . . . . . . . . . 53 4.14.14 Channel configuration registers (CCR1, CCR2, CCR3, CCR4) . . . . . . . 54 4.14.15 SPI MISO Bits layout for configuration report . . . . . . . . . . . . . . . . . . . . 58 5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 4/64 Doc ID 14219 Rev 3 L9658 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Table 44. Table 45. Table 46. Table 47. Table 48. Table 49. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Thermal Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Maximum operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 DC specification general . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 DC Specification: deployment drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Satellite interface DC specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 AC specification: deployment drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 AC specifications: satellite . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 SPI timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 SPI transmission during a deployment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Deployment driver SPI response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 MOSI bit layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 MOSI mode bits definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 MOSI register mode message definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Pulse stretch timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 MOSI command mode message definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 MOSI diagnostic mode message definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Channel selection decoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 MOSI monitor mode message definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 MISO bit layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 MISO mode bits definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 MISO register mode response definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 MISO register mode response summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 MISO command mode response definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 MISO diagnostic mode response definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 MISO status response definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 MISO SPI fault response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Arming MOSI_A bit definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Arming MISO_A bit definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Satellite MOSI bits layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 MOSI satellite interface registers map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Master configuration register definition (CH1 Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Channel configuration register definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Current ranges supported are given in following table . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Satellite/decoder control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 "B" protocol configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Bit time selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Mode select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 SPI mode selects reply for satellite channels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Satellite MISO bits definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 SPI MISO bits layout when reporting FIFO data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 MISO Manchester message data definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Status bits definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Satellites fault codes definition supporting “A” protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Satellites fault codes definition supporting “B” protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Hall effect fault codes definition (CH3 and CH4) only. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Doc ID 14219 Rev 3 5/64 List of figures L9658 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. 6/64 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 MOS settling time and turn-on time 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 MOS settling time and turn-on time 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 SPI timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 SPI timing measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 SPI block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Arming daisy-chain configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Arming SPI transmission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Deployment drivers diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Deployment sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Deployment flow chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Deployment driver diagnostic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Continuity diagnostic flow chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Resistance measurement flow chart. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Low side diagnostic flow chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 High side driver diagnostic flow chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Satellite interface block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Manchester decoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Manchester decoding using satellite protocol as an example . . . . . . . . . . . . . . . . . . . . . . 49 "A" satellite protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 "B" satellite protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 LQFP64 mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Doc ID 14219 Rev 3 L9658 Block diagram and application schematic 1 Block diagram and application schematic 1.1 Block diagram Figure 1. Block diagram CS_A SCLK_A MOSI_A MISO_A VRES0 SQH0 SQL0 GND0 VRES1 SQH1 SQL1 GND1 VRES2 SQH2 SQL2 GND2 VRES3 SQH3 SQL3 GND3 VRES4 SQH4 SQL4 GND4 VRES5 SQH5 SQL5 GND5 VRES6 SQH6 SQL6 GND6 VRES7 SQH7 SQL7 GND7 AGND DGND Arming Interface CS_D CS_S SCLK MOSI MISO SPI IREF VCC TEST DEPEN V8BUCK RESET AOUT Deployment Driver ICH1 ICH2 ICH3 Sensor Interface IF3/V3 ICH4 IF4/V4 MSG 1.2 Application schematic Figure 2. Application schematic VRES 0.1µF VRES0 VRES1 VRES2 VRES3 VRES4 VRES5 VRES6 VRES7 3000µF 12.5k VDD IREF VDD V8BUCK 0.01µF 220µF Reset pin of Power Supply Processor I/O RESETB CS_D CS_S SCLK MOSI MISO CS_A SCLK_A MOSI_A MISO_A DEPEN IF3/V3 IF4/V4 220µF 0.01µF 0.1µF 0.01µF 0.1µF 0.01µF 0.1µF 0.01µF 0.1µF 0.01µF 0.1µF 0.01µF 0.1µF 0.01µF 0.1µF 0.01µF 0.1µF 0.01µF 0.1µF 0.01µF 0.1µF 0.01µF 0.1µF 0.01µF 0.1µF 0.01µF 0.1µF 0.01µF 0.1µF 0.01µF SQL1 SQH2 SQH3 SQL3 SQH4 SQL4 SQH5 SQL5 SQH6 SQL6 10nF 12.5k 0.01µF 0.1µF SQH1 10nF ADC Input 0.1µF SQL0 SQL2 0.01µF V8BUCK SQH0 AOUT AOUT_GND TEST GND0 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND Doc ID 14219 Rev 3 SQH7 SQL7 ICH1 1000pF Satellite Sensor 1000pF Satellite Sensor 1000pF Satellite Sensor OR Hall Effect Switch 1000pF Satellite Sensor OR Hall Effect Switch ICH2 ICH3 ICH4 7/64 Pin description L9658 2 Pin description Table 2. Pin function Pin # 8/64 Pin name Description I/O type Reset state 1 MSG Message waiting Output Pull-down 2 MISO SPI data out Output Hi-Z 3 MISO_A Arming SPI data out Output Hi-Z 4 NC - - 5 RESETB Input Pull-up 6 GND Signal ground (analog & digital) - - 7 VDD VDD supply voltage Input - 8 NC - - No connect Reset pin No connect 9 CS_A SPI chip select for arming interface Input Pull-down 10 CS_S SPI chip select for satellite interface Input Pull-down 11 CS_D SPI chip select for deployment driver Input Pull-down 12 DEPEN Deployment enable Input Pull-down 13 MOSI SPI data in Input Hi-Z 14 MOSI_A Arming SPI data in Input Hi-Z 15 SCLK_A Arming SPI Clock Input Hi-Z 16 SCLK SPI clock Input Hi-Z 17 GND4 Power ground for loop channel 4 - - 18 SQL4 Low side driver output for channel 4 Output Pull-down 19 SQH4 High side driver output for channel 4 Output Hi-Z 20 VRES4 Reserve voltage for loop channel 4 Input - 21 VRES5 Reserve voltage for loop channel 5 Input - 22 SQH5 High side driver output for channel 5 Output Hi-Z 23 SQL5 Low side driver output for channel 5 Output Pull-down 24 GND5 Power ground for loop channel 5 - - 25 GND6 Power ground for loop channel 6 - - 26 SQL6 Low side driver output for channel 6 Output Pull-down 27 SQH6 High side driver output for channel 6 Output Hi-Z 28 VRES6 Reserve voltage for loop channel 6 Input - 29 VRES7 Reserve voltage for loop channel 7 Input - 30 SQH7 High side driver output for channel 7 Output Hi-Z 31 SQL7 Low side driver output for channel 7 Output Pull-down 32 GND7 Power ground for loop channel 7 - - 33 NC No connect 34 IF4/V4 Current feedback for channel 4 raw or raw data output for channel 4 35 IF3/V3 Current feedback for channel 3 raw or data output for channel 3 Doc ID 14219 Rev 3 - - Output Hi-Z Output Hi-Z L9658 Pin description Table 2. Pin # Pin name 36 NC 37 TEST 38 V8BUCK Description No Connect I/O type Reset state - - Test pin Input Pull-down Supply voltage for satellite interface and resistance measurement Input - 39 NC - - 40 ICH4 Current sense output for channel 4 Output Hi-Z 41 ICH3 Current sense output for channel 3 Output Hi-Z 42 ICH2 Current sense output for channel 2 Output Hi-Z 43 ICH1 Current sense output for channel 1 Output Hi-Z 44 NC - - 45 IREF Output - - - 46 2.1 Pin function (continued) No Connect No connect External current reference resistor AOUT_GND Ground reference for AOUT 47 AOUT 48 NC 49 50 Analog output for loop diagnostics Output Hi-Z No Connect - - GND3 Power ground for loop channel 3 - - SQL3 Low side driver output for channel 3 Output Pull-down 51 SQH3 High side driver output for channel 3 Output Hi-Z 52 VRES3 Reserve voltage for loop channel 3 Input - 53 VRES2 Reserve voltage for loop channel 2 Input - 54 SQH2 High side driver output for channel 2 Output Hi-Z 55 SQL2 Low side driver output for channel 2 Output Pull-down 56 GND2 Power ground for loop channel 2 - - 57 GND1 Power ground for loop channel 1 - - 58 SQL1 Low side driver output for channel 1 Output Pull-down 59 SQH1 High Side Driver Output for Channel 1 Output Hi-Z 60 VRES1 Reserve voltage for loop channel 1 Input - 61 VRES0 Reserve voltage for loop channel 0 Input - 62 SQH0 High side driver output for channel 0 Output Hi-Z Output Pull-down - - 63 SQL0 Low side driver output for channel 0 64 GND0 Power ground for loop channel 0 Thermal data Table 3. Symbol Rth j-amb Thermal Data Parameter Thermal resistance junction-to-ambient Doc ID 14219 Rev 3 Value. Unit 68 °C/W 9/64 Electrical specification L9658 3 Electrical specification 3.1 Maximum ratings The device may not operate properly if maximum operating condition is exceeded. Table 4. Maximum operating conditions Symbol VDD V8BUCK VRES Parameter Supply voltage V8BUCK voltage VRES voltage (VRES0, VRES1, VRES2, VRES3, VRES4, VRES5, VRES6, VRES7) VI Discrete input voltage (RESETB, DEPEN, CS_A, CS_D, CS_S, SCLK, SCLK_A, MOSI, MOSI_A, MISO, MISO_A) Tj Junction temperature Value Unit 4.9 to 5.1 V 7 to 8.5 V 35 V -0.3 to (VDD +0.3) V -40 to 150 °C 3.2 Absolute maximum ratings Caution: Maximum ratings are absolute ratings; exceeding any one of these values may cause permanent damage to the integrated circuit. Table 5. Absolute maximum ratings Symbol Value Unit Supply voltage -0.3 to 5.5 V V8BUCK voltage -0.3 to 40 V VRES VRES Voltage (VRES0, VRES1, VRES2, VRES3, VRES4, VRES5, VRES6, VRES7) -0.3 to 40 V SQL-H Squib high and low side drivers (SQH0, SQH1, SQH2, SQH3, SQH4, SQH5, SQH6, SQH7, SQL0, SQL1, SQL2, SQL3, SQL4, SQL5, SQL6, SQL7) -0.3 to 40 V VI Discrete input voltage (RESETB, DEPEN, CS_A, CS_D, CS_S, SCLK, SCLK_A, MOSI, MOSI_A, MISO, MISO_A) -0.3 to 5.5 V -3 to 40 V Analog/digital outputs voltage (AOUT, IREF, MSG, IF3V3, IF4V4) -0.3 to 5.5 V Ground pins voltage (GND, AOUT_GND, GND0, GND1, GND2, GND3, GND4, GND5, GND6, GND7) -0.3 to 5.5 V 150 °C VDD V8BUCK ICHx GNDx Tj Parameter Satellite input voltage (ICH1, ICH2, ICH3, ICH4) Maximum steady-state junction temperature Tamb Ambient temperature -40 to 95 °C Tstg Storage temperature -65 to 150 °C 10/64 Doc ID 14219 Rev 3 L9658 Electrical specification 3.3 Electrical characteristics 3.3.1 DC characteristics VRES = 6.5 to 35 V, VDD = 4.9 to 5.1 V, V8BUCK = 7.0 V to 8.5 V, Tamb = -40 °C to +95 °C Table 6. Symbol VRST(1) VRST_L (2) IDD RIREF_H RIREF_L DC specification general Parameter Internal voltage reset VDD Input current VDD Resistance threshold IREF VIH_RESETB Input voltage threshold VIL_RESETB RESETB VHYS VIH_DEPEN Input voltage threshold VIL_DEPEN DEPEN IPD VIH_TEST VIL_TEST ITEST IPU IV8BUCK VIH Test condition Min. Typ Max. VDD drops until deployment drivers are disabled 4.0 - 4.5 2.1 - 3.0 Normal operation; ICH1-4 = 0 A 6.2 - 8.6 Short to –0.3 V on SQH; ICH1-4 = 0 A 5.5 - 9.5 Short to –0.3 V on SQL; ICH1-4 = 0A 5.5 - 9.5 Deployment; ICH1-4 = 0 A 5.5 - 9.5 - 20.0 - 60.0 k - 2.0 - 9.0 k - - - 2.0 V - 0.8 - - V - 100 - 400 mV - 2.0 V - Unit V mA - 0.8 - - V VIN = VIL to VDD 10 - 50 A - - - 3.6 V - 0.8 - - V Input pull-down current TEST TEST = 5 V 1.0 - 2.5 mA Input pull-up current RESETB RESETB = VIH to GND 10 - 60 A Current consumption V8BUCK 25 - 40 µA - - 2.0 V 0.8 - - V 100 - 400 mV Input pull-down current DEPEN Input voltage threshold TEST - VHYS Input logic = 1 Input voltage threshold MOSI, Input logic = 0 MOSI_A, SCLK, SCLK_A, CS_S, CS_D, CS_A - ILKG Input leakage current MOSI, MOSI_A, SCLK, SCLK_A VIN = VDD - - 1 A VIN = 0 to VIH -1 - - A IPD Input pull-down current CS_S, CS_D, CS_A VIN = VIL to VDD 10 - 50 A IOH = -800 A VDD–0.8 - IOL = 1.6 mA - - 0.4 V MISO = VDD - - 1 A MISO = 0 V -1 - - A VIL VOH VOL Output voltage MISO, MISO_A, MSG IHI_Z Tri-state current MISO, MISO_A, V 1. VRST shall have a POR de-glitch timer. 2. VRST L shall have no timer. Doc ID 14219 Rev 3 11/64 Electrical specification L9658 VRES = 6.5 to 35 V, VDD = 4.9 to 5.1 V, V8BUCK = 7.0 V to 8.5 V, Tamb = -40 °C to +95 °C Table 7. Symbol DC Specification: deployment drivers Parameter VOH Output voltage AOUT VOL IZ Tri-state current AOUT ILKG Leakage current SQH ISTG ILKG Bias current VRES(1) ILKG ISTG Leakage current SQL Test conditions Min. Typ Max. Units High saturation voltage; IAOUT = -500 A VDD0.4 - - V Low saturation voltage; IAOUT = +500 A - - 0.3 V AOUT = VDD - - 1 A AOUT = 0 V -1 - - A V8BUCK = VDD = 0, VRES = 36 V, VSQH = 0V - - 50 A V8BUCK = 18 V; VDD = 5 V; VSQH = -0.3 V -5 - - mA V8BUCK = 18 V; VDD = 5 V; VRES = 36 V; SQH shorted to SQL - - 10 A V8BUCK = VDD = 0, VSQL = 18 V -10 - 10 V8BUCK = 18 V; VDD = 5 V; VSQL = -0.3 V -5 - V8BUCK = 18 V; VDD = 5 V; VSQL = 18 V ISTB IPD Pull-down current SQL VSQL = 1.8 V to VDD IPD_SQH Pull-down current SQH VSQH = SBTH to VRES A mA - 5 mA 900 - 1300 A 900 - 1300 A 1.80 - 2.20 V -7 - Short to battery threshold (Nominal 3.0 V) 2.70 - 3.30 V VSTG Short to ground threshold (Nominal 1.0 V) 0.90 - 1.10 V VI_th MOS test load voltage detection - 100 - 300 mV ISRC Resistance measurement current source VDD = 5.0 V; V8BUCK = 7.0 V to 26.5 V 38 - 42 mA ISINK Resistance measurement current sink - 45 - 55 mA RDSon Total high and low side MOS On resistance High side MOS + Low Side MOS VRES = 6.9 V; I = 1.2 A @95 °C - - 2.0  RDSon High side MOS on resistance VRES = 35V; IVRES = 1.2A; Tamb = 95°C - - 0.8  RDSon Low side MOS on resistance VRES = 35V; IVRES = 1.2A; Tamb = 95°C - - 1.2  MOSI register mode bit D10=”0” RLOAD = 1.7 VRES = 6.9 to 35 V 1.20 - 1.47 A MOSI register mode bit D10=”1” RLOAD = 1.7 VRES = 12 to 35 V 1.75 - 2.14 A 2.15 - 3.5 A 0 - 10.0  VBIAS Diagnostics Bias Voltage ISQH = -1.5 mA (nominal: 2.0 V) IBIAS Diagnostics Bias Current VSQH = 0 V VSTB IDEPL_12A Deployment current IDEPL_175A ILIM RL RANGE Low side MOS current limit RLOAD = 1.7  Load resistance range(2) - 1. Not applicable during a diagnostic. 2. Test conditions for load resistance measurements 12/64 Doc ID 14219 Rev 3 IPD L9658 Electrical specification VDD = 4.9 to 5.1V, V8BUCK = 7.0 V to 8.5 V, Tamb = -40 °C to +95 °C Table 8. Symbol Satellite interface DC specifications Min Typ Max Unit High side short to -0.3 V (-)75 - (-)150 mA High side short to Battery - - 5 mA V8BUCK =Vcc=0 measured @ V8BUCK - - -1 mA I=50 mA @105 °C; V8BUCK=7.0 V - - 1 V I=25 mA @105 °C; V8BUCK=7.0 V - - 0.5 V Iout = -50mA 460 - 540 A Iout = -5mA 46 - 54 A Bit