0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
L99MD02XPTR

L99MD02XPTR

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    FSOP36_300MIL

  • 描述:

    Automotive PMIC PowerSSO-36

  • 数据手册
  • 价格&库存
L99MD02XPTR 数据手册
L99MD02 Hexa half-bridge driver with SPI control for automotive applications Features ■ 6 half bridges ■ RON = typ.0.9 Ω (HS), 0.64 Ω (LS) at Tj = 25 °C ■ Current limit of each output at minimum 0.8 A ■ Internal PWM generation ■ PWM mode option for all half bridges for hold current ■ Two current monitor outputs ■ SPI interface for data communication ■ Temperature warning ■ All outputs overtemperature protected ■ All outputs short circuit protected ■ VCC supply voltage 3.0 to 5.3 V ■ Very low current consumption in standby mode typ. 5 µA ■ VS operating range compliant: 6 – 18 V PowerSSO-36 Description Applications ■ *$3*&)7 The L99MD02 IC is a 6 x half bridge driver for automotive applications. The device is intended to drive DC-motors. It is possible to drive 3 DC-motors simultaneously or up to 5 DC-motors sequentially. The integrated 24 bit standard serial peripheral interface (SPI) controls all outputs and provides diagnostic information: normal operation, open-load in on-state, overcurrent, temperature warning and overtemperature. DC motor driver Intended to drive HVAC flaps Table 1. Device summary Order code Package PowerSSO36 February 2011 Doc ID 16082 Rev 5 Tube Tape and reel L99MD02XP L99MD02XPTR 1/46 www.st.com 1 Contents L99MD02 Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 Power supply: VCC .......................................... 7 2.2 Power supply: VSA, VSB 2.3 Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.4 PWM mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.5 Current monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.6 Inductive loads 2.7 Diagnostic functions 2.8 Temperature warning and thermal shutdown 2.9 VS, VSA, VSB monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.10 Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.11 Overload detection 2.12 Cross-current protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 ...................................... 7 ............................................. 8 ......................................... 8 ...................... 8 .......................................... 9 3 Pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 4.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.2 ESD protection 4.3 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 SPI electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.1 6 SPI timing parameter definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Functional description of the SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6.1 2/46 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Signal description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6.1.1 Serial clock (SCK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6.1.2 Serial data input (SDI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6.1.3 Serial data output (SDO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6.1.4 Chip select not (CSN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Doc ID 16082 Rev 5 L99MD02 Contents 6.2 SPI communication flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 6.2.1 General description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 6.2.2 Command byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.3 Write operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 6.4 Read operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 6.5 Read and clear status operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 6.6 Read device information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 7 SPI control and status register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 8 Application examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 9 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 9.1 10 11 PowerSSO-36 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 10.1 ECOPACK® package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 10.2 PowerSSO-36™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 10.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Doc ID 16082 Rev 5 3/46 List of tables L99MD02 List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. 4/46 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 VS, VSA, VSB monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 ESD protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Operating junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Temperature warning and thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Over and undervoltage detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Current monitor output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Current monitor dynamic characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 DC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Dynamic characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Command byte (8 bit) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Data byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Operating code definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Global status byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 RAM memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 ROM memory map (access with OC0 and OC1 set to ‘1’) . . . . . . . . . . . . . . . . . . . . . . . . . 30 Control status register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Control register 1 (read/write); address 01h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Control register 3 (read/write); address 03h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Control register 4 (read/write); address 04h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Ratio for CURR2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Ratio for CURR1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Control register 5 (read/write); address 05h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Control register 6 (read/write); address 06h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Status register 0 (read only); address 10h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Status register 1 (read only); address 11h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Status register 2 (read only); address 12h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 PowerSSO-36 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Doc ID 16082 Rev 5 L99MD02 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Detailed block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Power on reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Pin connection (top view-not in scale) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Output turn-on/off delays and slew rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 SPI timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Serial output timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Clock polarity and clock phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 SPI frame structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Indication of the global error flag on SDO when CSN is low and SCK is stable . . . . . . . . . 27 Driving 3 DC-motors simultaneously. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Driving 5 DC-motors sequentially . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 PowerSSO-36 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 PowerSSO-36 thermal impedance junction ambient . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 PowerSSO-36™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 PowerSSO-36 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 PowerSSO-36 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Doc ID 16082 Rev 5 5/46 Block diagram L99MD02 1 Block diagram Figure 1. Detailed block diagram 9V 9FF 9V$ 9V% 9ROWDJH0RQLWRULQJ 9V$ &XUUHQW 6HQVH 2YHUFXUUHQW 2SHQORDG 287 287 287 &XUUHQW 6HQVH 2YHUFXUUHQW 2SHQORDG (1 9FF 3*1' /2*,& &61 9V% &XUUHQW 6HQVH 2YHUFXUUHQW 2SHQORDG 6&. 287 287 287 63, ', 9FF &XUUHQW 6HQVH 2YHUFXUUHQW 2SHQORDG '2 3*1' 9FF &855 9FF 08; &855 &XUUHQW 0RQLWRU *1' 6/46 Doc ID 16082 Rev 5 *$3*&)7 L99MD02 Overview 2 Overview 2.1 Power supply: VCC The supply voltage VCC (3.3 V / 5 V) supplies the whole device. In case of power-on (VCC increases from undervoltage to VPOR OFF = 2.75 V, typical) the circuit is initialized by an internally generated power-on reset (POR). If the voltage VCC decreases under the minimum threshold (VPOR ON = 2.55 V, typical), the outputs are switched off in 3-state (high impedance). The status registers are cleared and the control registers are reset to their default. Figure 2. Power on reset (1 $*9 2.2 Power supply: VSA, VSB Each VSA and VSB supplies the half bridges independently. VSA → Out 1 to Out 3 VSB → Out 4 to Out 6 2.3 Standby mode The standby mode of the L99MD02 is activated by EN pin to low. The inputs and outputs are switched off. The status registers are cleared and the control registers are reset to their default values. In the standby mode the current consumption is typically 5 µA. Doc ID 16082 Rev 5 7/46 Overview 2.4 L99MD02 PWM mode PWM frequency typ. 100 Hz. Duty cycle (SPI 2bit): 15%, 30%, 45% and 60%. Each half-bridge is independently addressable (SPI 8bit). 2.5 Current monitor The current monitor output sources a current image at the current monitor output which has a programmable ratio (1/250, 1/500, 1/750, 1/1000) of the instantaneous current of the selected half bridge (high side or low side). Via SPI it can be programmed which of the outputs will be multiplexed to the current monitor output. The current monitor output allows a more precise analysis of the actual state of the load rather than the detection of an open-or overload condition. For example this can be used to detect the motor state (starting, free-running, stalled). 2.6 Inductive loads Each half bridge is built by an internally connected high-side and a low-side power DMOS transistor. Due to the built-in reverse diodes of the output transistors, inductive loads can be driven at the outputs 2.7 Diagnostic functions All diagnostic functions (over/open-load, temperature warning and thermal shutdown, over/undervoltage) are internally filtered and the condition has to be valid for at least 32 µs (open-load: typ. 2 ms, respectively) before the corresponding status bit in the status registers will be set. The filters are used to improve the noise immunity of the device. Openload and temperature warning function are intended for information purpose and will not change the state of the output drivers. On contrary, the overload and thermal shutdown condition will disable the corresponding driver (overload) or all drivers (thermal shutdown), respectively. The microcontroller has to clear the overcurrent status bit to reactivate the corresponding driver. 2.8 Temperature warning and thermal shutdown If the junction temperature rises above Tj TW ON a temperature warning flag is set and is detectable via the SPI. If the junction temperature increases above the second threshold Tj SD ON, the thermal shutdown bit will be set and power DMOS transistors of all output stages are switched off to protect the device. Temperature warning flag and thermal shutdown bits are latched. In order to reactivate the output stages, the junction temperature must decrease below Tj SD ON - Tj SD HYS and the thermal shutdown bit has to be cleared by the microcontroller. 8/46 Doc ID 16082 Rev 5 L99MD02 2.9 Overview VS, VSA, VSB monitoring VS undervoltage: Status bit will be set. Have to be cleared via SPI. All outputs will be switched off. VS overvoltage: Status bit will be set. Has to be cleared via SPI. All outputs will be switched off (default). Can be deactivated via SPI. VSA undervoltage: Status bit will be set. Has to be cleared via SPI. Out 1 to Out 6 will be switched off. VSB undervoltage: Status bit will be set. Has to be cleared via SPI. Out 1 to Out 6 will be switched off. Table 2. 2.10 VS, VSA, VSB monitoring ‘typ Out x VS undervoltage 5.7 V Status + off VS overvoltage 22.0 V Status + (off or mask) VSA undervoltage 5.7 V Status + off VSB undervoltage 5.7 V Status + off Open-load detection The open-load detection monitors the load current in each activated output stage. If the load current is below the open-load detection threshold for at least 2 ms (tdOL) the corresponding open-load bit is set in the status register. Due to mechanical/electrical inertia of typical loads a short activation of the outputs (e.g. 3 ms) can be used to test the open-load status without changing the mechanical/ electrical state of the loads. 2.11 Overload detection In case of an overcurrent condition, a flag is set in the corresponding status register. If the overcurrent signal is valid for at least tISC = 32 µs, the overcurrent flag is set and the corresponding switch is switched off to reduce the power dissipation and to protect the integrated circuit. The microcontroller has to clear the status bit to reactivate the corresponding driver. 2.12 Cross-current protection The device is cross-current protected by an internal delay time. If one driver (LS or HS) is turned-off the activation of the other driver of the same half bridge will be automatically delayed by the cross-current protection time. After the cross-current protection time is expired the slew-rate limited switch-off phase of the driver will be changed to a fast turn-off phase and the opposite driver is turned-on with slew-rate limitation. Due to this behavior it is Doc ID 16082 Rev 5 9/46 Overview L99MD02 always guaranteed that the previously activated driver is totally turned-off before the opposite driver will start to conduct. If wrong SPI commands try to turn-on both driver (LS and HS) simultaneously, the high side and the low side will be (or stay) deactivated (3state). 10/46 Doc ID 16082 Rev 5 L99MD02 3 Pin definitions and functions Pin definitions and functions Table 3. Pin description Pin Symbol Function 1, 18, 19, 36 PGND Power ground: reference potential 9 AGND Analog ground: reference potential 27 DGND Digital ground: reference potential 6, 10, 13, 21, 23, 25, 32, 34 N.C. Not connected Exposed pad: reference potential connected to PGND Half bridge-output: the output is built by a high-side and a low-side switch, which are internally connected. The output stage of both switches is a power DMOS transistor. Each driver has an internal parasitic reverse diode (bulk-drain-diode: high-side driver from output to VSx, low-side driver from PGND to output). 2, 3, 16, 17, 20, 35 OUT 1 -6 29 VCC Logic voltage supply 3.3V / 5V for this input a ceramic capacitor as close as possible to GND is recommended VSA Power supply voltage for OUT 1 to 3 (external reverse protection required): for this input a ceramic capacitor as close as possible to GND is recommended. Important: For the capability of driving the full current at the outputs all pins of VSA must be externally connected! 14, 15, 22 VSB Power supply voltage for OUT 4 to 6 (external reverse protection required): for this input a ceramic capacitor as close as possible to GND is recommended. Important: For the capability of driving the full current at the outputs all pins of VSB must be externally connected! 11 VS VS 12 VS VS supply and monitoring 4, 5, 33 7, 8 CURR1 / 2 Current monitor 1 / 2 31 EN Enable enable the L99MD02 28 DI SPI data in the input requires CMOS logic levels and receives serial data from the microcontroller. The data is a 24 bit control word and the most significant bit (MSB) is transferred first. 26 DO SPI data out the diagnosis data is available via the SPI and this 3state output. The output will remain in 3-state, if the chip is not selected by the input CSN (CSN = high) 24 CSN SPI CSN chip select not (active low) this input is low active and requires CMOS logic levels. The serial data transfer between the L99MD02 and micro controller is enabled by pulling the input CSN to low level. 30 SCK SPI serial clock input this input controls the internal shift register of the SPI and requires CMOS logic levels. Doc ID 16082 Rev 5 11/46 Pin definitions and functions Figure 3. L99MD02 Pin connection (top view-not in scale) 3*1'   3*1' 287   287 287   1& 96$   96$ 96$   1& 1&   (1 &855   6&. &855   9&& $*1'  3RZHU662   ', 1&    '*1' 96   '2 96   1& 1&   &61 96%   1& 96%   96% 287   1& 287   287 3*1'   3*1' *$3*&)7 12/46 Doc ID 16082 Rev 5 L99MD02 Electrical specifications 4 Electrical specifications 4.1 Absolute maximum ratings Table 4. Absolute maximum ratings Symbol Parameter DC supply voltage VS Single pulse tmax < 400 ms Value Unit -0,3…28 V 40 V -0,3…38 V 40 V -0.3 to 5.5 V V VSA VSB DC supply voltage VCC Stabilized supply voltage, logic supply EN DI DO SCK CSN Digital input / output voltage -0.3 to VCC + 0.3 CURR1/2 Current monitor output -0.3 to VCC + 0.3 OUT 1-6 Output current capability Single pulse tmax < 400 ms ±2 A Note: All maximum ratings are absolute ratings. Leaving the limitation of any of these values may cause an irreversible damage of the integrated circuit! 4.2 ESD protection Table 5. ESD protection Parameter Value Unit All pins ±2(1) kV Output pins: OUT1 – 6, VS, VSA, VSB, ±4(2) kV Value Unit -40 to 150 °C 1. HBM according to EIA/JESD22-A114-E. 2. HBM with all unzapped pins grounded. 4.3 Thermal data Table 6. Symbol Tj Operating junction temperature Parameter Operating junction temperature Doc ID 16082 Rev 5 13/46 Electrical specifications Table 7. L99MD02 Temperature warning and thermal shutdown Symbol 4.4 Parameter Min. Typ. Max. Unit TjTW ON Temperature warning threshold junction temperature Tj increasing - - 150 °C TjSD ON Thermal shutdown threshold junction Tj increasing temperature - - 170 °C Electrical characteristics VS = 6 to 18 V, VCC = 3.0 to 5.3 V, Tj = -40 to 150 °C, unless otherwise specified. The voltages are referred to GND and currents are assumed positive, when the current flows into the pin. Table 8. Symbol VSA/VSB Supply Parameter Test condition Operating supply voltage range Typ. 6 Max. Unit 38 V IS VSA / VSB DC supply current VSx = 13 V, VCC = 5.0 V EN = high Outputs floating 0.5 2 mA IVS VS supply current VS = 13 V, VCC = 5 V EN = high 1.5 4 mA VSx = 13 V, VCC = 5 V EN = low TTest = -40, 25 °C Outputs floating 3 10 µA IVSX VSx (VS, VSA, VSB) quiescent supply current TTest = 130 °C 6 20 µA 5,3 V VCC Operating supply voltage range Table 9. Symbol 3,0 VCC DC supply current VSx = 13 V, VCC = 5.0 V EN = high 1 3 mA VCC quiescent supply current VS = 13 V, VCC = 5.0 V CSN = VCC EN = low Outputs floating 5 20 µA Typ. Max. Unit 3.0 V ICC 14/46 Min. Over and undervoltage detection Parameter Test condition VPOR OFF Power-on-reset threshold VCC increasing VPOR ON VCC decreasing Power-on-reset threshold VPOR hyst Power-on-reset hysteresis VPOR OFF - VPOR ON VSUV OFF VS UV-threshold voltage VS increasing Doc ID 16082 Rev 5 Min. 2.3 V 0.2 6.0 V 6.7 V L99MD02 Electrical specifications Table 9. Symbol Over and undervoltage detection (continued) Parameter Test condition Min. Typ. Max. Unit 6 V VSUV ON VS UV-threshold voltage VS decreasing 5.4 VSUV hyst VS UV-hysteresis VSUV OFF - VSUV ON 0.35 VSAUV OFF VSA UV-threshold voltage VSA increasing 5.95 6.7 V VSAUV ON VSA UV-threshold voltage VSA decreasing 5.4 6 V VSAUV hyst VSA UV-hysteresis VSAUV OFF - VSAUV ON 0.35 VSBUV OFF VSB UV-threshold voltage VSB increasing 6.0 6.7 V VSBUV ON VSB UV-threshold voltage VSB decreasing 5.4 6 V VSBUV hyst VSB UV-hysteresis VSBUV OFF - VSBUV ON 0.35 VSOV ON VS OV-threshold voltage VS decreasing VSOV hyst VSOV ON - VSOV OFF Table 10. Parameter rON HS 1-6 On resistance VSA / VSB to OUT 1-6 rONLSLC 1-6 V 0.5 V 24 18 V V 0.75 1 V Switches Symbol rONLSHC 1-6 V 0.5 VS increasing VSOV OFF VS OV-threshold voltage VS OV-hysteresis 0.5 Test condition On resistance OUT 1-6 to GND in HC mode On resistance OUT 1-6 to GND in LC mode Min. Typ. Max. Unit Tj = 25 °C, IOUT1-6 = -0.25 A 900 1200 m Tj = 125 °C, IOUT1-6 = -0.25 A 1300 1800 m Tj = 25 °C, HC = 1 IOUT1-6 = 0.25A 700 1000 m Tj = 125 °C, HC = 1 IOUT1-6 = 0.25 A 1000 1500 m Tj = 25 °C, HC = 0 IOUT1-6 = 0.125 A 1200 1800 m Tj = 125 °C, HC = 0 IOUT1-6 = 0.125 A 2000 2800 m HS overcurrent protection VS = 13.5 V 0.8 1.4 A ISCLSHC1-6 LS overcurrent protection in HC mode VS = 13.5 V, HC=1 0.8 1.4 A ISCLSLC1-6 LS overcurrent protection in LC mode VS = 13.5 V, HC=0 0.4 0.7 A td ON1-6 H Output delay time, HS switch on VS = 13.5 V, Rload = 52 10 25 80 µs td OFF1-6 H Output delay time, HS switch off VS = 13.5 V, Rload = 52 50 100 300 µs td ON1-6 L Output delay time, LS switch on VS = 13.5 V, Rload = 52 5 15 80 µs td OFF1-6 L Output delay time, LS switch off VS = 13.5 V, Rload = 52 50 100 300 µs ISCHS1-6 Doc ID 16082 Rev 5 15/46 Electrical specifications Table 10. L99MD02 Switches (continued) Symbol Parameter Test condition tD LH/tD HL Cross current protection time IQLH Switched-off output current HS OUT 1-6 VOUT1-6 = 0 V IQLL Switched-off output current LS OUT 1-6 VOUT1-6 = VS IOLDHS1-6 Open-load detection current HS OUT 1-6 Min. Typ. Max. Unit 20 200 400 µs -2 µA 2 µA Tamb = -40 °C 8 30 60 mA Tamb = 25 °C to 125 °C 10 30 60 mA Open-load detection IOLDLSHC1-6 current LS OUT 1-6 in HC mode HC bit set to 1; Tamb = -40 °C 4.5 30 65 mA 8 30 60 mA Open-load detection IOLDLSLC1-6 current LS OUT 1-6 in LC mode HC bit set to 0; Tamb = -40 °C 1.8 15 35 mA 4 15 30 mA HC bit set to 1; Tamb = 25 °C to 125 °C HC bit set to 0; Tamb = 25 °C to 125 °C tdOL Minimum duration of open-load condition to set the status bit 500 2000 3000 µs tISC Minimum duration of overcurrent condition to switch off the driver 10 32 100 µs 0.1 0.25 0.5 V/µs dVOUT1-6 /dt Figure 4. Slew rate of OUT 1-6 VS = 13.5 V, Rload = 52 Output turn-on/off delays and slew rates 9287; 9287;  /RZ6LGH  /RZ6LGH    *1' 9287;  *1' 9287;  +LJK6LGH  +LJK6LGH     *1' *1' WG2))[/+ WG21[/+ G9RXW[GW G9RXW[GW $*9 16/46 Doc ID 16082 Rev 5 L99MD02 Table 11. Electrical specifications Current monitor output Symbol VCURR1/2 Parameter Functional voltage range Test condition VCC = 5 V Min. Typ. Max. Unit VCC -1 V 4% + 1%FS 10% + 3%FS - 4% + 1%FS 8% + 2%FS 4% + 1%FS 10% + 3%FS - 4% + 1%FS 10% + 3%FS - 0 ICURRHSLS250 HS/LS current monitor 0 V
L99MD02XPTR 价格&库存

很抱歉,暂时无法提供与“L99MD02XPTR”相匹配的价格&库存,您可以联系我们找货

免费人工找货