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LD39100PU12RY

LD39100PU12RY

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    VDFN6_EP

  • 描述:

    Linear Voltage Regulator IC Positive Fixed 1 Output 1.2V 1A 6-DFN (3x3)

  • 数据手册
  • 价格&库存
LD39100PU12RY 数据手册
LD39100 Automotive grade 1 A, low quiescent current, low-noise voltage regulator Features DFN6 (3x3 mm) • • • • • • • • AEC-Q100 qualified Input voltage from 1.5 to 5.5 V Ultra-low dropout voltage (200 mV typ. at 1 A load) Very low quiescent current (20 µA typ. at no load, 200 µA typ. at 1 A load, 1 µA max. in off mode) Very low-noise with no bypass capacitor (30 µ VRMS at VOUT = 0.8 V) • • Output voltage tolerance: ±2.0% at 25 °C 1 A guaranteed output current Wide range of output voltages available on request: 0.8 V to 4.5 V with 100 mV step and adjustable from 0.8 Logic-controlled electronic shutdown Stable with ceramic capacitors COUT = 1 µF • • • Internal current and thermal limit DFN6 (3x3 mm) package Temperature range: -40 °C to 125 °C Applications Maturity status link LD39100 • • • • • Printers Game consoles Computer Consumer applications Automotive post regulation Description The LD39100 provides 1 A maximum current with an input voltage range from 1.5 V to 5.5 V and a typical dropout voltage of 200 mV. The device is stable with ceramic capacitors on the input and output. The ultra-low dropout voltage, low quiescent current and low-noise features make it suitable for low power battery-powered applications. Power supply rejection is 70 dB at low frequency and starts to roll off at 10 kHz. Enable logic control function puts the LD39100 in shutdown mode, allowing a total current consumption lower than 1 µA. The device also includes short-circuit constant current limiting and thermal protection. LD39100 is available also in AEC-Q100 qualified version, in the DFN6 (3x3 mm) with wettable flank package. DS6257 - Rev 9 - April 2020 For further information contact your local STMicroelectronics sales office. www.st.com LD39100 Circuit schematics 1 Circuit schematics Figure 1. LD39100 schematic diagram (adjustable version) IN PG Power-good signal IN BandGap reference Current limit OpAmp OUT Thermal protection ADJ EN Internal enable GND GIPD010920151332MT Figure 2. LD39100 schematic diagram (fixed version) IN PG Power-good signal IN BandGap reference Current limit OpAmp OUT Thermal protection R1 NC EN R2 Internal enable GND GIPD010920151333MT DS6257 - Rev 9 page 2/29 LD39100 Pin configuration 2 Pin configuration Figure 3. Pin connection (top view) EN 1 6 VIN EN 1 6 VIN GND 2 5 NC GND 2 5 ADJ PG 3 4 VOUT PG 3 4 VOUT LD39100 (fixed version) LD39100 (adjustable version) GIPD010920151334MT Table 1. Pin description Symbol Function LD39100 (adjustable version) LD39100 (fixed version) EN 1 1 Enable pin logic input: low = shutdown, high = active GND 2 2 Common ground PG 3 3 Power Good VOUT 4 4 Output voltage ADJ 5 - Adjust pin VIN 6 6 LDO input voltage NC - 5 Not connected GND DS6257 - Rev 9 Pin Exposed pad Exposed pad has to be connected to GND page 3/29 LD39100 Maximum ratings 3 Maximum ratings Table 2. Absolute maximum ratings Symbol VIN VOUT DC input voltage Value Unit -0.3 to 7 V -0.3 to VIN + 0.3 DC output voltage V (7 V max.) EN Enable pin -0.3 to 7 V PG Power Good pin -0.3 to 7 V ADJ Adjust pin 4 V IOUT Output current Internally limited Power dissipation Internally limited PD Note: Parameter TSTG Storage temperature range - 65 to 150 °C TOP Operating junction temperature range - 40 to 125 °C Absolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All values are referred to GND. Table 3. Thermal data Symbol Parameter Value Unit RthJA Thermal resistance junction-ambient 55 °C/W RthJC Thermal resistance junction-case 10 °C/W Table 4. ESD performance Symbol ESD DS6257 - Rev 9 Parameter ESD protection voltage Test conditions Value Unit HBM 4 kV MM 0.4 kV page 4/29 LD39100 Electrical characteristics 4 Electrical characteristics Table 5. LD39100 electrical characteristics (adjustable version) TJ = 25 °C, VIN = 1.8 V, CIN = COUT = 1 µF, IOUT = 100 mA, VEN = VIN, unless otherwise specified Symbol VIN Parameter Test conditions Operating input voltage VADJ accuracy TJ = 25 °C IOUT = 10 mA -40 °C < TJ < 125 °C IADJ ∆VOUT Typ. 1.5 IOUT = 10 mA VADJ Min. 784 800 Unit 5.5 V 816 mV 776 800 Adjust pin current Static line regulation Max. 824 1 VOUT + 1 V ≤ VIN ≤ 5.5 V IOUT = 100 mA 0.01 µA %/V ∆VIN = 500 mV IOUT = 100 mA ∆VOUT Transient line regulation 10 tR = 5 µs mVpp ∆VIN = 500 mV IOUT = 100 mA 10 tF = 5 µs ∆VOUT Static load regulation IOUT = 10 mA to 1 A IOUT = 10 mA to 1 A ∆VOUT Transient load regulation tR = 5 µs IOUT = 1 A to 10 mA tF = 5 µs VDROP Dropout voltage (2) IOUT = 1 A VO fixed to 1.5 V -40 °C < TJ < 125 °C 0.002 %/mA 40 mVpp 40 200 400 mV 10 Hz to 100 kHz eN Output noise voltage IOUT = 100 mA µVRMS 30 VOUT = 0.8 V VIN = 1.8 V+/-VRIPPLE VRIPPLE = 0.25 V frequency = 1 kHz SVR Supply voltage rejection VO = 0.8 V 70 IOUT = 10 mA dB VIN = 1.8 V+/-VRIPPLE VRIPPLE = 0.25 V frequency = 10 kHz 65 IOUT = 100 mA IOUT = 0 mA IQ Quiescent current IOUT = 0 mA 50 -40 °C < TJ < 125 °C IOUT = 0 to 1 A DS6257 - Rev 9 20 µA 200 page 5/29 LD39100 Electrical characteristics Symbol Parameter Test conditions Min. Typ. IOUT = 0 to 1 A IQ Quiescent current µA VIN input current in off mode: 0.001 VOUT Power good output threshold Falling edge VOUT Isink = 6 mA open drain output Short-circuit current RL= 0 Enable input logic low VIN = 1.5 V to 5.5 V Enable input logic high -40 °C < TJ< 125 °C IEN Enable pin input current VEN = VIN tON Turn-on time (4) 30 Thermal shutdown 160 Hysteresis 20 TSHDN COUT Output capacitor Capacitance (see Section 5 ) V 0.8* Power good output voltage low VEN 1 0.92* Rising edge ISC Unit 300 -40 °C < TJ < 125 °C VEN = GND (3) PG Max. 0.4 2.5 A 0.4 0.9 V V 0.1 1 V 100 nA µs °C µF 1. All transient values are guaranteed by design, not tested in production. 2. Dropout voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its nominal value. This specification does not apply to output voltages below 1.5 V. 3. PG pin floating. 4. Turn-on time is time measured between the enable input just exceeding VEN high value and the output voltage just reaching 95% of its nominal value. DS6257 - Rev 9 page 6/29 LD39100 Electrical characteristics Table 6. LD39100 electrical characteristics (fixed version) TJ = 25 °C, VIN = VOUT(NOM) + 1 V, CIN = COUT = 1 µF, IOUT = 100 mA, VEN = VIN, unless otherwise specified Symbol VI Parameter Test conditions Operating input voltage VOUT > 1.5 V, IOUT = 10 mA TJ = 25 °C VOUT > 1.5 V, IOUT = 10 mA VOUT VOUT accuracy -40 °C < TJ < 125 °C VOUT ≤ 1.5 V IOUT = 10 mA VOUT ≤ 1.5 V IOUT = 10 mA -40 °C < TJ < 125 °C ∆VOUT Static line regulation VOUT + 1 V ≤ VIN ≤ 5.5 V IOUT = 100 mA ∆VIN = 500 mV ∆VOUT Transient line regulation (1) IOUT = 100 mA, tR = 5 µs ∆VIN = 500 mV IOUT = 100 mA, tF = 5 µs ∆VOUT Static load regulation IOUT = 10 mA to 1 A IOUT = 10 mA to 1 A ∆VOUT Transient load regulation tR = 5 µs IOUT = 1 A to 10 mA tF = 5 µs Min. Typ. Max. Unit 1.5 5.5 V -2.0 2.0 % -3.0 3.0 ±20 mV ±30 0.01 %/V 10 mVpp 10 0.002 %/mA 40 mVpp 40 IOUT = 1 A VDROP Dropout voltage (2) VOUT > 1.5 V 200 400 mV -40 °C < TJ < 125 °C 10 Hz to 100 kHz eN Output noise voltage IOUT = 100 mA µVRMS 85 VOUT = 2.5 V VIN = VOUT(NOM)+0.5 V+/-VRIPPLE VRIPPLE = 0.1 V frequency = 1 kHz SVR Supply voltage rejection IOUT = 10 mA VOUT = 1.5 V VIN = VOUT(NOM)+0.5 V+/-VRIPPLE VRIPPLE = 0.1 V frequency = 10 kHz 65 dB 62 IOUT = 100 mA IOUT = 0 mA IQ Quiescent current IOUT = 0 mA 50 -40 °C < TJ < 125 °C IOUT = 0 to 1 A DS6257 - Rev 9 20 µA 200 page 7/29 LD39100 Electrical characteristics Symbol Parameter Test conditions Min. Typ. IOUT = 0 to 1 A IQ Quiescent current µA 0.001 VEN = GND PG Rising edge 0.92* VOUT Falling edge 0.8* VOUT Power good output voltage low Isink = 6 mA open drain output Short-circuit current RL = 0 Enable input logic low VIN = 1.5 V to 5.5 V Enable input logic high -40 °C < TJ < 125 °C IEN Enable pin input current VEN = VIN TON Turn-on time (4) 30 Thermal shutdown 160 Hysteresis 20 ISC VEN TSHDN COUT Output capacitor Capacitance (see Section 5 ) Unit 300 -40 °C < TJ < 125 °C VIN input current in OFF mode: (3) Power good output threshold Max. 1 V 0.4 2.5 A 0.4 0.9 V V 0.1 1 V 100 nA µs °C µF 1. All transient values are guaranteed by design, not tested in production. 2. Dropout voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its nominal value. This specification does not apply to output voltages below 1.5 V. 3. PG pin floating. 4. Turn-on time is time measured between the enable input just exceeding VEN high value and the output voltage just reaching 95% of its nominal value. DS6257 - Rev 9 page 8/29 LD39100 Typical performance characteristics 5 Typical performance characteristics CIN = COUT = 1 µF Figure 5. VOUT accuracy Figure 4. VADJ accuracy 2.56 0.86 VIN = 3.5 V, VEN = VIN, IOUT = 10 mA 2.54 0.82 2.52 VOUT [V ] VA DJ [V ] VIN = 1.8 V, VEN = IOUT = 10 mA 0.84 0.8 0.78 2.5 2.48 2.46 0.76 2.44 0.74 -50 -25 0 25 50 75 100 125 -50 - 150 -25 - 0 25 50 75 GIPD02092015 1100M T VIN = 3.5 V, VEN = VIN, IOUT = 1 A 350 25 0 Dropout [mV ] Dro po ut [mV] 400 VEN to VIN, VOUT = 2.5 V, IOUT = 1 A 20 0 15 0 10 0 50 300 250 200 150 100 50 0 0 -50 -25 0 25 50 75 10 0 12 5 15 0 -50 -25 0 25 T [°C] 50 75 100 Figure 9. Short-circuit current vs. drop voltage 3.5 0.25 0.2 VEN to VIN VIN from 0 to 5.5 V, VEN to VIN, VOUT = 0.8 V 3 VOUT = 2.5 V 2.5 ISC [A] 0.15 0.1 125 °C 85 °C 55 °C 25 °C 0 °C -25 °C -40 °C 2 1.5 1 0.05 0 0.5 0 200 150 GIPD020920151103MT Figure 8. Dropout voltage vs. output current VOUT @ 1.5 V 125 T [ °C] GIPD020920151102MT Dropout [V] 150 Figure 7. Dropout voltage vs. temperature (VOUT = 1.5 V) 35 0 400 600 800 1000 1200 IOUT [mA] 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 Vdrop [V] GIPD02092015 1104M T DS6257 - Rev 9 125 GIPD02092015 1101M T Figure 6. Dropout voltage vs. temperature (VOUT = 2.5 V) 30 0 100 T [°C ] T [°C ] GIPD02092015 1105M T page 9/29 LD39100 Typical performance characteristics Figure 10. Output voltage vs. input voltage (VOUT = 0.8 V) Figure 11. Output voltage vs. input voltage (VOUT = 2.5 V) 3 1.2 VIN from 0 to 5.5 V, VEN to VIN, VOUT = 0.8 V, IOUT = 1 A VIN from 0 to 5 V, VEN to VIN, VOUT = 2.5 V, IOUT = 1A 2.5 125°C 2 0.8 VOUT [V] VOUT [V] 1 125°C 0.6 85°C 55°C 0.4 25°C 0°C 0.2 -40°C 0 0.5 1 1.5 2 2.5 3 3.5 VIN [V] 4 4.5 5 5.5 55°C 25°C 1 0°C -25°C 0.5 -25°C 0 85°C 1.5 -40°C 0 6 0 0.5 1 1.5 2 2.5 3 3.5 140 80 No Load 60 IOUT = 1 A 0.4 Iq [µA] Iq [µA] 6 VIN = 3.5 V, VEN to GND, VOUT = 2.5 V 0.5 100 VIN = 1.8 V, VEN to VIN, VOUT = 2.5 V 20 0 -50 0.3 0.2 0.1 -25 0 25 50 75 100 125 0 -50 150 T [°C] -25 0 25 50 75 100 125 150 T [°C] GIPD020920151108MT GIPD020920151109MT Figure 15. Line regulation VOUT = 0.8 V Figure 14. Load regulation 0.015 0.04 VIN = 3.5 V, IOUT = from 10 mA to 1 A, VEN=VIN, VOUT = 2.5 V 0.03 0.01 VIN = from 1.8 V to 5.5 V, IOUT = 100 mA, VEN = VIN, VOUT = 0.8 V 0.02 0.005 Line [%/V] Load [%/mA] 5.5 0.6 120 0 0.01 0 -0.01 -0.005 -0.02 -0.01 -0.03 -25 0 25 50 75 100 125 150 T [°C] -0.04 -50 -25 0 25 50 75 100 125 150 T [°C] GIPD020920151110MT DS6257 - Rev 9 5 Figure 13. VIN input current in off mode vs. temperature Figure 12. Quiescent current vs. temperature -0.015 -50 4.5 GIPD020920151107MT GIPD020920151106MT 40 4 VIN [V] GIPD020920151111MT page 10/29 LD39100 Typical performance characteristics Figure 17. Supply voltage rejection vs. temperature (VOUT = 0.8 V) Figure 16. Line regulation VOUT = 2.5 V 0.04 100 VIN = from 3.5 V to 5.5 V, IOUT = 100 mA, VEN = VIN, VOUT = 2.5 V 0.03 VIN from 1.7 V to 1.9 V, VEN to VIN, VOUT = 0.8 V 80 0.01 60 SVR [dB] Line [%/V] 0.02 0 -0.01 -0.02 40 Freq.10 Freq.10 kHz, kHz, I IOUT = 100 mA 20 -0.03 -0.04 -50 -25 0 25 50 75 100 125 Freq.1 Freq.1kHz, kHz,I IOUT OUT = 10 mA 0 -50 150 T [°C] -25 0 25 GIPD020920151112MT Figure 18. Supply voltage rejection vs. temperature (VOUT = 2.5 V) 75 100 125 150 GIPD020920151113MT Figure 19. Supply voltage rejection vs. frequency (VOUT = 0.8 V) 100 100 VIN from 2.9 V to 3.1 V, VEN to VIN, VOUT = 2.5 V IOUT = 10 mA VIN from 1.55 V to 2.05 V, VEN to VIN, VOUT = 0.8 V 80 SVR [dB] 80 SVR [dB] 50 T [°C] 60 40 Freq. = 10 kHz, IOUT = 100 mA 20 60 40 20 Freq. = 1 kHz, IOUT = 10 mA 0 -50 IOUT = 100 mA 0 -25 0 25 50 75 100 125 0 150 10 20 30 40 50 60 70 80 90 100 110 Freq [kHz] T [°C] GIPD020920151114MT GIPD020920151115MT Figure 20. Supply voltage rejection vs. frequency (VOUT = 2.5 V) Figure 21. Output noise voltage vs. frequency AP - IOUT = 10 0mA IOUT = 10 mA VIN from 2.9 V to 3.1 V, VEN to VIN, VOUT = 2.5 V IOUT = 100 mA eN [µV/SQRT(Hz)] SVR [dB] 2.5 100 90 80 70 60 50 40 30 20 10 0 2.0 AP - IOUT = 10 mA 1.5 AP - IOUT = 0A AP - IOUT = 1mA 1.0 0.5 0.0 0 10 20 30 40 50 60 70 80 90 100 110 Freq [kHz] 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 f [Hz] VIN = 1.8 V, VOUT = 0.8 V, VEN = VIN GIPD020920151117MT GIPD020920151116MT DS6257 - Rev 9 page 11/29 LD39100 Typical performance characteristics Figure 23. Load Transient (VOUT = 0.8 V, IOUT = from 10 mA to 1 A) VEN [V] Figure 22. Enable voltage vs. temperature 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -50 VIN = 5.5 V IOUT = 100 mA, VOUT = 0.8 V High Low -25 0 25 50 75 100 125 150 T [°C] GIPD020920151118MT Figure 24. Load Transient (VOUT = 0.8 V, IOUT = from Figure 25. Load Transient (VOUT = 2.5 V, IOUT = from 100 mA to 1 A) 10 mA to 1 A) Figure 26. Load Transient (VOUT = 2.5 V, IOUT = from 100 mA to 1 A) DS6257 - Rev 9 Figure 27. Line transient page 12/29 LD39100 Typical performance characteristics Figure 28. Start-up transient DS6257 - Rev 9 Figure 29. Enable transient page 13/29 LD39100 Application information 6 Application information The LD39100 is an ultra low-dropout linear regulator. It provides up to 1 A with a low 200 mV dropout. The input voltage range is from 1.5 V to 5.5 V. The device is available in fixed and adjustable output versions. The regulator is equipped with internal protection circuitry, such as short-circuit current limiting and thermal protection. Figure 30. Typical application circuit for fixed output version and Figure 31. Typical application circuit for adjustable version illustrate the typical application schematics: Figure 30. Typical application circuit for fixed output version VIN IN 6 1 C IN IN PG PG VIN IN EN EN LD39100 LD VOU OUT 3 VOU OUT 4 OF F O N GND GN NC NC 5 C OUT 2 GIPD040920151351MT Figure 31. Typical application circuit for adjustable version VIN IN 6 1 CIIN N PG PG VIN IN EN EN LD39100 VOU O 3 ON N O OFF O GND ADJ VOUT O 4 5 2 R1 C O OUT R2 GIPD040920151352MT Regarding the adjustable version, the output voltage can be adjusted from 0.8 V up to the input voltage, minus the voltage drop across the pass element (dropout voltage), by connecting a resistor divider between ADJ pin and the output, thus allowing remote voltage sensing. The resistor divider should be selected as follows: VOUT = VADJ 1 + R1 / R2 witℎVADJ = 0.8V typ. (1) Resistors should be used with values in the range from 10 kΩ to 50 kΩ. Lower values can also be suitable, but they increase current consumption. DS6257 - Rev 9 page 14/29 LD39100 External capacitors 6.1 External capacitors The LD39100 voltage regulator requires external low ESR capacitors to assure control loop stability. These capacitors must be selected to meet the requirements of minimum capacitance and equivalent series resistance defined in the following sections. Input and output capacitors should be located as close as possible to the relevant pins. 6.1.1 Input capacitor An input capacitor with a minimum value of 1 μF must be located as close as possible to the input pin of the device and returned to a clean analog ground. A good quality, low-ESR ceramic capacitor is suggested. It helps to ensure stability of the control loop, reduces the effects of inductive sources and improves ripple rejection. A value above 1 µF may be chosen when the application involves fast load transients. 6.1.2 Output capacitor The LD39100 requires a low-ESR capacitor connected on its output to keep the control loop stable and reduce the risk of ringing and oscillations. The control loop is designed to be stable with any good quality ceramic capacitor (such as X5R/X7R types) with a minimum value of 1 µF and equivalent series resistance in the 0 to 150 mΩ range. It is important to highlight that the output capacitor must maintain its capacitance and ESR in the stable region over the full operating temperature, load and input voltage ranges to assure stability. Therefore, capacitance and ESR variations must be taken into account in the design phase to ensure the device works in the expected stability region. If the above conditions are respected, there is no maximum limit to the output capacitance. 6.2 Power dissipation An internal thermal feedback loop disables the output voltage if the die temperature rises to approximately 160 °C. This feature protects the device from excessive temperature and allows the user to push the limits of the power handling capability of a given circuit board without the risk of damaging the device. A good PC board layout should be used to maximize power dissipation. The thermal path for the heat generated by the device is from the die to the copper lead frame, through the package leads and exposed pad, to the PC board copper. The PC board copper acts as a heatsink. The footprint copper pads should be as wide as possible to spread and dissipate the heat to the surrounding ambient. Feed-through vias to the inner or backside copper layers are also useful to improve the overall thermal performance of the device. The device power dissipation depends on the input voltage, output voltage and output current, and is given by: Junction temperature of the device is: PD = VIN − VOUT IOUT (2) T J_MAX = TA + RtℎJA × PD (3) where: TJ_MAX is the maximum junction of the die, 125 °C TA is the ambient temperature RthJA is the thermal resistance junction-to-ambient DS6257 - Rev 9 page 15/29 LD39100 Enable function Figure 32. Power dissipation vs. ambient temperature 3.5 3 PD [W] 2.5 2 1.5 1 0.5 0 -50 -30 -10 10 30 50 70 90 110 130 TA [°C] GIPD040920151415MT 6.3 Enable function The LD39100 features the enable function. When EN voltage is higher than 0.9 V, the device is ON, and if it is lower than 0.4 V, the device is OFF. In shutdown mode, consumption is lower than 1 µA. EN pin has not an internal pull-up, so it cannot be left floating if it is not used. 6.4 Power Good function Some applications require a flag showing that the output voltage is in the correct range. Power Good threshold depends on the adjust voltage. When it is higher than 0.92*VADJ, Power Good (PG) pin goes to high impedance. If it is below 0.80*VADJ PG pin goes to low impedance. If the device works well, Power Good pin is at high impedance. If the output voltage is fixed using an external or internal resistor divider, Power Good threshold is 0.92*VOUT. If the device is disabled (EN pin low) the PG signal is set to high impedance.This is done intentionally to avoid pull down current by the PG pin in disabled mode. Power Good function requires an external pull-up resistor, which has to be connected between PG pin and VIN or VOUT. PG pin typical current capability is up to 6 mA. A pull-up resistor for PG should be in the range from 100 kΩ to 1 MΩ. If Power Good function is not used, PG pin has to remain floating. DS6257 - Rev 9 page 16/29 LD39100 Package information 7 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. DS6257 - Rev 9 page 17/29 LD39100 DFN6 (3x3 mm) package information 7.1 DFN6 (3x3 mm) package information Figure 33. DFN6 (3x3 mm) package outline 7946637_C DS6257 - Rev 9 page 18/29 LD39100 DFN6 (3x3 mm) package information Table 7. DFN6 (3x3 mm) mechanical data Dim. mm Min. A 0.80 A1 0 A3 Max. 1 0.02 0.05 0.20 b 0.23 D 2.90 D2 2.23 E 2.90 E2 1.50 e L Typ. 0.45 3 3.10 2.50 3 3.10 1.75 0.95 0.30 0.40 0.50 Figure 34. DFN6 (3x3 mm) recommended footprint 7946637_C DS6257 - Rev 9 page 19/29 LD39100 DFN6 (3x3 mm) automotive-grade package information 7.2 DFN6 (3x3 mm) automotive-grade package information Figure 35. DFN6 (3x3 mm) automotive-grade package outline Bottom view Detail A Detail A Top view DS6257 - Rev 9 DM00169862_1 page 20/29 LD39100 DFN6 (3x3 mm) automotive-grade package information Table 8. DFN6 (3x3 mm) automotive-grade mechanical data Dim. mm Min. Typ. Max. A 0.80 0.85 0.90 A1 0.0 b 0.20 0.25 0.30 D 2.95 3.00 3.05 D2 2.30 2.40 2.50 e 0.05 0.95 E 2.95 3.00 3.05 E2 1.50 1.60 1.70 L 0.30 0.40 0.50 Figure 36. DFN6 (3x3 mm) automotive-grade recommended footprint DS6257 - Rev 9 page 21/29 LD39100 DFN6 (3x3 mm) packing information 7.3 DFN6 (3x3 mm) packing information Figure 37. DFN6 (3x3) tape outline 7875978_N DS6257 - Rev 9 page 22/29 LD39100 DFN6 (3x3 mm) packing information Figure 38. DFN6 (3x3 mm) reel outline 7875978_N Table 9. DFN6 (3x3) tape and reel mechanical data Dim. DS6257 - Rev 9 mm Min. Typ. Max. A0 3.20 3.30 3.40 B0 3.20 3.30 3.40 K0 1 1.10 1.20 page 23/29 LD39100 Ordering information 8 Ordering information Table 10. Order code Order code Output voltage Industrial grade Automotive grade (1) LD39100PUR LD39100PURY Adj. from 0.8 V LD39100PU12R LD39100PU12RY 1.2 V LD39100PU18R LD39100PU18RY 1.8 V LD39100PU25R LD39100PU25RY 2.5 V LD39100PU30R LD39100PU33R 3.0 V LD39100PU33RY 3.3 V 1. Qualified and characterized according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 and Q002 or equivalent. DS6257 - Rev 9 page 24/29 LD39100 Revision history Table 11. Document revision history Date Revision Changes 29-Jul-2009 1 Initial release. 16-Apr-2010 2 Modified Figure 8 on page 9. 11-Oct-2011 3 Document status promoted from preliminary data to datasheet. 24-Apr-2014 4 Part numbers LD39100xx, LD39100xx12 and LD39100xx25 changed to LD39100. Updated Table 1: Device summary. Updated the description in cover page Section 1: Circuit schematics, Section 2: Pin configuration, Section 4: Electrical characteristics, Section 5: Typical performance characteristics, Figure 32: Typical application circuit for fixed output version, Section 7: Package mechanical data. Deleted previous Section 8: Different output voltage versions of the LD39100xx available on request. Added Section 8: Packaging mechanical data. Minor text changes. 01-Sep-2015 5 Updated Figure 32: Typical application circuit for fixed output version. Minor text changes. Updated features in cover page. Removed Table 1: Device summary. 20-Jun-2016 6 Updated Section 6.2: "Enable function". Added Section 8: "Ordering information" and Section 7.1: "DFN6 (3x3 mm) package information". Minor text changes. In Table 5: "LD39100 electrical characteristics (adjustable version)": - Updated ISC typ. value (was 1.5) Table 6: "LD39100 electrical characteristics (fixed version)": 23-Oct-2017 7 - Updated ISC typ. value (was 1.5) Removed Figure 30: ESR required for stability with ceramic capacitors (VOUT = 0.8 V) Removed Figure 31: ESR required for stability with ceramic capacitors (VOUT = 2.5 V) Updated Section 6: "Application information" Added Section 6.1: "External capacitors" DS6257 - Rev 9 09-Oct-2019 8 Updated Figure 7. Dropout voltage vs. temperature (VOUT = 1.5 V) 02-Apr-2020 9 Updated EN value in Table 2 page 25/29 LD39100 Contents Contents 1 Circuit schematics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 4 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 6.1 7 8 External capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6.1.1 Input capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6.1.2 Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6.2 Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6.3 Enable function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6.4 Power Good function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 7.1 DFN6 (3x3 mm) package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7.2 DFN6 (3x3 mm) automotive-grade package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7.3 DFN6 (3x3 mm) packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 List of tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 List of figures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 DS6257 - Rev 9 page 26/29 LD39100 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Pin description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 ESD performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 LD39100 electrical characteristics (adjustable version) TJ = 25 °C, VIN = 1.8 V, CIN = COUT = 1 µF, IOUT = 100 mA, VEN = VIN, unless otherwise specified. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 LD39100 electrical characteristics (fixed version) TJ = 25 °C, VIN = VOUT(NOM) + 1 V, CIN = COUT = 1 µF, IOUT = 100 mA, VEN = VIN, unless otherwise specified . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 DFN6 (3x3 mm) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 DFN6 (3x3 mm) automotive-grade mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 DFN6 (3x3) tape and reel mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Order code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 DS6257 - Rev 9 page 27/29 LD39100 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. DS6257 - Rev 9 LD39100 schematic diagram (adjustable version) . . . . . . . LD39100 schematic diagram (fixed version) . . . . . . . . . . . Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . VADJ accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VOUT accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Dropout voltage vs. temperature (VOUT = 2.5 V) . . . . . . . . Dropout voltage vs. temperature (VOUT = 1.5 V) . . . . . . . . Dropout voltage vs. output current. . . . . . . . . . . . . . . . . . Short-circuit current vs. drop voltage . . . . . . . . . . . . . . . . Output voltage vs. input voltage (VOUT = 0.8 V). . . . . . . . . Output voltage vs. input voltage (VOUT = 2.5 V). . . . . . . . . Quiescent current vs. temperature. . . . . . . . . . . . . . . . . . VIN input current in off mode vs. temperature . . . . . . . . . . Load regulation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Line regulation VOUT = 0.8 V . . . . . . . . . . . . . . . . . . . . . Line regulation VOUT = 2.5 V . . . . . . . . . . . . . . . . . . . . . Supply voltage rejection vs. temperature (VOUT = 0.8 V) . . Supply voltage rejection vs. temperature (VOUT = 2.5 V) . . Supply voltage rejection vs. frequency (VOUT = 0.8 V) . . . . Supply voltage rejection vs. frequency (VOUT = 2.5 V) . . . . Output noise voltage vs. frequency . . . . . . . . . . . . . . . . . Enable voltage vs. temperature. . . . . . . . . . . . . . . . . . . . Load Transient (VOUT = 0.8 V, IOUT = from 10 mA to 1 A) . . Load Transient (VOUT = 0.8 V, IOUT = from 100 mA to 1 A) . Load Transient (VOUT = 2.5 V, IOUT = from 10 mA to 1 A) . . Load Transient (VOUT = 2.5 V, IOUT = from 100 mA to 1 A) . Line transient . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Start-up transient . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Enable transient . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Typical application circuit for fixed output version . . . . . . . Typical application circuit for adjustable version . . . . . . . . Power dissipation vs. ambient temperature . . . . . . . . . . . DFN6 (3x3 mm) package outline. . . . . . . . . . . . . . . . . . . DFN6 (3x3 mm) recommended footprint . . . . . . . . . . . . . DFN6 (3x3 mm) automotive-grade package outline . . . . . . DFN6 (3x3 mm) automotive-grade recommended footprint. DFN6 (3x3) tape outline. . . . . . . . . . . . . . . . . . . . . . . . . DFN6 (3x3 mm) reel outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 . 2 . 3 . 9 . 9 . 9 . 9 . 9 . 9 10 10 10 10 10 10 11 11 11 11 11 11 12 12 12 12 12 12 13 13 14 14 16 18 19 20 21 22 23 page 28/29 LD39100 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2020 STMicroelectronics – All rights reserved DS6257 - Rev 9 page 29/29
LD39100PU12RY 价格&库存

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