LD39115J10R

LD39115J 150 mA low quiescent current low noise voltage regulator Datasheet - production data  Flip-chip 4 bumps 0.8 x 0.8 mm. pitch 0.4 mm  Temperature range: -40 °C to 125 °C Applications  Mobile phones  Personal digital assistants (PDAs) Flip-chip 4  Cordless phones and similar battery-powered systems Features Description  Input voltage from 1.5 to 5.5 V  Ultra low dropout voltage (80 mV typ. at 100 mA load)  Very low quiescent current (20 µA typ. at no load, 35 µA typ. at 150 mA load, 1 µA max in off mode)  Very low noise (33 µVRMS from 1 kHz to 100 kHz at VOUT = 1.8 V)  Output voltage tolerance: ± 2.0 % @ 25 °C  150 mA guaranteed output current  Wide range of output voltages available on request: 0.8 V to 4.5 V with 100 mV step The LD39115J provides 150 mA maximum current from an input voltage ranging from 1.5 V to 5.5 V with a typical dropout voltage of 80 mV. It is stabilized with a ceramic capacitor. The ultra low drop voltage, low quiescent current and low noise features make it suitable for low power battery-powered applications. Power supply rejection is 65 dB at low frequencies and starts to roll off at 10 kHz. An enable logic control function puts the LD39115J in shutdown mode allowing a total current consumption lower than 1 µA. The device also includes a short-circuit constant current limiting and thermal protection.  Logic-controlled electronic shutdown  Compatible with ceramic capacitor COUT = 1 µF  Internal current and thermal limit Table 1. Device summary Order codes Output voltages LD39115J12R 1.2 V LD39115J14R 1.4 V LD39115J15R 1.5 V LD39115J18R 1.8 V LD39115J25R 2.5 V LD39115J28R 2.8 V LD39115J30R 3.0 V LD39115J33R 3.3 V February 2021 This is information on a product in full production. DocID15527 Rev 8 1/21 www.st.com Contents LD39115J Contents 1 Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 8 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 9 Different output voltage versions of the LD39115J available on request . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2/21 DocID15527 Rev 8 LD39115J 1 Diagram Diagram Figure 1. Block diagram OUT IN BandGap 1.22 V R1 Trimming Thermal Protection R2 Enable EN GND DocID15527 Rev 8 3/21 21 Pin configuration 2 LD39115J Pin configuration Figure 2. Pin connection (top view) Table 2. Pin description 4/21 Pin n° Symbol A2 EN A1 GND B2 IN B1 OUT Function Enable pin logic input: Low = shutdown, High = active Common ground Input voltage of the LDO Output voltage DocID15527 Rev 8 LD39115J 3 Typical application Typical application Figure 3. Typical application circuit VIN IN 1 µF VEN VOUT OUT 1 µF EN Load GND DocID15527 Rev 8 5/21 21 Maximum ratings 4 LD39115J Maximum ratings Table 3. Absolute maximum ratings Symbol VIN Parameter DC input voltage Value Unit - 0.3 to 6 V VOUT DC output voltage - 0.3 to VI + 0.3 V VEN Enable input voltage - 0.3 to VI + 0.3 V IOUT Output current Internally limited mA Power dissipation Internally limited mW PD TSTG Storage temperature range - 65 to 150 °C TOP Operating junction temperature range - 40 to 125 °C Note: Absolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All values are referred to GND. Table 4. Thermal data Symbol RthJA Parameter Value Unit 180 °C/W Test conditions Value Unit HBM 4 kV Thermal resistance junction-ambient Table 5. ESD performance Symbol ESD 6/21 Parameter ESD protection voltage DocID15527 Rev 8 LD39115J 5 Electrical characteristics Electrical characteristics TJ = 25 °C, VIN = VOUT(NOM) + 1 V, CIN = COUT = 1 µF, IOUT = 1 mA, VEN = VIN, unless otherwise specified. Table 6. Electrical characteristics for LD39115J (1) Symbol Parameter VIN Operating input voltage VUVLO VOUT Test conditions Min. 1.5 Turn-on threshold 1.45 Turn-off threshold VOUT accuracy Typ. 1.30 Max. Unit 5.5 V 1.48 V 1.35 mV VOUT > 1.5 V, IOUT = 1 mA, TJ = 25 °C -2.0 2.0 % VOUT > 1.5 V, IOUT = 1 mA, -40 °C < TJ < 125 °C -3.0 3.0 % VOUT 1.5 V, IOUT = 1 mA 10 mV VOUT 1.5 V, IOUT = 1 mA, -40 °C < TJ < 125 °C 30 mV 0.01 %/V 10 mVpp VOUT Static line regulation VOUT +1 V VIN 5.5 V, IOUT = 1 mA VOUT Transient line regulation (2) VIN = +500 mV, IOUT = 1 mA, TR = TF = 5 µs VOUT Static load regulation IOUT = 1 mA to 150 mA 0.002 %/mA VOUT Transient load regulation (2) IOUT = 1 mA to 150 mA, tR = tF = 5 µs 40 mVpp VDROP Dropout voltage (3) IOUT = 100 mA, VOUT > 1.5 V -40 °C < TJ < 125 °C 80 Output noise voltage 10 Hz to 100 kHz, IOUT = 10 mA 30 VIN = VOUTNOM +1 V +/- VRIPPLE VRIPPLE = 0.1 V Freq. = 1 kHz IOUT = 10 mA 74 VIN = VOUTNOM + 0.5 V +/- VRIPPLE VRIPPLE = 0.1 V Freq. = 10 kHz IOUT = 10 mA 67 IOUT = 0 mA 20 eN SVR Supply voltage rejection VOUT = 1.5 V IOUT = 0 to 150 mA Quiescent current DocID15527 Rev 8 µVRMS/V 50 35 µA IOUT = 0 to 150 mA, -40 °C < TJ < 125 °C VIN input current in OFF MODE: VEN = GND mV dB IOUT = 0 mA, -40 °C < TJ < 125 °C IQ 110 70 0.001 1 7/21 21 Electrical characteristics LD39115J Table 6. Electrical characteristics for LD39115J (continued)(1) Symbol ISC Parameter Test conditions Short circuit current RL = 0 Enable input logic low VIN = 1.5 V to 5.5 V, -40 °C < TJ < 125 °C Enable input logic high VIN = 1.5 V to 5.5 V, -40 °C < TJ < 125 °C VEN Min. Typ. 200 0.4 V 0.9 Enable pin input current VSHDN = VIN 0.1 TON Turn on time (4) 30 Thermal shutdown 160 Hysteresis 20 COUT Output capacitor Capacitance (see Section 6: Typical performance characteristics) Unit mA IEN TSHDN Max. 1 100 nA µs °C 22 µF 1. For VOUT(NOM) < 1.2 V, VIN = 1.5 V. 2. All transient values are guaranteed by design, not production tested. 3. Dropout voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its nominal value. This specification does not apply for output voltages below 1.5 V. 4. Turn-on time is time measured between the enable input just exceeding VEN high value and the output voltage just reaching 95 % of its nominal value. 8/21 DocID15527 Rev 8 LD39115J 6 Typical performance characteristics Typical performance characteristics CIN = COUT = 1 µF, VEN to VIN. Figure 4. Output voltage vs. temperature (VOUT = 1.2 V) 1.3 Figure 5. Output voltage vs. temperature (VOUT = 2.8 V) 3 VIN = 2.2 V, IOUT = 1 mA 1.28 1.26 2.9 1.24 1.22 1.2 VOUT [V] VOUT [V] VIN = 3.8 V, IOUT = 1 mA 2.95 1.18 1.16 2.85 2.8 2.75 2.7 1.14 1.12 VOUT = 1.2 V VOUT = 2.8 V 2.65 2.6 1.1 -75 -50 -25 0 25 50 75 -75 100 125 150 175 -50 -25 0 25 T [°C] Figure 6. Line regulation vs. temperature 75 100 125 150 175 Figure 7. Load regulation vs. temperature 0.004 0.05 VIN = from 2.2 V to 5.5 V, IOUT = 1 mA VIN = 2.2 V, IOUT = from 1 to 150 mA 0.0035 0.03 VOUT=1.2V 0.02 Load [%/mA] 0.04 Line [%/V] 50 T [°C] 0.003 0.0025 0.002 0.0015 0.001 0.01 0.0005 VOUT=1.2 V 0 0 -75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175 T [°C] T [°C] DocID15527 Rev 8 9/21 21 Typical performance characteristics LD39115J Figure 8. Short-circuit current vs. drop voltage 0.09 0.4 0.35 125 0.08 85 0.07 55 0.3 25 0.25 0 0.2 -25 0.15 -40 0.1 VDROPOUT [V] 0.45 ISC [A] Figure 9. Dropout voltage vs. temperature 0.06 0.05 0.04 0.03 0.02 CIN = 1 µF COUT = 1 µF(+ 10 µF electrolitycs) 0.05 IOUT = 0.1 A VOUT = 2.8 V 0.01 0 0 1 2 3 4 5 0 6 -75 -50 -25 0 DROP [V] Figure 10. Dropout voltage vs. output current 100 125 150 175 125 1.2 0.1 0.08 0.06 0.04 VOUT = 2.8 V 0 0 0.05 0.1 0.15 0.2 25 0 0.6 -25 0.4 -40 VOUT = 1.3 V 0 0 0.25 1 2 3 3 85 25 0 1.5 -25 1 -40 VOUT = 2.8 V 0.5 0 1 2 3 VIN [V] 4 5 6 VEN [V] 55 2 5 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 VIN = 2.2 V, IOUT = 1 mA -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE [°C] 10/21 6 Figure 13. Enable threshold vs. temperature 125 IOUT = 0.15 A 2.5 4 VIN [V] IOUT [A] Figure 12. Output voltage vs. input voltage (VOUT = 2.8 V) 55 0.8 0.2 0.02 85 IOUT = 0.15 A 1 VOUT [V] VDROPOUT [V] 75 1.4 0.12 VOUT [V] 50 Figure 11. Output voltage vs. input voltage (VOUT = 1.3 V) 0.14 0 25 TEMPERATURE [°C] DocID15527 Rev 8 LD39115J Typical performance characteristics Figure 14. Quiescent current vs. temperature (VOUT = 1.2 V, IOUT = 0 mA) 45 40 Figure 15. Quiescent current vs. temperature (VOUT = 1.2 V, IOUT = 0.15 A) 70 VIN = 2.2 V, No Load 35 50 30 IQ [µA] IQ [µA] VIN = 2.2 V, IOUT = 0.15 A 60 25 20 15 40 30 20 10 VOUT = 1.2 V 10 5 VOUT = 1.2 V 0 -75 -50 -25 0 25 50 75 0 -75 -50 -25 100 125 150 175 0 Figure 16. Quiescent current vs. temperature (VOUT = 2.8 V, IOUT = 0.15 A) 60 IQ [µA] IQ [µA] 50 40 30 VOUT = 2.8 V 10 0 -75 -50 -25 0 25 50 75 75 100 125 150 175 Figure 17. Quiescent current vs. input voltage VIN = 3.8 V, IOUT = 0.15 A 20 50 TEMPERATURE [°C] TEMPERATURE [°C] 70 25 25 22.5 20 17.5 15 12.5 10 7.5 5 2.5 0 IOUT = 1 mA VOUT = 1.3 V 0 100 125 150 175 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 VIN [V] TEMPERATURE [°C] Figure 18. Quiescent current vs. output current Figure 19. Supply voltage rejection vs. temperature (VOUT = 1.2 V) 100 VIN from 2.1 V to 2.3 V IOUT = 10 mA, Freq. = 1 kHz SVR [dB] 90 80 70 60 VOUT = 1.2 V 50 40 -75 -50 -25 0 25 50 75 100 125 150 175 T [°C] DocID15527 Rev 8 11/21 21 Typical performance characteristics LD39115J Figure 20. Supply voltage rejection vs. temperature (VOUT = 1.3 V) Figure 21. Supply voltage rejection vs. temperature (Freq. = 1 kHz) 100 100 VIN from 3.7 V to 3.9 V, IOUT = 10 mA, Freq. = 1 kHz 90 90 80 80 SVR [dB] SVR [dB] VIN from 2.2 V to 2.4 V, IOUT = 10 mA, Freq. = 1 kHz 70 60 70 60 VOUT = 1.3 V 50 50 40 40 VOUT = 2.8 V -75 -50 -25 0 25 50 75 -75 -50 -25 100 125 150 175 0 25 75 100 125 150 175 T [°C] T [°C] Figure 22. Supply voltage rejection vs. temperature (Freq. = 10 kHz) Figure 23. Supply voltage rejection vs. temperature (VOUT = 2.8 V) 100 100 VIN from 1.7 V to 1.9 V, IOUT = 10 mA, Freq. = 10 kHz VIN from 3.2 V to 3.4 V, IOUT = 10 mA, Freq. = 10 kHz 90 90 80 80 SVR [dB] SVR [dB] 50 70 60 70 60 VOUT = 2.8 V 50 50 VOUT = 1.3 V 40 40 -75 -50 -25 0 25 50 75 -75 -50 -25 100 125 150 175 0 25 VIN from 2.1 V to 2.3 V, IOUT = 10 mA VOUT = 1.2 V 0 10 20 30 40 50 60 70 80 90 100 110 100 90 80 70 60 50 40 30 20 10 0 100 125 150 175 VIN from 1.7 V to 1.9 V, IOUT = 10 mA VOUT = 1.3 V 0 10 20 30 40 50 60 70 Frequency [KHz] Frequency [kHz] 12/21 75 Figure 25. Supply voltage rejection vs. frequency (VOUT = 1.3 V) SVR [dB] SVR [dB] Figure 24. Supply voltage rejection vs. frequency (VOUT = 1.2 V) 100 90 80 70 60 50 40 30 20 10 0 50 T [°C] T [°C] DocID15527 Rev 8 80 90 100 110 LD39115J Typical performance characteristics 100 90 80 70 60 50 40 30 20 10 0 Figure 27. Supply voltage rejection vs. output current 100 VIN from 3.2 V to 3.4 V, IOUT = 10 mA VIN from 1.7 V to 1.9 V, F = 10 kHz 90 80 70 SVR [dB] SVR [dB] Figure 26. Supply voltage rejection vs. frequency (VOUT = 2.8 V) 60 50 40 30 VOUT = 2.8 V VOUT = 1.3 V 20 10 0 0 10 20 30 40 50 60 70 80 90 100 110 120 0 0.025 0.05 0.075 0.1 0.125 0.15 0.175 0.2 0.225 0.25 IOUT [A] Frequency [kHz] Figure 28. LD39115J noise Figure 29. Line regulation transient Noise [µV/SQRT(Hz)] 1 VOUT = 1.3 V, VIN = 2.3 V, TA = 25 °C 0.8 0.6 VIN 0.4 0.2 VOUT 0 0 20000 40000 60000 80000 100000 Freq [Hz] VIN from 2.2 V to 2.7 V, IOUT = 1 mA, COUT = 1 µF, No CIN tRISE/FALL = 5 µs Figure 30. Start up transient Figure 31. Enable transient (VOUT = 1.2 V) VIN VEN VOUT VOUT VIN from 0 to 2.3 V, IOUT = 1 mA COUT = 1 µF No CIN, VOUT = 1.2 V VIN = 2.3 V, VEN from 0 to 2 V, IOUT = 1 mA, Trise = 5 µs tRISE = 60 µs DocID15527 Rev 8 13/21 21 Typical performance characteristics LD39115J Figure 32. Enable transient (VOUT = 2.8 V) Figure 33. Load transient (VOUT = 1.2 V) IOUT VEN VOUT = 1.2 V VOUT VOUT = 2.8 V VIN = 3.8 V, VEN from 0 to 2 V, IOUT = 1 mA, tRISE = 5 µs VOUT VIN = 2. 2 V, IOUT = from 1 to 150 mA, tRISE/FALL = 5 µs Figure 34. Load transient (VOUT = 2.8 V) Figure 35. ESR required for stability with ceramics capacitors 2.5 VOUT VOUT = 2.8 V ESR @ 100 kHz[ohm] 2.25 IOUT UNSTABLE ZONE 2 1.75 1.5 IOUT = from 1 mA to 150 mA, CIN = 1µF (ceramic) 1.25 1 STABLE ZONE 0.75 0.5 0.25 0 1 Vin = 3.8 V, IOUT = from 1 to 150 mA, tRISE/FALL = 5 µs 14/21 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 COUT [µF] (nominal value) VIN = 2. 2 V, IOUT = from 1 to 150 mA, tRISE/FALL = 5 µs DocID15527 Rev 8 LD39115J 7 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Figure 36. Flip-chip 4 drawings DocID15527 Rev 8 15/21 21 Package mechanical data LD39115J Table 7. Flip-chip 4 mechanical data mm Dim. Min. Typ. Max. A 0.52 0.56 0.60 A1 0.17 0.20 0.23 A2 0.35 0.36 0.37 b 0.23 0.25 0.29 D 0.758 0.788 0.818 D1 E 0.4 0.758 E1 0.788 0.4 SD 0.18 0.2 0.22 SE 0.18 0.2 0.22 f 0.199 ccc 0.075 Figure 37. Flip-chip 4 footprint 16/21 0.818 DocID15527 Rev 8 LD39115J 8 Packaging mechanical data Packaging mechanical data Figure 38. Flip-chip 4 tape and reel drawing DocID15527 Rev 8 17/21 21 Packaging mechanical data LD39115J Table 8. Flip-chip 4 tape and reel mechanical data mm Dim. Min. Typ. A 178 C 12.8 D 20.2 N 59 13.2 60 T 18/21 Max. 61 8.4 Ao 0.82 0.87 0.92 Bo 0.82 0.87 0.92 Ko 0.64 0.69 0.74 Po 3.9 4.0 4.1 P 3.9 4.0 4.1 DocID15527 Rev 8 LD39115J 9 Different output voltage versions of the LD39115J available on request Different output voltage versions of the LD39115J available on request Table 9. Options available on request Order codes Output voltages LD39115J08R 0.8 V LD39115J10R 1.0 V DocID15527 Rev 8 19/21 21 Revision history 10 LD39115J Revision history Table 10. Document revision history Date Revision 26-Mar-2009 1 Initial release. 12-Jun-2009 2 Modified: Table 1 on page 1 and Table 8 on page 19. 05-Aug-2009 3 Modified: tape and reel mechanical data on page 18. 17-May-2011 4 Modified: Table 1 on page 1 and Table 8 on page 19. 20-Dec-2011 5 Added: new order code LD39115J25R Table 1 on page 1. 16-Jan-2014 6 Part number LD39115Jxx changed to LD39115J. Updated the Description in cover page, Section 7: Package mechanical data. Added Section 8: Packaging mechanical data. Minor text changes. 12-Sep-2018 7 Added Table 5: ESD performance. 23-Feb-2021 8 Updated Figure 18 and Figure 28. 20/21 Changes DocID15527 Rev 8 LD39115J IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2021 STMicroelectronics – All rights reserved DocID15527 Rev 8 21/21 21