LD3985
Ultra low drop and low noise BiCMOS voltage regulators
Datasheet - production data
Description
627/
Features
• Input voltage from 2.5 V to 6 V
• Stable with low ESR ceramic capacitors
• Ultra low-dropout voltage (60 mV typ. at 150
mA load, 0.4 mV typ. at 1 mA load)
• Very low quiescent current (85 µA typ. at no
load, 170 µA typ. at 150 mA load; max.1.5 µA
in OFF mode)
The LD3985 provides up to 150 mA, from 2.5 V to
6 V input voltage. The ultra low drop voltage, low
quiescent current and low noise make it suitable
for low power applications and in battery-powered
systems. Regulator ground current increases
slightly in dropout only, prolonging the battery life.
Power supply rejection is better than 60 dB at low
frequencies and rolls off at 10 kHz. High power
supply rejection is maintained down to low input
voltage levels common to battery operated
circuits. Shutdown logic control function is
available, this means that when the device is
used as local regulator, it is possible to put a part
of the board in standby, decreasing the total
power consumption. The LD3985 is designed to
work with low ESR ceramic capacitors. Typical
applications are in mobile phones and similar
battery-powered wireless systems.
• Guaranteed output current up to 150 mA
• Wide range of output voltages: 1.22 V; 1.8 V;
2.5 V; 2.7 V; 2.8 V; 2.9 V; 3 V; 3.3 V; 4.7 V
• Fast turn-on time: typ. 200 µs [CO = 1 µF,
CBYP = 10 nF and IO = 1 mA]
• Logic-controlled electronic shutdown
• Internal current and thermal limit
• Output low noise voltage 30 µVRMS over 10 Hz
to 100 kHz
• SVR of 60 dB at 1 kHz, 50 dB at 10 kHz
• Temperature range: - 40 °C to 125 °C
November 2019
This is information on a product in full production.
DocID9587 Rev 17
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www.st.com
Contents
LD3985
Contents
1
Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
6
Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
7
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7.1
SOT23-5L package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7.2
SOT23-5L packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
8
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
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Diagram
Diagram
Figure 1. Schematic diagram
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Pin configuration
2
LD3985
Pin configuration
Figure 2. Pin connection (top view)
Table 1. Pin description
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Pin
Symbol
Name and function
1
VI
2
GND
Common ground
3
VINH
Inhibit input voltage: ON mode when VINH ≥ 1.2 V, OFF mode when VINH
≤ 0.4 V (Do not leave it floating, not internally pulled down/up)
4
BYPASS
Bypass pin: an external capacitor (usually 10 nF) has to be connected to
minimize noise voltage
5
VO
Input voltage of the LDO
Output voltage of the LDO
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3
Typical application
Typical application
Figure 3. Typical application circuit
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Maximum ratings
4
LD3985
Maximum ratings
Table 2. Absolute maximum ratings
Symbol
Parameter
Value
Unit
-0.3 to 6 (1)
V
VI
DC input voltage
VO
DC output voltage
-0.3 to VI+0.3
V
Inhibit input voltage
-0.3 to VI+0.3
V
VINH
IO
Output current
Internally limited
PD
Power dissipation
Internally limited
TSTG
Storage temperature range
-65 to 150
°C
TOP
Operating junction temperature range
-40 to 125
°C
1. The input pin is able to withstand non repetitive spike of 6.5 V for 200 ms.
Note:
Absolute maximum ratings are those values beyond which damage to the device may occur.
Functional operation under these conditions is not implied.
Table 3. Thermal data
Symbol
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Parameter
Value
Unit
RthJC
Thermal resistance junction-case
81
°C/W
RthJA
Thermal resistance junction-ambient
255
°C/W
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Electrical characteristics
Electrical characteristics
TJ = 25 °C, VI = VO(NOM) +0.5 V, CI = 1 µF, CBYP = 10 nF, IO = 1 mA, VINH = 1.4 V, unless
otherwise specified.
Table 4. Electrical characteristics
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
2.5
6
V
VI
Operating input
voltage
Output voltage
IO = 1 mA
accuracy, VO(NOM) <
TJ = -40 to 125 °C
2.5 V
-50
50
VO
-75
75
IO = 1 mA
Output voltage
accuracy, VO(NOM) ≥
TJ= -40 to 125 °C
2.5V
-2
2
VO
-3
3
VI = VO(NOM) + 0.5
to 6 V
TJ = -40 to 125 °C
-0.1
0.1
VO(NOM) = 4.7 to 5 V
-0.19
0.19
∆VO
∆VO
∆VO
∆VO
IQ
Line regulation (1)
Load regulation
Load regulation
Output AC line
regulation (2)
Quiescent current
ON mode: VINH =
1.2 V
IO = 1 mA to 150
mA, VO(NOM) < 2.5
V
TJ= -40 to 125 °C
0.002
0.008
IO = 1 mA to 150
mA, VO(NOM) ≥ 2.5
V
0.0004
0.002
0.0025
VI = VO(NOM) + 1 V,
IO = 150 mA,
tR= tF = 30 µs
1.5
IO = 0
85
IO = 0, TJ= -40 to
125 °C
%/V
%/mA
0.005
mVPP
150
170
IO = 0 to 150 mA,
TJ= -40 to 125 °C
OFF mode:
VINH = 0.4 V
% of
VO(NOM)
%/mA
IO = 1 mA to
150mA, TJ = -40 to
125 °C, VO(NOM) ≥
2.5 V
IO = 0 to 150 mA
mV
µA
250
0.003
TJ= -40 to 125 °C
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Electrical characteristics
LD3985
Table 4. Electrical characteristics (continued)
Symbol
Parameter
Test conditions
Min.
IO = 1 mA
Typ.
2
IO = 50 mA
Dropout voltage (3)
20
IO = 50 mA,
TJ= -40 to 125 °C
35
IO = 100 mA
70
IO = 150 mA
60
IO = 150 mA,
TJ= -40 to 125 °C
SVR
IO(PK)
VINH
Short-circuit current
RL = 0
Supply voltage
rejection
VI =
VO(NOM)+0.2
5V±
VRIPPLE = 0.1
V, IO= 50 mA
VO(NOM) < 2.5
V, VI = 2.55 V
Peak output current
VO ≥ VO(NOM) - 5%
Inhibit input logic
low
Inhibit input logic
high
mV
45
IO = 100 mA,
TJ= -40 to 125 °C
ISC
Unit
0.4
IO = 1 mA,
TJ= -40 to 125 °C
VDROP
Max.
100
600
f=1
kHz
60
dB
f=
10
kHz
VI = 2.5 V to 6 V,
TJ= -40 to 125 °C
mA
50
300
550
mA
0.4
V
1.2
IINH
Inhibit input current
VINH = 0.4 V,
VI = 6 V
±1
nA
eN
Output noise voltage
BW = 10 Hz to 100
kHz, CO = 1 µF
30
µVRMS
tON
Turn-on time (4)
CBYP = 10 nF
100
Thermal shutdown
(5)
160
TSHDN
CO
Output capacitor
Capacitance
(6)
ESR
250
µs
°C
1
22
µF
5
5000
mΩ
1. For VO(NOM) < 2 V, V I = 2.5 V
2. For VO(NOM) = 1.25 V, VI = 2.5 V
3. Dropout voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its
nominal value. This specification does not apply to input voltages below 2.5 V
4. Turn-on time is time measured between the enable input just exceeding VINH high value and the output
voltage just reaching 95% of its nominal value
5. Typical thermal protection hysteresis is 20 °C
6. The minimum capacitor value is 1 µF, anyway the LD3985 is still stable if the compensation capacitor has a
30% tolerance in all temperature range
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Typical performance characteristics
Typical performance characteristics
TJ = 25 °C, VI = VO(NOM) +0.5 V, CI = CO = 1 µF, CBYP = 10 nF, IO = 1 mA, VINH = 1.4 V,
unless otherwise specified.
Figure 4. Output voltage vs. temperature
(V0=1.35 V)
Figure 5. Output voltage vs. temperature
(V0=2.7 V)
Figure 6. Output voltage vs. temperature
(V0=3.3 V)
Figure 7. Shutdown voltage vs. temperature
(V0=1.35 V)
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Typical performance characteristics
LD3985
Figure 8. Shutdown voltage vs. temperature
(V0=3.3 V)
Figure 9. Line regulation vs. temperature
(V0=1.35 V)
Figure 10. Line regulation vs. temperature
(V0=2.7 V)
Figure 11. Line regulation vs. temperature
(V0=3.3 V)
Figure 12. Load regulation vs. temperature
(V0=1.35 V)
Figure 13. Load regulation vs. temperature
(V0=2.7 V)
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Typical performance characteristics
Figure 14. Load regulation vs. temperature
(V0=3.3 V)
Figure 15. Quiescent current vs. temperature
(VI=2.5 V)
Figure 16. Quiescent current vs. temperature
(VI=6 V)
Figure 17. Quiescent current vs. load current
Figure 18. Supply voltage rejection vs.
frequency
Figure 19. Load transient response
VI = 3.2 V, IO = 1 to 150 mA, rise-fall time = 1 µs
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Typical performance characteristics
LD3985
Figure 20. Line transient response
Figure 21. Startup
VI = 3.8 V to 4.4 V, TJ = 25 °C, IO = 150 mA, CI = CO VI = 3.3 V, IO = 1 mA, CI = CO = 1 µF (cer), CBYP =
= 1 µF (X7R), CBYP = 10 nF, rise-fall time = 1 µs,
10 nF, Tr = 20 ns, VO = 2.8 V
VO = 2.7 V
Figure 22. Turn-off
VI = 3.3 V, IO = 1 mA, CI = CO = 1 mF (cer), CBYP =
10 nF, Tf = 20 ns, VO = 2.8 V
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Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK is an ST trademark.
7.1
SOT23-5L package information
Figure 23. SOT23-5L package outline
BN
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Package information
LD3985
Table 5. SOT23-5L package mechanical data
mm
Dim.
Min.
Typ.
Max.
A
0.90
1.45
A1
0
0.15
A2
0.90
1.30
b
0.30
0.50
c
2.09
0.20
D
2.95
E
1.60
e
0.95
H
2.80
L
0.30
0.60
θ
0
8
Figure 24. SOT23-5L recommended footprint (dimensions in mm)
BN
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Package information
SOT23-5L packing information
Figure 25. SOT23-5L reel mechanical drawing
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Package information
LD3985
Figure 26. SOT23-5L oriented tape outline
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Figure 27. SOT23-5L reel outline
Table 6. SOT23-5L reel mechanical data
Dimensions (mm)
Symbol
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Min.
Typ.
Max.
A
-
-
180
C
12.8
13.0
13.2
D
20.2
-
-
N
60
-
-
T
-
-
14.4
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Ordering information
Ordering information
Table 7. Ordering information
Order code
Output voltage
LD3985M122R
1.22 V
LD3985M18R
1.8 V
LD3985M25R
2.5 V
LD3985M27R
2.7 V
LD3985M28R
2.8 V
LD3985M29R
2.9 V
LD3985M30R
3.0 V
LD3985M33R
3.3 V
LD3985M47R
4.7 V
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Revision history
9
LD3985
Revision history
Table 8. Document revision history
Date
Revision
07-May-2004
6
Part number status changed on table 3.
05-Oct-2004
7
tON values are changed on table 5.
27-Oct-2004
8
Order codes changed - table 3.
17-Mar-2005
9
Improved drawing quality for figures 19 - 20 - 21 - 22.
10-Apr-2007
10
Order codes updated.
08-Jun-2007
11
Order code change.
20-Dec-2007
12
Modified: Table 1, Table 12, mechanical data for Flip-chip.
02-Dec-2008
13
Modified: Table 6 on page 14 and Figure 23 on page 17.
03-Jan-2011
14
Modified: Features on page 1 and Table 12 on page 20.
08-Jan-2014
15
Part number LD3985XX changed to LD3985.
Modified title in cover page.
Updated the description and Section 7: Package mechanical data.
Added Section 8: Packaging mechanical data.
Minor text changes.
20-Jul-2017
16
Removed Flip Chip (1.57x1.22) and TSOT23-5L package information.
Removed device summary table.
Updated the whole document accordingly.
28-Nov-2019
17
Updated Section 7.2: SOT23-5L packing information.
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Changes
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