LD49300

LD49300 3A Very low drop for low output voltage regulator Feature summary ■ Input voltage range: VI = 1.4V to 5.5V VBIAS = 3V to 6V Stable with ceramic capacitor ±1.5% initial tolerance Maximum dropout voltage (VI - VO) of 400mV over temperature Adjustable output voltage down to 0.8V Ultra fast transient response (up to 10MHz bandwidth) Excellent line and load regulation specifications Logic controlled shutdown option Thermal shutdown and current limit protection Junction temperature range: –25°C to 125°C 5.5V and the bias supply requires between 3V and 6V for proper operation. The LD49300 offers fixed output voltages from 0.8V to 1.8V and adjustable output voltages down to 0.8V. The LD49300 requires a minimum output capacitance for stability, and work optimally with small ceramic capacitors. PPAK ■ ■ ■ ■ ■ ■ ■ ■ ■ Description The LD49300 is a high-bandwidth, low-dropout, 3.0A voltage regulator, ideal for powering core voltages of low-power microprocessors. The LD49300 implements a dual supply configuration allowing for very low output impedance and very fast transient response. The LD49300 requires a bias input supply and a main input supply, allowing for ultra-low input voltages on the main supply rail. The input supply operates from 1.4V to Applications ■ ■ ■ ■ ■ ■ Graphics processors PC Add-In Cards Microprocessor core voltage supply Low voltage digital ICs High Efficiency Linear power supplies SMPS post regulators Order code Part number LD49300PT08R (1) LD49300PT10R LD49300PT12R 1. Adjustable Version. Package PPAK (Tape&Reel) PPAK (Tape&Reel) PPAK (Tape&Reel) Packaging 2500 parts per reel 2500 parts per reel 2500 parts per reel December 2006 Rev. 2 1/20 www.st.com 20 Contents LD49300 Contents 1 2 3 4 5 6 7 8 Typical application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Alternative application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 8.1 8.2 8.3 8.4 8.5 8.6 8.7 8.8 8.9 8.10 Input supply voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Bias supply voltage (VBIAS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 External capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Minimum load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 VIN and VBIAS power sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Power dissipation/heatsinking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Heatsinking PPAK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Adjustable regulator design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 9 10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2/20 LD49300 Typical application circuits 1 Figure 1. Typical application circuits Adjustable version Figure 2. Fixed version with Enable 3/20 Alternative application circuits LD49300 2 Figure 3. Alternative application circuits Single supply voltage solution Figure 4. LD49300 plus DC/DC pre-regulator to reduce power dissipation 4/20 LD49300 Pin configuration 3 Figure 5. Pin configuration Pin connections (top view) Table 1. Pln n° 1 2 3 4 5 Pin description Symbol EN ADJ VIN GND VOUT VBIAS Note Enable (Input): Logic High = Enable, Logic Low = Shutdown. Adjustable regulator feedback input. Connect to resistor voltage divider. Input voltage which supplies current to the output power device. Ground (TAB is connected to ground). Regulator output. Input bias voltage for powering all circuitry on the regulator with the exception of the output power device. 5/20 Diagram LD49300 4 Figure 6. Diagram Block diagram 6/20 LD49300 Maximum ratings 5 Table 2. Maximum ratings Absolute maximum ratings Parameter Supply voltage Output voltage BIAS Supply voltage Enable input voltage Power dissipation Storage temperature range Value -0.3 to 7 -0.3 to VIN + 0.3 -0.3 to VBIAS + 0.3 -0.3 to 7 -0.3 to 7 Internally Limited -50 to 150 °C Unit V V V V Symbol VIN VOUT VBIAS VEN PD TSTG Note: 1 Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional Operation under these conditions is not implied. 2 All the values are referred to ground. Table 3. Symbol VIN VOUT VBIAS VEN TJ Supply voltage Output voltage BIAS Supply voltage Enable input voltage Junction temperature range Operating ratings Parameter Value 1.4 to 5.5 0.8 to 4.5 3 to 6 0 to VBIAS -25 to 125 Unit V V V V °C 7/20 Electrical characteristics LD49300 6 Table 4. Electrical characteristics Electrical characteristics (TJ = -25°C to 125 °C, VBIAS = VO+2.1V (1); VI = VO+1V; VEN = VBIAS (2), IO = 10mA; CI = 1µF; CO = 10µF; CBIAS = 1µF; unless otherwise specified. Typical values are referred to TJ = 25°C). Symbol VO VLINE VLOAD VDROP VDROP IGND Parameter Output voltage accuracy Line regulation Load regulation Dropout voltage (VI - VO) Dropout voltage (VBIAS- VO) Ground pin current Test conditions TJ = 25°C, fixed voltage options Over temperature range VI = VO+1V to 5.5V IL = 0mA to 3A, VBIAS ≥ 3V IL = 1.5A IL = 3 A IL = 3A (1) IL = 0mA IL = 3 A VEN ≤0.4V (2) IL = 0mA IL = 3 A VO = 0V Regulator Enable Regulator Shutdown Min. -1.5 -3 -0.1 Typ. Max. 1.5 3 0.1 1 200 400 Unit % %/V % mV V mA µA mA A 1.5 4 4 3 3 4.5 2.1 6 6 5 5 5 IGND_SHD Ground pin current in shutdown IVBIAS IL Current through VBIAS Current limit Enable Input (2) VEN IEN Reference VREF SVR Reference voltage Supply voltage rejection TJ = 25°C Over temperature range VI = 2.5V±0.5V, VO = 1V, F = 120Hz, VBIAS = 3.3V 0.788 0.776 0.8 0.8 68 0.812 0.824 V dB Enable input threshold (fixed voltage only) Enable pin input current 1.4 0.1 0.4 1 V µA 1. For VO ≤1V, VBIAS dropout specification does not apply due to a minimum 3V VBIAS input. 2. Fixed output voltage version only. 8/20 LD49300 Typical characteristics 7 Typical characteristics Reference voltage vs temperature Figure 8. Output voltage vs temperature Figure 7. Figure 9. Load regulation vs temperature Figure 10. Line regulation vs temperature Figure 11. Output voltage vs input voltage Figure 12. Dropout voltage (VIN-VOUT) vs temperature 9/20 Typical characteristics LD49300 Figure 13. Dropout voltage (VIN-VOUT) vs temperature Figure 14. VBIAS pin current vs temperature Figure 15. Noise vs frequency Figure 16. Quiescent current vs temperature Figure 17. Supply voltage rejection vs output current Figure 18. Stability region vs COUT & High ESR 10/20 LD49300 Typical characteristics Figure 19. Stability region vs COUT & Low ESR Figure 20. VBIAS Start Up transient (VIN Start Up before VBIAS) VIN=2V, VINH=VBIAS, IOUT=3A, VOUT=1V, CIN=COUT=1µF Figure 21. VBIAS & VIN Start Up transient Figure 22. VIN Start Up transient response response (VIN and VBIAS Start Up at (VBIAS Start Up before VIN) the same time) VIN=VBIAS=VINH=3.1V, VOUT=1V, COUT=1µF VIN=2.5V, VBIAS=VINH=3.1V, VOUT=1V, COUT=1µF 11/20 Typical characteristics LD49300 Figure 24. VIN Start Up transient response (VBIAS Start Up before VIN and VINH=VIN) Figure 23. VIN Start Up transient response (VBIAS Start Up before VIN) VIN=2.5V, VBIAS=VINH=3.1V, VOUT=1V, COUT=1µF VIN=VINH=2.5V, VBIAS=3.1V, VOUT=1V, COUT=1µF Figure 25. Load transient response VIN=2.5V, VBIAS=5V, VOUT=1.8V, IOUT=10mA to 3A, COUT=10µF 12/20 LD49300 Application hints 8 Application hints The LD49300 is an ultra-high performance, low dropout linear regulator, designed for high current application that requires fast transient response. The LD49300 operates from two input voltages, to reduce dropout voltage. The LD49300 is designed so that a minimum of external component are necessary. 8.1 Input supply voltage (VIN) VIN provides the power input current to the LD49300. The minimum input voltage can be as low as 1.4V, allowing conversion from very low voltage supplies to achieve low output voltage levels with very low power dissipation. 8.2 Bias supply voltage (VBIAS) The LD49300 control circuitry is supplied the VBIAS pin which requires a very low bias current (3mA typ.) even at the maximum output current level (3A). A bypass capacitor on the bias pin is recommended to improve the performance of the LD49300 during line and load transient. The small ceramic capacitor from VBIAS to ground reduces high frequency noise that could be injected into the control circuitry from the bias rail. In typical applications a 1µF ceramic chip capacitor may be used. The VBIAS input voltage must be 2.1V above the output voltage, with a minimum VBIAS input voltage of 3V. 8.3 External capacitors To assure regulator stability, input and output capacitors are required as shown in the typical application circuit. 8.4 Output capacitor The LD49300 requires a minimum output capacitance to maintain stability. A ceramic chip capacitor of at least 1µF is required. However, specific capacitor selection could be needed to ensure the transient response. A 1µF ceramic chip capacitor satisfies most applications but 10µF is recommended to ensure better transient performances. In applications where the VIN level is close to the maximum operating voltage (VIN>4V), it is strongly recommended to use an output capacitors of, at least, 10µF in order to avoid over-voltage stress on the Input/output power pins during short circuit conditions due to parasitic inductive effect. The output capacitor must be located as close as possible to the output pin of the LD49300. The ESR (equivalent series resistance) of the output capacitor must be within the "STABLE" region as shown in the typical characteristics figures. Both ceramic and tantalum capacitors are suitable. 8.5 Minimum load current The LD49300 does not require a minimum load to maintain output voltage regulation. 13/20 Application hints LD49300 8.6 VIN and VBIAS power sequencing In common applications where the power on transient of VIN and VBIAS voltages are not particularly fast (Tr>100µs), no power sequencing is required. Where voltage transient input (Tr