LD57100J120R

LD57100 Datasheet 1 A ultra low-dropout LDO with bias Features • Input voltage from VOUT to 5.5 V • • • • • • • • • • • • • • Input bias supply pin from 3.0 V to 5.5 V Ultra low-dropout voltage (40 mV typ. at 1 A load) Low ground current (35 μA typ. at no load) Output voltage tolerance: ±1% all over temperature range, ±0.5% at 25 °C 1 A guaranteed output current 50 mV output voltage step available from 0.4 V to 1.8 V 100 mV output voltage step available from 1.9 V to 3.6 V Adjustable version from 0.5 V to 3.0 V Logic-controlled electronic shutdown Internal current limit Thermal shutdown Output active discharge function Available in Flip Chip6 (0.8x1.2 mm) package Temperature range: -40 °C to 85 °C Applications Product status link LD57100 • • • Smartphones Cameras Low voltage, low noise post regulation Description The LD57100 is a high accuracy voltage regulator, which provides 1 A of current. It is equipped with an NMOS pass transistor, whose gate is biased by a dedicated pin, thus allowing the ultra-low drop performance even at very low input voltages. It is available in Flip Chip6 (0.8x1.2 mm), maximizing the space saving. This device is stabilized with a small ceramic capacitor on the output. The ultra low drop, low quiescent current and short-circuit protection make the LD57100 suitable for low power battery-operated applications. An enable logic control function puts the LD57100 in shutdown mode allowing a total current consumption lower than 0.1 µA. Thermal protection is also included. DS13123 - Rev 5 - April 2021 For further information contact your local STMicroelectronics sales office. www.st.com LD57100 Diagrams 1 Diagrams Figure 1. Block diagram fixed version VBIAS VIN Thermal protection EN Vref VOUT Current limiter SNS EN GND Figure 2. Block diagram adjustable version VBIAS VIN Thermal protection EN Vref VOUT Current limiter FB EN GND DS13123 - Rev 5 page 2/21 LD57100 Pin configuration 2 Pin configuration Figure 3. Pin connection (top view) 1 2 A VOUT VIN B SNS/FB EN C GND VBIAS Table 1. Pin description DS13123 - Rev 5 Pin # Symbol Functions A1 VOUT Output voltage A2 VIN Input voltage B1 SNS / FB B2 EN Enable pin logic input: low = shutdown, high = active C1 GND Common ground C2 VBIAS Bias supply input Output voltage sense pin in fixed version. Connect to the load with a separate PCB track. Feedback pin in adjustable version. Connect to the resistor divider central node page 3/21 LD57100 Typical application circuits 3 Typical application circuits Figure 4. Typical application for fixed version VIN VB IAS CB IAS VIN VB IAS EN VOUT VOUT L D5710 0 COUT CIN G ND S NS Figure 5. Typical application for adjustable version VIN VB IAS CB IAS VIN VB IAS EN VOUT VOUT L D5710 0 CIN G ND R1 COUT FB R2 Table 2. Typical application components DS13123 - Rev 5 Symbol Value Description Note CIN 1 µF Input capacitor Ceramic type CBIAS 4.7 µF Control logic bypass capacitor Ceramic type COUT 10 µF Output capacitor Ceramic type R1 Output voltage side resistor See Section 6.4 VOUT setting (adjustable version) R2 Ground side resistor