LDR2533

LDR1833 LDR2533 Very low drop dual voltage regulator Features ■ ■ ■ ■ ■ ■ Output current 1 up to 500 mA Output current 2 up to 1.0 A Low dropout voltage 1 (0.3 V @ IO = 500 mA) Low dropout voltage 2 (0.4 V @ IO = 1 A) Very low supply current (typ. 50 µA in OFF mode, 1.6 mA max in ON mode) Logic-controlled electronic shutdown output voltage availability for each regulator: 1.8 V, 2.5 V, 3.3 V Internal current and thermal limit Stable with low value (min. 4.7 µF) and low ESR output capacitors Supply voltage rejection: 70 dB (typ.) Temperature range (- 40 °C to 125 °C) PPAK ■ ■ ■ ■ Description The LDR1833, LDR2533 is a very low drop dual voltage regulator available in PPAK. The very low drop-voltage (0.5 V) and the very low supply current make it particularly suitable for low noise and low power applications such as PDA, Microdrive and other data storage applications while the used high voltage technology makes this device suitable for consumer applications such as Monitors and Set-top-box. For each VO a shutdown logic control function is available (TTL compatible) to decrease the total power consumption. Table 1. Device summary Output voltages Order codes VO1 LDR1833PT-R LDR2533PT-R 1.8 V 2.5 V Rev 3 VO2 3.3 V 3.3 V 1/16 www.st.com 16 April 2008 Contents LDR1833 - LDR2533 Contents 1 2 3 4 5 6 7 8 Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2/16 LDR1833 - LDR2533 Diagram 1 Figure 1. Diagram Block diagram VI1 POWER 1 VO1 INH1 START UP 1 BAND GAP 1 DRIVER 1 + ERROR AMPLIFIER 1 THERMAL 1 THERMAL 2 + ERROR AMPLIFIER 2 INH2 START UP 2 BAND GAP 2 DRIVER 2 VI2 POWER 2 VO2 3/16 Pin configuration LDR1833 - LDR2533 2 Figure 2. Pin configuration Pin connections (top view) PPAK Table 2. Pin n° 3 2 1 4 5 Pin description Symbol GND VI1 VI2 VO1 VO2 Ground pin Input 1 supply pin. Bypass with a 2.2µF capacitor to GND Input 2 supply pin. Bypass with a 2.2µF capacitor to GND Output 1 pin. Bypass with a 4.7µF capacitor to GND port Output 2 pin. Bypass with a 4.7µF capacitor to GND port Name and function 4/16 LDR1833 - LDR2533 Maximum ratings 3 Table 3. Maximum ratings Absolute maximum ratings Parameter DC input voltage Shutdown voltage Output current Power dissipation Storage temperature range Operating ambient temperature range Value -0.3 to 15 -0.3 to 15 Internally limited Internally limited -50 to +150 -40 to +125 °C °C Unit V V Symbol VI1 & VI2 INH IO PD TSTG TA Note: Absolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. Thermal data Parameter Thermal resistance junction-case PPAK 8 Unit °C/W Table 4. Symbol RthJC 5/16 Typical application LDR1833 - LDR2533 4 Figure 3. Typical application Typical application circuit 6/16 LDR1833 - LDR2533 Electrical characteristics 5 Table 5. Electrical characteristics Electrical characteristics (VI1 = VO1 + 2 V, VI2 = VO2 + 2 V, VINH1 = VINH2 = 2.5 V, CI1,2 = 2.2 µF, CO1,2 = 4.7 µF, IO1 = IO2 = 10 mA, TA = -40 °C to 125 °C, unless otherwise specified. Typical values are referred at TA = 25 °C) Parameter Output voltage 1 Output voltage 2 (1) (1) Symbol VO1 VO2 Test conditions Min. -5 -5 Typ. VNOM1 VNOM2 0.3 0.4 15 15 10 60 2 1 30 Max. +5 +5 0.7 0.8 30 40 Unit %V %V V V mV mV mV mV mA mA mA mA A V VDROP1 Dropout voltage 1 VDROP2 Dropout voltage 2 ΔVO1 ΔVO2 ΔVO1 ΔVO2 ISTOT IS IQMAX ISC1 ISC2 VINH-H VINH-L IINH SVR eN Line regulation 1 Line regulation 2 Load regulation 1 Load regulation 2 IO1 = 500mA IO2 = 1A VI1 = VO1+2V to VO1+7V, IO = 250mA VI2 = VO2+2V to VO2+7V, IO = 500mA VI1 = VO1+2V, IO1 = 10 to 500mA VI2 = VO2+2V, IO2 = 10mA to 1A IO1 = IO2 = NO LOAD NO LOAD IO1 = 500mA, IO2 = 1A TA = 25° TA = 25° 500 1 2.4 Total supply current 1 channel supply current Quiescent current Short circuit current 1 Short circuit current 2 Enable voltage HIGH Enable voltage LOW Enable pin current Supply voltage rejection (2) RMS output noise (2) 800 1.6 0.8 VINH = 5V VI1,2 = VO1,2 +3V ±1V, IO1,2 = 10 mA, f = 120Hz Bandwidth of 10Hz to 100kHz 6 70 0.003 V µA dB %VO 1. This test is not performed for VO < 2.5 V. 2. Guaranteed by design, but not tested in production 7/16 Typical characteristics LDR1833 - LDR2533 6 Figure 4. Typical characteristics (unless otherwise specified TJ = 25 °C) Dropout voltage (VO1) vs Figure 5. temperature Dropout voltage (VO2) vs temperature Figure 6. Dropout voltage (VO1) vs temperature Figure 7. Dropout voltage (VO2) vs temperature Figure 8. Line regulation (VO1) vs temp. Figure 9. Load regulation (VO1) vs temp. 8/16 LDR1833 - LDR2533 Typical characteristics Figure 10. Line regulation (VO2) vs temperature Figure 11. Load regulation (VO2) vs temperature Figure 12. Short circuit current (VO1) vs drop voltage Figure 13. Short circuit current (VO2) vs drop voltage Figure 14. Inhibit voltage vs temperature Figure 15. One channel inhibit current vs temperature 9/16 Typical characteristics LDR1833 - LDR2533 Figure 16. Supply voltage rejection vs (VO1) temperature Figure 17. Supply voltage rejection vs (VO2) temperature Figure 18. Supply voltage rejection (VO1) vs frequency Figure 19. Supply voltage rejection (VO2) vs frequency Figure 20. Maximum total quiescent current vs Figure 21. Total supply current vs temperature temperature 10/16 LDR1833 - LDR2533 Figure 22. Quiescent current (VO1) vs output current Typical characteristics Figure 23. Quiescent current (VO2) vs output current Figure 24. Thermal protection vs VO1 Figure 25. Load transient CI1,2=1µF, CO1,2=2.2µF, VINH1,2=2.5V, VI1=4.5V, VI2=5.3V, IO1=5mA to 0.5A, IO2=5mA to 1A, tRISE=tFALL=4.2µs Figure 26. Line transient VO1,2 Figure 27. Start up transient VO1 CI1,2=0, CO1,2=2.2µF, VI1=4.4 to 10.4V, VI2=5.3 to 11.3V, IO1=0.25A, IO2=0.5A, tRISE=tFALL=4.4µs VI1=1.1 to 8.5V, VI2=1.2 to 9.8V, IO1=0.25A, IO2=0.5A, tRISE=5µs 11/16 Package mechanical data LDR1833 - LDR2533 7 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 12/16 LDR1833 - LDR2533 Package mechanical data PPAK mechanical data mm. Dim. Min. A A1 A2 B B2 C C2 D D1 E E1 e G G1 H L2 L4 L5 L6 0.6 1 2.8 4.9 2.38 9.35 0.8 6.4 4.7 1.27 5.25 2.7 10.1 1 1 0.023 0.039 0.110 0.193 0.093 0.368 0.031 2.2 0.9 0.03 0.4 5.2 0.45 0.48 6 5.1 6.6 0.252 0.185 0.050 0.206 0.106 0.397 0.039 0.039 Typ. Max. 2.4 1.1 0.23 0.6 5.4 0.6 0.6 6.2 Min. 0.086 0.035 0.001 0.015 0.204 0.017 0.019 0.236 0.201 0.260 Typ. Max. 0.094 0.043 0.009 0.023 0.212 0.023 0.023 0.244 inch. 0078180-E 13/16 Package mechanical data LDR1833 - LDR2533 Tape & reel DPAK-PPAK mechanical data mm. Dim. Min. A C D N T Ao Bo Ko Po P 6.80 10.40 2.55 3.9 7.9 6.90 10.50 2.65 4.0 8.0 12.8 20.2 60 22.4 7.00 10.60 2.75 4.1 8.1 0.268 0.409 0.100 0.153 0.311 0.272 0.413 0.104 0.157 0.315 13.0 Typ. Max. 330 13.2 0.504 0.795 2.362 0.882 0.2.76 0.417 0.105 0.161 0.319 0.512 Min. Typ. Max. 12.992 0.519 inch. 14/16 LDR1833 - LDR2533 Revision history 8 Table 6. Date Revision history Document revision history Revision 2 3 Changes Modified: tables 1, 3, 5 and figures 3, 6, 10, 11, 14, 17, 22, 23. Modified: Table 1 on page 1. 03-Aug-2004 15-Apr-2008 15/16 LDR1833 - LDR2533 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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