LDS3985
Very low drop and low noise BiCMOS 300 mA voltage regulator
Datasheet - production data
Features
Input voltage from 2.5 V to 6 V
Stable with low ESR ceramic capacitors
Very low dropout voltage (150 mV typ. at
300 mA load, 0.4 mV typ. at 1 mA load)
Very low quiescent current (85 µA typ. at no
load, 200 µA typ. at 300 mA load; max.
1.5 µA in OFF mode)
Guaranteed output current up to 300 mA
Wide range of output voltages available on
request: fixed from 1.25 V to 5 V with
100 mV step
Fast turn-on time: typ. 240 µs
[CO = 2.2 µF, CBYP = 33 nF and
IO = 1 mA]
Logic-controlled electronic shutdown
Internal current and thermal limit
Low output voltage noise: 30 µ VRMS over
10 Hz to 100 kHz
SVR of 55 dB at 1 kHz, 50 dB at 10 kHz
Temperature range: - 40 °C to 125 °C
Automotive grade product available in DFN6
package, temperature range: - 40 °C to
85 °C
Description
The LDS3985 provides up to 300 mA, from 2.5 V
to 6 V input voltage. It is stable with ceramic and
high quality tantalum capacitor. The ultra low
drop voltage, low quiescent current and low noise
make it suitable for low power applications and
battery-powered systems. Shutdown logic control
function is available, this means that when the
device is used as local regulator, it is possible to
put a part of the board in standby, decreasing the
total power consumption. Typical applications are
mobile phones and similar battery-powered
wireless systems, portable information
appliances.
Table 1: Device summary
Packages
SOT23-5L
DFN6 (3 x 3 mm)
LDS3985M15R
LDS3985PU15R
DFN6 (3 x 3 mm)
automotive-grade
1.5
LDS3985PU18RY
LDS3985M18R
(1)
LDS3985M25R
LDS3985M28R
1.8
2.5
LDS3985PU28R
2.8
LDS3985M30R
LDS3985M33R
Output voltage (V)
3.0
LDS3985PU33R
LDS3985PU33RY(1)
LDS3985M50R
3.3
5.0
Notes:
(1)Qualified
and characterized according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 and
Q002 or equivalent.
May 2017
DocID11039 Rev 10
This is information on a product in full production.
1/21
www.st.com
Contents
LDS3985
Contents
1
Diagram ............................................................................................ 3
2
Pin configuration ............................................................................. 4
3
Maximum ratings ............................................................................. 5
4
5
Electrical characteristics ................................................................ 6
Typical performance characteristics ........................................... 10
6
Package information ..................................................................... 13
7
2/21
6.1
SOT23-5L package information ...................................................... 13
6.2
SOT23-5L packing information........................................................ 15
6.3
DFN6 (3 x 3 mm) package information ........................................... 16
6.4
DFN6 (3 x 3 mm) packing information ............................................. 18
Revision history ............................................................................ 20
DocID11039 Rev 10
LDS3985
1
Diagram
Diagram
Figure 1: Schematic diagram
DocID11039 Rev 10
3/21
Pin configuration
2
LDS3985
Pin configuration
Figure 2: Pin connections (top view for SOT23-5L, and for DFN6 (3 x 3 mm))
Table 2: Pin description
Pin for
Pin for
SOT23-5L
DFN6 (3 x 3 mm)
1
1
VI
LDO input voltage
2
5
GND
Common ground
3
6
VINH
Inhibit input voltage: ON mode when VINH ≥ 1.2 V, OFF mode
when VINH ≤ 0.4 V (do not leave it floating; it is not internally
pulled down/up)
4
4
Bypass
5
3
VO
-
2
N.C.
4/21
Symbol
Name and function
Bypass pin: an external capacitor to be connected (usually 10 nF)
to minimize noise voltage
LDO output voltage
Not connected
DocID11039 Rev 10
LDS3985
3
Maximum ratings
Maximum ratings
Table 3: Absolute maximum ratings
Symbol
Parameter
Value
Unit
-0.3 to 6 (1)
V
VI
DC input voltage
VO
DC output voltage
-0.3 to VI + 0.3
V
Inhibit input voltage
-0.3 to VI + 0.3
V
VINH
IO
Output current
Internally limited
PD
Power dissipation
Internally limited
TSTG
TOP
Storage temperature range
-65 to 150
°C
Operating junction temperature range
-40 to 125
°C
Operating junction temperature range, automotive grade version
- 40 to 85
°C
Notes:
(1)The
input pin is able to withstand non repetitive spike of 6.5 V for 200 ms.
Absolute maximum ratings are those values beyond which damage to the device
may occur. Functional operation under these condition is not implied.
Table 4: Thermal data
Symbol
Parameter
SOT23-5L
DFN6 (3 x 3 mm)
Unit
RthJC
Thermal resistance junction-case
81
10
°C/W
RthJA
Thermal resistance junction-ambient
255
55
°C/W
DocID11039 Rev 10
5/21
Electrical characteristics
4
LDS3985
Electrical characteristics
TJ = 25 °C, VI = VO(NOM) + 0.5 V, CI = 1 µF, CO = 2.2 µF, CBYP = 33 nF, IO = 1 mA,
VINH = 1.4 V, unless otherwise specified.
Table 5: LDS3985 electrical characteristics
Symbol
Parameter
VI
Operating input
voltage
VO
Output voltage < 2.5 V
VO
Output voltage ≥ 2.5 V
∆VO
Line regulation
(1)
Test condition
Min.
Typ.
Max.
Unit
2.5
6
V
IO = 1 mA
-50
50
TJ = - 40 to 125 °C
-75
75
IO = 1 mA
-2
2
TJ= - 40 to 125 °C
-3
3
VI = VO(NOM) + 0.5 to 6 V,
TJ = - 40 to 125 °C
-0.1
0.1
VO = 4.7 to 5 V
-0.19
0.19
mV
%
VO(NOM)
%/V
∆VO
Load regulation
IO = 1 mA to 300 mA,
VO ≤ 2.5 V
TJ = - 40 to 125 °C
0.005
0.01
%/mA
∆VO
Load regulation
IO = 1 mA to 300 mA,
VO ≥ 2.5 V
TJ = - 40 to 125 °C
0.0008
0.004
%/mA
∆VO
Output AC line
regulation (2)
VI = VO(NOM) + 1 V,
IO = 300 mA,
tR = tF = 30 µs
5
IO = 0
85
Quiescent current ON
mode: VINH = 1.4 V
IQ
IO = 0,
TJ = - 40 to 125 °C
IO = 0 to 300 mA
150
200
IO = 0 to 300 mA,
TJ = - 40 to 125 °C
300
TJ = - 40 to 125 °C
IO = 1 mA
1.5
0.4
IO = 1 mA,
TJ = - 40 to 125 °C
IO = 150 mA
Dropout voltage
(3)
2
60
IO = 150 mA,
TJ = - 40 to 125 °C
IO = 300 mA
IO = 300 mA,
TJ = - 40 to 125 °C
6/21
µA
0.003
OFF mode:
VINH = 0.4 V
VDROP
mVPP
DocID11039 Rev 10
100
150
250
mV
LDS3985
Symbol
Electrical characteristics
Parameter
ISC
SVR
Test condition
Short-circuit current
RL = 0
Supply voltage
rejection
VI = VO(NOM)+ 0.25 V ±
VRIPPLE = 0.1 V,
IO = 50 mA
For VO(NOM) < 2.5 V,
VI = 2.55 V
Min.
Typ.
Max.
600
f = 1 kHz
Unit
mA
55
dB
f = 10 kHz
50
Peak output current
VO ≥ VO(NOM) - 5%
300
Inhibit input logic low
Inhibit input logic high
VI = 2.5 V to 6 V,
TJ = - 40 to 125 °C
1.4
IINH
Inhibit input current
VINH = 0.4 V, VI = 6 V
±1
nA
eN
Output noise voltage
BW = 10 Hz to 100 kHz,
CO = 2.2 µF
30
µVRMS
tON
Turn-on time (4)
CBYP = 33 nF
240
µs
160
°C
IO(PK)
VINH
TSHDN
Thermal shutdown
CO
Output capacitor
ESR
mA
0.4
(5)
Capacitance
550
V
2.2
22
µF
5
5000
mΩ
Notes:
(1)For
VO(NOM) < 2 V, VI = 2.5 V.
(2)For
VO(NOM) = 1.25 V, VI = 2.5 V.
(3)Dropout
voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its nominal value. This
specification does not apply to input voltages below 2.5 V.
(4)Turn-on
time is time measured between the enable input just exceeding VINH high value and the output voltage just reaching
95% of its nominal value.
(5)Typical
thermal protection hysteresis is 20 °C.
DocID11039 Rev 10
7/21
Electrical characteristics
LDS3985
Table 6: LDS3985 (automotive grade) electrical characteristics
Symbol
Parameter
VI
Operating input
voltage
VO
Output voltage < 2.5 V
VO
Output voltage ≥ 2.5 V
∆VO
Line regulation
(1)
Test condition
Min.
Typ.
Max.
Unit
2.5
6
V
IO = 1 mA
-50
50
mV
TJ = - 40 to 85 °C
-75
75
IO = 1 mA
-2
2
TJ= - 40 to 85 °C
-3
3
VI = VO(NOM) + 0.5 to 6 V,
TJ = - 40 to 85 °C
-0.1
0.1
VO = 4.7 to 5 V
-0.19
0.19
%
VO(NOM)
%/V
Load regulation
IO = 1 mA to 300 mA,
VO ≤ 2.5 V
TJ = - 40 to 85 °C
0.005
0.01
%/mA
∆VO
Load regulation
IO = 1 mA to 300 mA,
VO ≥ 2.5 V
TJ = - 40 to 85 °C
0.0008
0.004
%/mA
∆VO
Output AC line
regulation (2)
VI = VO(NOM) + 1 V,
IO = 300 mA
tR = tF = 30 µs
5
IO = 0
85
∆VO
Quiescent current ON
mode: VINH = 1.4 V
IQ
IO = 0,
TJ = - 40 to 85 °C
150
IO = 0 to 300 mA
200
IO = 0 to 300 mA,
TJ = - 40 to 85 °C
OFF mode:
VINH = 0.4 V
0.003
TJ = - 40 to 85 °C
1.5
0.4
IO = 1 mA,
TJ = -40 to 85 °C
2
IO = 150 mA
Dropout voltage (3)
60
IO = 150 mA,
TJ = - 40 to 85 °C
100
IO = 300 mA
SVR
8/21
Short-circuit current
RL = 0
Supply voltage
rejection
VI = VO(NOM) + 0.25 V ±
VRIPPLE = 0.1 V,
IO = 50 mA
For VO(NOM) < 2.5 V
VI = 2.55 V
mV
150
IO = 300 mA,
TJ = - 40 to 85 °C
ISC
µA
300
IO = 1 mA
VDROP
mVPP
250
600
f = 1 kHz
mA
55
dB
f = 10 kHz
DocID11039 Rev 10
50
LDS3985
Symbol
Electrical characteristics
Parameter
IO(PK)
VINH
Test condition
Peak output current
VO ≥ VO(NOM) - 5%
Inhibit input logic low
VI = 2.5 V to 6 V,
TJ = - 40 to 85 °C
Inhibit input logic high
Min.
Typ.
300
550
Max.
Unit
mA
0.4
1.4
V
IINH
Inhibit input current
VINH = 0.4 V,
VI = 6 V
±1
nA
eN
Output noise voltage
BW = 10 Hz to 100 kHz,
CO = 2.2 µF
30
µVRMS
tON
Turn-on time (4)
CBYP = 33 nF
240
µs
160
°C
TSHDN
Thermal shutdown
CO
Output capacitor
(5)
Capacitance
ESR
2.2
22
µF
5
5000
mΩ
Notes:
(1)For
VO(NOM) < 2 V, VI = 2.5 V.
(2)For
VO(NOM) = 1.25 V, VI = 2.5 V.
(3)Dropout
voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its nominal value. This
specification does not apply to input voltages below 2.5 V.
(4)Turn-on
time is time measured between the enable input just exceeding VINH high value and the output voltage just reaching
95% of its nominal value.
(5)Typical
thermal protection hysteresis is 20 °C.
DocID11039 Rev 10
9/21
Typical performance characteristics
5
LDS3985
Typical performance characteristics
TJ = 25 °C, VI = VO(NOM) + 0.5 V, CI = 1 µF, CO = 2.2 µF, CBYP = 33 nF, IO = 1 mA,
VINH = 1.4 V, unless otherwise specified.
Figure 3: Output voltage vs temperature VO = 1.35 V
Figure 4: Output voltage vs temperature VO = 2.8 V
Figure 5: Output voltage vs temperature VO = 3.3 V
Figure 6: Inhibit voltage vs temperature VO = 1.35 V
Figure 7: Inhibit voltage vs temperature (VO = 3.3 V)
Figure 8: Line regulation vs temperature
(VI = 2.5 V to 6 V)
10/21
DocID11039 Rev 10
LDS3985
Typical performance characteristics
Figure 9: Line regulation vs temperature
(VI = 3.2 V to 6 V)
Figure 10: Line regulation vs temperature
(VI = 3.8 V to 6 V)
Figure 11: Quiescent current vs temperature
(VI = 2.5 V)
Figure 12: Quiescent current vs temperature
(VI = 6 V)
Figure 13: Quiescent current vs temperature
(VI = 3.4 V)
Figure 14: Supply voltage rejection vs frequency
DocID11039 Rev 10
11/21
Typical performance characteristics
LDS3985
Figure 15: Dropout voltage vs temperature
Figure 16: Dropout voltage vs output current
Figure 17: Inhibit transient
12/21
DocID11039 Rev 10
LDS3985
6
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
6.1
SOT23-5L package information
Figure 18: SOT23-5L package outline
DocID11039 Rev 10
13/21
Package information
LDS3985
Table 7: SOT23-5L package mechanical data
mm
Dim.
Min.
Typ.
A
0.90
1.45
A1
0
0.15
A2
0.90
1.30
b
0.30
0.50
c
0.09
0.20
D
2.95
E
1.60
e
0.95
H
2.80
L
0.30
0.60
θ
0°
8°
Figure 19: SOT23-5L recommended footprint
Dimensions are in mm
14/21
Max.
DocID11039 Rev 10
LDS3985
6.2
Package information
SOT23-5L packing information
Figure 20: SOT23-5L tape and reel outline
D
A
N
T
Po
Bo
Ko
Ao
P
Table 8: SOT23-5L tape and reel mechanical data
Dim.
mm
Min.
Typ.
A
Max.
180
C
12.8
D
20.2
N
60
13.0
T
13.2
14.4
Ao
3.13
3.23
3.33
Bo
3.07
3.17
3.27
Ko
1.27
1.37
1.47
Po
3.9
4.0
4.1
P
3.9
4.0
4.1
DocID11039 Rev 10
15/21
Package information
6.3
LDS3985
DFN6 (3 x 3 mm) package information
Figure 21: DFN6 (3 x 3 mm) package outline
16/21
DocID11039 Rev 10
LDS3985
Package information
Table 9: DFN6 (3 x 3 mm) mechanical data
mm
Dim.
Min.
A
0.80
A1
0
A3
Max.
1
0.02
0.05
0.20
b
0.23
D
2.90
D2
2.23
E
2.90
E2
1.50
e
L
Typ.
0.45
3
3.10
2.50
3
3.10
1.75
0.95
0.30
0.40
0.50
Figure 22: DFN6 (3 x 3 mm) recommended footprint
DocID11039 Rev 10
17/21
Package information
6.4
LDS3985
DFN6 (3 x 3 mm) packing information
Figure 23: DFN6 (3 x 3 mm) tape outline
18/21
DocID11039 Rev 10
LDS3985
Package information
Figure 24: DFN6 (3 x 3 mm) reel outline
Table 10: DFN6 (3 x 3 mm) tape and reel mechanical data
mm
Dim.
Min.
Typ.
Max.
A0
3.20
3.30
3.40
B0
3.20
3.30
3.40
K0
1
1.10
1.20
DocID11039 Rev 10
19/21
Revision history
7
LDS3985
Revision history
Table 11: Document revision history
Date
Revision
02-Dec-2004
1
First release.
10-Apr-2007
2
Added: new package TSOT23-5L.
16-May-2007
3
Added: new mechanical data DFN6D and order codes updated.
06-Sep-2007
4
Added: Table 1 in cover page.
11-Jun-2008
5
Modified: not found.
11-Jul-2009
6
Modified: not found.
29-Jul-2010
7
Modified: not found and not found.
8
Modified the Title and the Features in cover page.
Deleted Table1: Device summary.
Updated not found and not found.
Added and not found.
Minor text changes.
28-Feb-2014
9
Modified the Title and the Features in cover page.
Deleted Table1: Device summary.
Updated Table 10: Order codes and Section 6: Package mechanical
data.
Added Table 6: LDS3985 (automotive grade) electrical characteristics
and Section 7: Packaging mechanical data.
Minor text changes.
03-May-2017
10
Updated Table 1: "Device summary".
Minor text changes.
24-Oct-2013
20/21
Changes
DocID11039 Rev 10
LDS3985
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and
improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST
products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order
acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the
design of Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2017 STMicroelectronics – All rights reserved
DocID11039 Rev 10
21/21