LED5000
3 A monolithic step-down current source with dimming capability
Datasheet - production data
Applications
High brightness LED driving
Street lighting
Signage
Halogen bulb replacement
General lighting
Description
Features
5.5 V to 48 V operating input voltage range
850 kHz fixed switching frequency
200 mV typ. current sense voltage drop
Buck / buck-boost / floating boost topologies
PWM dimming
± 3% output current accuracy
overtemperature
200 mΩ typical RDSON
Peak current mode architecture
Short-circuit protection
Compliant with ceramic output capacitors
Inhibit for zero current consumption
Thermal shutdown
The LED5000 device is an 850 kHz fixed
switching frequency monolithic step-down DC-DC
converter designed to operate as a precise
constant current source with an adjustable
current capability up to 3 A DC. The embedded
PWM dimming circuitry features LED brightness
control. The regulated output current level is set
by connecting a sensing resistor to the feedback
pin. The 200 mV typical RSENSE voltage drop
enhances performance in terms of efficiency. The
size of the overall application is minimized thanks
to the high switching frequency and its
compatibility with ceramic output capacitors. The
device is fully protected against overheating,
overcurrent and output short-circuit. The
LED5000 is available in an HSOP8 package.
Figure 1: Typical application circuit
July 2017
DocID023951 Rev 6
This is information on a product in full production.
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Contents
LED5000
Contents
1
2
Pin settings ...................................................................................... 4
1.1
Pin connection................................................................................... 4
1.2
Pin description................................................................................... 4
Maximum ratings ............................................................................. 5
2.1
Maximum ratings ............................................................................... 5
2.2
Thermal data ..................................................................................... 5
2.3
ESD protection .................................................................................. 5
3
Electrical characteristics ................................................................ 6
4
Functional description .................................................................... 8
5
4.1
Power supply and voltage reference ................................................. 8
4.2
Voltage monitor ................................................................................. 9
4.3
Soft-start ........................................................................................... 9
4.4
Dimming block................................................................................. 10
4.5
Inhibit block ..................................................................................... 10
4.6
Error amplifier.................................................................................. 10
4.7
Thermal shutdown ........................................................................... 10
Application notes - buck conversion ........................................... 11
5.1
Closing the loop .............................................................................. 11
5.2
GCO(s) control to output transfer function ........................................ 11
5.3
Error amplifier compensation network ............................................. 13
5.4
LED small signal model ................................................................... 14
5.5
Total loop gain................................................................................. 16
5.6
Compensation network design ........................................................ 16
5.7
Example of system design .............................................................. 17
5.8
Dimming operation .......................................................................... 19
5.8.1
5.9
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Dimming frequency vs. dimming depth ............................................ 21
Component selection ...................................................................... 23
5.9.1
Sensing resistor ................................................................................ 23
5.9.2
Inductor and output capacitor selection ............................................ 23
5.9.3
Input capacitor .................................................................................. 25
5.10
Layout considerations ..................................................................... 27
5.11
Thermal considerations ................................................................... 28
5.12
Short-circuit protection .................................................................... 30
DocID023951 Rev 6
LED5000
Contents
5.13
6
7
Application circuit ............................................................................ 33
Application notes - alternative topologies ................................... 36
6.1
Inverting buck-boost ........................................................................ 36
6.2
Positive buck-boost ......................................................................... 40
6.3
Floating boost.................................................................................. 43
6.4
Compensation network design for alternative topologies ................ 48
6.4.1
fp < BW ............................................................................................. 49
6.4.2
fp > BW ............................................................................................. 50
Package information ..................................................................... 51
7.1
HSOP8 package information ........................................................... 51
8
Ordering information..................................................................... 53
9
Revision history ............................................................................ 54
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Pin settings
LED5000
1
Pin settings
1.1
Pin connection
Figure 2: Pin connection (top view)
1.2
Pin description
Table 1: Pin description
Type
1
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BOOT
Description
Analog circuitry power supply connection
2
DIM
Dimming control input. Logic low prevents the switching activity, logic high enables it. A
square wave on this pin implements LEDs current PWM dimming. Connect to VIN if not
used (see Section 5.8: "Dimming operation")
3
INH
Inhibit pin. Connect to GND if not used
4
COMP
5
FB
6
GND
Ground connection
7
VIN
Power input voltage
8
SW
Switching node
-
e.p.
Exposed pad to be connected to GND to increase the package thermal performance
and the device noise immunity
Analog circuitry
Feedback input. Connect a proper sensing resistor to set the LED current
DocID023951 Rev 6
LED5000
Maximum ratings
2
Maximum ratings
2.1
Maximum ratings
Table 2: Absolute maximum ratings
Symbol
2.2
Parameter
Value
Unit
VIN
Power supply input voltage
-0.3 to 52
V
VINH
Inhibit input
-0.3 to 7
V
VDIM
Dimming input
-0.3 to (VIN + 0.3)
V
VCOMP
Comp output
-0.3 to 3
V
BOOT
Bootstrap pin
-0.3 to 55
V
-1 to (VIN + 0.3)
V
SW
Switching node
VFB
Feedback voltage
-0.3 to 3
V
TJ
Operating junction temperature range
-40 to 150
°C
TSTG
Storage temperature range
-65 to 150
°C
TLEAD
Lead temperature (soldering 10 sec.)
260
°C
Value
Unit
40
°C/W
Thermal data
Table 3: Thermal data
Symbol
Rth JA(1)
Parameter
Thermal resistance junction ambient
Notes:
(1)Device
2.3
soldered to the STEVAL-ILL056V1 demonstration board.
ESD protection
Table 4: ESD protection
Symbol
ESD
Value
Unit
HBM
Test condition
4
KV
MM
500
V
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Electrical characteristics
3
LED5000
Electrical characteristics
All tests performed at TJ = 25 °C, VCC = 12 V, VINH = 0 V unless otherwise specified. The
specification is guaranteed from -40 to +125 °C - TJ temperature range by design,
characterization and statistical correlation.
Table 5: Electrical characteristics
Symbol
VIN
RDS(on)
ISW
tHICCUP
fSW
Parameter
Test condition
Min.
Operating input voltage range
Typ.
Max.
Unit
48
V
0.2
0.4
Ω
4.5
5.2
A
5.5
MOSFET on resistance
ISW = 1 A
Maximum limiting
current
3.7
Hiccup time
16
Switching frequency
600
850
ms
1000
kHz
Duty cycle
(1)
90
%
TON MIN
Minimum conduction time of the power
element
(1)
90
ns
TOFF MIN
Minimum conduction time of the external
diode
(1)
75
90
120
ns
194
200
206
mV
DC characteristics
VFB
Voltage feedback
IFB
FB biasing current
Iq
Quiescent current
Iqst-by
Standby quiescent current
50
nA
VDIM > 1.5 V
1.3
2
mA
VDIM > 1.5 V, VIN = 48 V
1.7
2.4
mA
16
34
µA
0.5
V
VINH > 1.5 V
12
Inhibit
VINH
IINH
Inhibit levels
Inhibit biasing current
Device ON
VIN = 5.5 V to 48 V
Device OFF
VIN = 5.5 V to 48 V
1.5
VINH = 5 V
0.7
Switching activity
VIN = 5.5 V to 48 V
2.2
V
1.6
2.5
µA
Dimming
VDIM
Dimming levels
V
Switching activity
prevented
VIN = 5.5 V to 48 V
0.5
V
Error amplifier
VOH
High level output voltage
VFB = 0 V
VOL
Low level output voltage
VFB = 400 mV
Source output current
VCOMP = 1.5 V; VFB = 0 V
Io source
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3
16
V
23
150
mV
30
µA
LED5000
Electrical characteristics
Symbol
Parameter
Test condition
Io sink
Sink output current
VCOMP = 1.5 V; VFB = 0.4
V
Ib
Source bias current
VFB = 250 mV
DC open loop gain
RL = ∞
Transconductance
ICOMP = TBD;
VCOMP = TBD
gm
Min.
Typ.
Max.
Unit
16
23
30
µA
(1)
50
nA
90
dB
220
µS
Thermal shutdown
TSHDWN
THYS
Thermal shutdown temperature
(1)
Thermal shutdown hysteresis
(1)
140
150
15
160
°C
°C
Notes:
(1)Parameter
guaranteed by design.
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Functional description
4
LED5000
Functional description
The LED5000 is based on a “peak current mode” architecture with fixed frequency control.
As a consequence the intersection between the error amplifier output and the sensed
inductor current generates the control signal to drive the power switch.
The main internal blocks shown in the block diagram in Figure 3: "LED5000 block diagram"
are:
A fully integrated sawtooth oscillator with a typical frequency of 850 kHz
A transconductance error amplifier
A high side current sense amplifier to track the inductor current
A pulse width modulator (PWM) comparator and the circuitry necessary to drive the
internal power element
The soft-start circuitry to decrease the inrush current at power-up
The dimming block to implement PWM dimming
The inhibit block for standby operation
The current limitation circuit based on the pulse-by-pulse current and the HICCUP
protection
The bootstrap circuitry to drive the embedded NMOS switch
A circuit to implement the thermal protection function
Figure 3: LED5000 block diagram
4.1
Power supply and voltage reference
The internal regulator circuit consists of a startup circuit, an internal voltage pre-regulator,
the bandgap voltage reference and the bias block that provides current to all the blocks.
The starter supplies the startup current to the entire device when the input voltage goes
high and the device is enabled (inhibit pin connected to ground). The pre-regulator block
supplies the bandgap cell with a pre-regulated voltage that has a very low supply voltage
noise sensitivity.
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LED5000
4.2
Functional description
Voltage monitor
An internal block continuously senses the Vcc, Vref and Vbg. If the monitored voltages are
good, the regulator begins operating. There is also a hysteresis on the Vcc (UVLO).
Figure 4: Internal circuit
4.3
Soft-start
The startup phase is implemented ramping the reference of the embedded error amplifier in
1 msec typ. time. It minimizes the inrush current and decreases the stress of the power
components at power up.
Figure 5: Soft-start open
During normal operation a new soft-start cycle takes place in case of:
thermal shutdown event
UVLO event
The soft-start is disabled during the dimming operation to maximize the dimming
performance.
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Functional description
4.4
LED5000
Dimming block
The DIM input features the LED brightness control with the PWM dimming operation (see
Section 5.8: "Dimming operation").
4.5
Inhibit block
The inhibit block features the standby mode accordingly with Table 5: "Electrical
characteristics ". The INH pin high level disables the device so the power consumption is
reduced to less than 40 µA. The INH pin is 5 V tolerant.
4.6
Error amplifier
The voltage error amplifier is the core of the loop regulation. It is a transconductance
operational amplifier whose non inverting input is connected to the internal voltage
reference (200 mV), while the inverting input (FB) is connected to the output current
sensing resistor.
Table 6: Uncompensated error amplifier characteristics
Description
Values
Transconductance
220 µS
Low frequency gain
90 dB
The error amplifier output is compared with the inductor current sense information to
perform PWM control.
4.7
Thermal shutdown
The shutdown block generates a signal that disables the power stage if the temperature of
the chip goes higher than a fixed internal threshold (150 ± 10 °C typical). The sensing
element of the chip is close to the PDMOS area, ensuring fast and accurate temperature
detection. A 15 °C typical hysteresis prevents the device from turning ON and OFF
continuously during the protection operation.
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Application notes - buck conversion
LED5000
5
Application notes - buck conversion
5.1
Closing the loop
Figure 6: Block diagram of the loop
5.2
GCO(s) control to output transfer function
The accurate control to output transfer function for a buck peak current mode converter can
be written as:
Equation 1
where RLOAD represents the load resistance (see Section 5.4: "LED small signal model"),
RCS the equivalent sensing resistor of the current sense circuitry equal to 0.38, ω p the
single pole introduced by the LC filter and ω z the zero given by the ESR of the output
capacitor.
FH(s) accounts the sampling effect performed by the PWM comparator on the output of the
error amplifier that introduces a double pole at one half of the switching frequency.
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Application notes - buck conversion
Equation 2
LED5000
where ESR is the equivalent series resistor to the output capacitor.
Equation 3
where:
Equation 4
Sn represents the slope of the sensed inductor current, Se the slope of the external ramp
(VPP peak to peak amplitude equal to 1.2 V) that implements the slope compensation to
avoid sub-harmonic oscillations at duty cycle over 50%.
The sampling effect contribution FH(s) is:
Equation 5
where:
Equation 6
and
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LED5000
Equation 7
5.3
Error amplifier compensation network
The external compensation network connected at the output of the error amplifier is
dimensioned to stabilize the system depending on the application conditions.
Figure 7: Transconductance embedded error amplifier
RC and CC introduce a pole and a zero in the open loop gain. CP does not significantly
affect system stability but it can be useful to reduce the noise at the output of the error
amplifier.
The transfer function of the error amplifier and its compensation network is:
Equation 8
Where AV0 = Gm · R0 (RO = output resistor of OTA = 200 * 10 ^ 6 Ω).
The poles of this transfer function are (if Cc >> C0 + CP):
Equation 9
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LED5000
Equation 10
whereas the zero is defined as:
Equation 11
5.4
LED small signal model
Once the system reaches the working condition the LEDs composing the row are biased
and their equivalent circuit can be considered as a resistor for frequencies ωP which is the typical condition.
With the power components selected in accordance with Section 5.9: "Component
selection" and given the BW specification, the components composing the compensation
network can be calculated as:
Equation 16
where the term mC is represented in Equation 4, RLOAD the equivalent loading resistor
(Equation 12), RS the resistor put in series to the LED string, Gm the error amplifier
transconductance and RCS the equivalent sensing resistor of the current sense circuitry
equal to 0.38 (Table 5: "Electrical characteristics ").
Equation 17
where K represents the leading position of the FZ (Equation 11) with respect to the system
bandwidth. In general, a value of 2 gives enough phase margin to the overall small loop
transfer function.
5.7
Example of system design
Design specification:
VIN = 48 V, VFW_LED = 3.7 V, nLED = 10, rLED = 1.1 Ω, ILED = 1 A, ILED RIPPLE = 2%.
The inductor and capacitor value are dimensioned to meet the I LED RIPPLE specification (see
Section 5.9.2: "Inductor and output capacitor selection" for output capacitor and inductor
selection guidelines):
L = 22 µH, COUT = 1.0 µF mlcc (negligible ESR).
In accordance with Section 5.9.1: "Sensing resistor" the sensing resistor value is:
Equation 18
Assuming a system bandwidth of:
Equation 19
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Application notes - buck conversion
LED5000
The ideal values of the components making up the compensation network are:
Equation 20
Final component selection is based on commercial values and a small capacitor C P is
added to reduce noise at the error amplifier output. CP slightly decreases the BW and
phase margin.
Equation 21
The gain and phase margin bode diagrams are plotted, respectively, in Figure 10: "Module
plot" and Figure 11: "Phase plot".
Figure 10: Module plot
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LED5000
Figure 11: Phase plot
The cut-off frequency and the phase margin are:
Equation 22
5.8
Dimming operation
The dimming input disables the switching activity, masking the PWM comparator output.
The inductor current dynamic performance when dimming input goes high depends on the
designed system response. The best dimming performance is obtained by maximizing the
bandwidth and phase margin, when possible.
As a general rule, the output capacitor minimization improves dimming performance.
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Application notes - buck conversion
LED5000
Figure 12: Dimming operation example
In fact, when dimming enables the switching activity, a small capacitor value is fast charged
with low inductor value. As a consequence, the LEDs current rising edge time is improved
and the inductor current oscillation reduced. An oversized output capacitor value requires
extra current for fast charge so generating an inductor current overshoot and oscillations.
The switching activity is prevented as soon as the dimming signal goes low. Nevertheless,
the LED current drops to zero only when the voltage stored in the output capacitor goes
below a minimum voltage determined by the selected LEDs. As a consequence, a big
capacitor value makes the LED current falling time worse than a smaller one.
The LED5000 device embeds dedicated circuitry to improve LED current rising edge time.
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LED5000
Figure 13: LED rising edge operation
Figure 14: LED rising edge operation (zoom)
5.8.1
Dimming frequency vs. dimming depth
As seen in Section 5.8: "Dimming operation" the LEDs current rising and falling edge time
mainly depends on the system bandwidth (T RISE) and the selected output capacitor value
(TRISE and TFALL).
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Application notes - buck conversion
LED5000
The dimming performance depends on the minimum current pulse shape specification of
the final application. The ideal minimum current pulse has rectangular shape, in any case it
degenerates into a trapezoid or, at worst, into a triangle, depending on the ratio (T RISE +
TFALL)/ TDIM.
Equation 23
The small signal response in Figure 14: "LED rising edge operation (zoom)" is considered
as an example.
Equation 24
Assuming the minimum current pulse (T MIN_PULSE) shape specification as:
Equation 25
where TDIMMING represents the dimming period and DMIN the minimum duty cycle which
gives the TMIN_PULSE charge. In the given example TMIN_PULSE = 9 µs.
Figure 15: dimming signal
Given TMIN_PULSE it is possible to calculate the maximum dimming depth given the dimming
frequency or vice versa.
For example, assuming a 10 KHz dimming frequency the maximum dimming depth is 9%
or given a 5% dimming depth it follows a 5.5 KHz maximum f DIM.
The LED5000 dimming performance is strictly dependent on the system small signal
response. As a consequence, an optimized compensation network (good phase margin
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LED5000
Application notes - buck conversion
and bandwidth maximized) and minimized COUT value are crucial for best performance.
Once the external power components and the compensation network are selected, a direct
measurement to determine TRISE, TFALL (see Equation 24) is necessary to certify the
achieved dimming performance.
5.9
Component selection
5.9.1
Sensing resistor
In closed loop operation the LED5000 feedback pin voltage is 200 mV, so the sensing
resistor calculation is expressed as:
Equation 26
Since the main loop (see Section 5.1: "Closing the loop") regulates the sensing resistor
voltage drop, the average current is regulated into the LEDs. The integration period is at
minimum
5 * TSW since the system bandwidth can be dimensioned up to fSW /5 at maximum.
A system loop based on a peak current mode architecture features consistent advantages
in comparison with simpler closed loop regulation schemes like the hysteretic or the
constant ON/OFF control.
The system performs the output current regulation over a period which is at least five times
longer than the switching frequency. The output current regulation neglects the ripple
current contribution and its reliance on external parameters like input voltage and output
voltage variations (line transient and LED forward voltage spread). This performance
cannot be achieved with simpler regulation loops like hysteretic control.
For the same reason, the switching frequency is constant over the application conditions,
that helps to tune the EMI filtering and to guarantee the maximum LED current ripple
specification in the application range. This performance cannot be achieved using constant
ON/OFF time architectures.
5.9.2
Inductor and output capacitor selection
The output capacitor filters the inductor current ripple that, given the application condition,
depends on the inductor value. As a consequence the LED current ripple, that is the main
specification for a switching current source, depends on the inductor and output capacitor
selection.
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Application notes - buck conversion
LED5000
Figure 16: Equivalent circuit
The LED ripple current can be calculated as the inductor ripple current ratio flowing into the
output impedance using the Laplace transform (see Figure 11: "Phase plot"):
Equation 27
where the term 8/π2 represents the main harmonic of the inductor current ripple (which has
a triangular shape) and ∆IL is the inductor current ripple.
Equation 28
so L value can be calculated as:
Equation 29
where TOFF is the OFF time of the embedded high switch, given by 1 - D.
As a consequence the lower is the inductor value (so higher the current ripple), the higher
would be the COUT value to meet the specification.
A general rule to dimension L value is:
Equation 30
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LED5000
Application notes - buck conversion
Finally the required output capacitor value can be calculated equalizing the LED current
ripple specification with the module of the Fourier transformer (see Equation 27) calculated
at fSW frequency.
Equation 31
Example 1 (see Section 5.6: "Compensation network design"):
VIN = 48 V, ILED = 700 mA, ΔILED/ILED = 2%, VFW_LED = 3.7 V, nLED = 10.
A lower inductor value maximizes the inductor current slew rate for better dimming
performance. Equation 30 becomes:
Equation 32
which is satisfied selecting a 10 µH inductor value.
The output capacitor value has to be dimensioned according to Equation 31.
Finally, given the selected inductor value, a 1 µF ceramic capacitor value kesvg the LED
current ripple ratio lower than the 2% of the nominal current. An output ceramic capacitor
type (negligible ESR) is suggested to minimize the ripple contribution given a fixed
capacitor value.
Table 7: Inductor selection
Manufacturer
Wurth Elektronik
Coilcraft
5.9.3
Series
Inductor value (µH)
Saturation current (A)
WE-HCI 7040
1 to 4.7
20 to 7
WE-HCI 7050
4.9 to 10
20 to 4.0
XPL 7030
2.2 to 10
29 to 7.2
Input capacitor
The input capacitor must be able to support the maximum input operating voltage and the
maximum RMS input current.
Since step-down converters draw current from the input in pulses, the input current is
squared and the height of each pulse is equal to the output current. The input capacitor has
to absorb all this switching current, whose RMS value can be up to the load current divided
by two (worst case, with duty cycle of 50%). For this reason, the quality of these capacitors
has to be very high to minimize the power dissipation generated by the internal ESR,
thereby improving system reliability and efficiency. The critical parameter is usually the
RMS current rating, which must be higher than the RMS current flowing through the
capacitor. The maximum RMS input current (flowing through the input capacitor) is:
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Application notes - buck conversion
Equation 33
LED5000
Where η is the expected system efficiency, D is the duty cycle and I O is the output DC
current. Considering η = 1 this function reaches its maximum value at D = 0.5 and the
equivalent RMS current is equal to IO divided by 2. The maximum and minimum duty cycles
are:
Equation 34
and
Equation 35
Where VF is the freewheeling diode forward voltage and V SW the voltage drop across the
internal PDMOS. Considering the range DMIN to DMAX, it is possible to determine the max.
IRMS going through the input capacitor.
Capacitors that can be considered are:
Electrolytic capacitors:
These are widely used due to their low price and their availability in a wide range of RMS
current ratings.
The only drawback is that, considering ripple current rating requirements, they are
physically larger than other capacitors.
Ceramic capacitors:
If available for the required value and voltage rating, these capacitors usually have a higher
RMS current rating for a given physical dimension (due to very low ESR).
The drawback is the considerably high cost.
Tantalum capacitors:
Small tantalum capacitors with very low ESR are becoming more available. However, they
can occasionally burn if subjected to very high current during charge.
Therefore, it is suggested to avoid this type of capacitor for the input filter of the device as
they could be stressed by a high surge current when connected to the power supply.
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LED5000
Table 8: List of ceramic capacitors for the LED5000
Manufacturer
Series
Capacitor value (µF)
Rated voltage (V)
Taiyo Yuden
UMK325BJ106MM-T
10
50
Murata
GRM42-2 X7R 475K 50
4.7
50
In case the selected capacitor is ceramic (so neglecting the ESR contribution), the input
voltage ripple can be calculated as:
Equation 36
5.10
Layout considerations
The layout of switching DC-DC converters is very important to minimize noise and
interference. Power-generating portions of the layout are the main cause of noise and so
high switching current loop areas should be kept as small as possible and lead lengths as
short as possible.
High impedance paths (in particular the feedback connections) are susceptible to
interference, so they should be as far as possible from the high current paths. A layout
example is provided in Figure 17: "Layout example".
The input and output loops are minimized to avoid radiation and high frequency resonance
problems. The feedback pin to the sensing resistor path must be designed as short as
possible to avoid pick-up noise. Another important issue is the ground plane of the board.
Since the package has an exposed pad, it is very important to connect it to an extended
ground plane in order to reduce the thermal resistance junction to ambient and increase the
noise immunity during the switching operation.
In addition, to increase the design noise immunity, different signal and power grounds
should be designed in the layout (see Section 5.13: "Application circuit"). The signal ground
serves the small signal components, the device analog ground pin, the exposed pad and a
small filtering capacitor connected to the VCC pin. The power ground serves the device
ground pin and the input filter. The different grounds are connected underneath the output
capacitor. Neglecting the current ripple contribution, the current flowing through this
component is constant during the switching activity and so this is the cleanest ground point
of the buck application circuit.
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LED5000
Figure 17: Layout example
5.11
Thermal considerations
The dissipated power of the device is tied to three different sources:
Conduction losses due to the RDSON, which are equal to:
Equation 37
Where D is the duty cycle of the application. Note that the duty cycle is theoretically given
by the ratio between VOUT (nLED * VLED + 200 mV) and VIN, but in practice it is substantially
higher than this value to compensate for the losses in the overall application.
For this reason, the conduction losses related to the R DSON increase compared to an ideal
case.
Switching losses due to turning ON and OFF. These are derived using Equation 38:
Equation 38
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LED5000
Application notes - buck conversion
Where TRISE and TFALL represent the switching times of the power element that cause the
switching losses when driving an inductive load (see Figure 18: "Switching losses"). TSW is
the equivalent switching time.
Figure 18: Switching losses
Quiescent current losses.
Equation 39
Example 2
(see Section 6.4: "Compensation network design for alternative topologies"):
VIN = 42 V, VFW_LED = 3.7 V, nLED = 8, ILED = 1500 mA.
The typical output voltage is:
Equation 40
RDSON_HS has a typical value of 200 Ω at 25 °C.
For the calculation we can estimate RDSON_HS = 300 mΩ as a consequence of TJ increase
during the operation.
TSW_EQ is approximately 12 ns.
IQ has a typical value of 2.4 mA at VIN = 48 V.
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The overall internal losses are:
LED5000
Equation 41
where TSW_EQ = (TRISE + TFALL )/2 = 12 nS.
Equation 42
The junction temperature of the device will be:
Equation 43
Where TA is the ambient temperature and RthJ-A is the thermal resistance junction to
ambient. The junction to ambient (RthJ-A) thermal resistance of the device assembled in the
HSOP8 package and mounted on the evaluation is about 40 °C/W.
Assuming the ambient temperature around 40 °C, the estimated junction temperature is:
5.12
Short-circuit protection
In overcurrent protection mode, when the peak current reaches the current limit threshold,
the device disables the power element and it is able to reduce the conduction time down to
the minimum value (approximately 100 nsec typical) to keep the inductor current limited.
This is the pulse-by-pulse current limitation to implement constant current protection
feature.
In overcurrent condition, the duty cycle is strongly reduced and, in most applications, this is
enough to limit the switch current to the current threshold.
The inductor current ripple during ON and OFF phases can be written as:
ON phase
Equation 44
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LED5000
OFF phase
Equation 45
where DCRL is the series resistance of the inductor and VFWDIODE is the forward voltage
drop across the external rectifying diode.
The pulse-by-pulse current limitation is effective to implement constant current protection
when:
Equation 46
From Equation 44 and Equation 45 we can gather that the implementation of the constant
current protection becomes more critical the lower is the VOUT and the higher is VIN.
In fact, in short-circuit condition the voltage applied to the inductor during the OFF time
becomes equal to the voltage drop across parasitic components (typically the DCR of the
inductor and the forward voltage of the diode) since VOUT is negligible, while during T ON the
voltage applied the inductor is maximized and it is approximately equal to VIN.
In general the worst case scenario is a heavy short-circuit at the output with maximum input
voltage. Equation 44 and Equation 45 in overcurrent conditions can be simplified to:
Equation 47
considering TON that has been already reduced to its minimum.
Equation 48
where TSW = 1/fSW considering the nominal fSW.
At high input voltage ΔIL TON could be higher than ΔIL TOFF and so the inductor current could
escalate. As a consequence, the system typically meets Equation 46 at a current level
higher than the nominal value thanks to the increased voltage drop across stray
components. In most application conditions the pulse-by-pulse current limitation is effective
to limit the inductor current. Whenever the current escalates, a second level current
protection called “hiccup mode” is enabled. The hiccup protection offers an additional
protection against heavy short-circuit condition at very high input voltage even considering
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Application notes - buck conversion
LED5000
the spread of the minimum conduction time of the power element. In case the hiccup
current level (6.2 A typical) is triggered the switching activity is prevented for 16 msec typ.
(see hiccup time in Table 5: "Electrical characteristics ").
Figure 19: "Constant current protection triggering hiccup mode" shows the operation of the
constant current protection when a short-circuit is applied at the output at the maximum
input voltage.
Figure 19: Constant current protection triggering hiccup mode
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LED5000
5.13
Application circuit
Figure 20: Evaluation board application circuit
The network D3, R4, RS implements an inexpensive overvoltage protection. R4 effect can
be neglected during normal operation since the FB biasing current is negligible (tens of nA,
see Table 5: "Electrical characteristics ") but it limits the current flowing in the Zener diode
D3. In case the load is disconnected or in case of open LED:
Equation 49
R1 must be dimensioned to limit the D1 rated power so it is an inexpensive small signal
Zener diode.
The overvoltage limits the output voltage in case of LED disconnection so protecting LEDs
when the string is reconnected with the device enabled. In case the OVP is not
implemented, a large amount of non-controlled current could flow through the LEDs during
the output capacitor discharging phase, thereby damaging the devices.
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LED5000
Table 9: Component list
Reference
Part number
Description
Manufacturer
C1, C2
C3225X7S1H106M
10 µF 50 V (size 1210)
TDK
C3, C6
100 nF 50 V (size 0805)
C4
470 pF 50 V (size 00603)
C5
22 pF 50 V (size 0603)
C7
C3216X7R1H105K
1 µF 50 V (size 1206)
C8
Not mounted
D1
STPS3L60U
D2
BZX384-C4V7
D3
BZX384-C39
3 A 60 V
ST
Coilcraft
Panasonic
L1
XFL6060-473ME
47 µH
ISAT = 1.8 A (10% drop)
IRMS = 3.7 A (40 °C rise)
(size 7.3 x 7.3 x 4.1 mm)
RS
ERJ14BSFR27U
0.27 Ω 1%
(size 1206)
R1
10 kΩ 1% (size 0603)
R2
Not mounted
R3
24.9 kΩ 1% (size 0603)
R4
47 kΩ 1% (size 0603)
Figure 21: PCB layout (component side)
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LED5000
Figure 22: PCB layout (bottom side)
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Application notes - alternative topologies
6
LED5000
Application notes - alternative topologies
Thanks to the wide input voltage range, the adjustable external compensation network and
enhanced dimming capability, the LED5000 device is suitable to implement boost and
buck-boost topologies.
6.1
Inverting buck-boost
The buck-boost topology fits the application with an input voltage range that overlaps the
output voltage, which is the voltage drop across the LEDs and the sensing resistor.
The inverting buck-boost (see Figure 23: "Inverting buck-boost") requires the same
component count as the buck conversion and it is more efficient than the positive buckboost. A current generator based on this topology implies two main application constraints:
the output voltage is negative so the LEDs must be reversed
the device GND floats with the negative output voltage. The device is supplied
between VIN and VOUT (< 0). As a consequence:
Equation 50
so:
Equation 51
where VOUT< 0.
Figure 23: Inverting buck-boost
Example 3
VIN RANGE = 12 - 24 V, VFW_LED = 3.7 V, nLED = 5 so VOUT = 18.7 V.
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Application notes - alternative topologies
Since the maximum operating voltage of the LED5000 is 48 V, according to Equation 51
the maximum input voltage of the application is 48 - 18.7 = 29.3 V.
The output voltage is given by:
Equation 52
where the ideal duty cycle DIDEAL for the buck-boost converter is:
Equation 53
However, due to power losses (mainly switching and conduction losses), the real duty cycle
is always higher than this. The real value (which can be measured in the application)
should be used in the following formulas.
The peak current flowing in the embedded switch is:
Equation 54
while its average current level is equal to:
Equation 55
This is due to the fact that the current flowing through the internal power switch is delivered
to the output only during the OFF phase.
The switch peak current must be lower than the minimum current limit of the overcurrent
protection (see Table 5: "Electrical characteristics " for details) while the average current
must be lower than the rated DC current of the device.
As a consequence, the maximum output current is:
Equation 56
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Application notes - alternative topologies
where ISW MAX represents the rated current of the device.
LED5000
The current capability is reduced by the term (1 - DREAL) and so, for example, with a duty
cycle of 0.5, and considering an average current through the switch of 3 A, the maximum
output current deliverable to the load is 1.5 A.
Figure 24: "LED current source based on inverting BB topology" shows the schematic
circuit for an LED current source based on inverting buck-boost topology. The input voltage
ranges from 10 to 26 V and it can drive a string composed of 5 LEDs with1 A DC.
Figure 24: LED current source based on inverting BB topology
The circuitry Q1, R2, R3, R4 implements a level shifter to convert the dimming signal
voltage levels (referred to GND) to the device rails, since the LED5000 local ground is
referred to the negative output voltage (given by the voltage drop across the LEDs and the
sensing resistor). Figure 25: "Inverting BB dimming operation" shows the dimming
operation: the light blue trace represents the DIM pin, the yellow the SW (high level is V IN,
low level is -VOUT), the green trace the inductor current (see Equation 54) and the purple is
the output voltage.
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LED5000
Figure 25: Inverting BB dimming operation
The network D1, R1, RS implements an inexpensive overvoltage protection. R1 effect can
be neglected during normal operation since the FB biasing current is negligible (tens of nA,
see Table 5: "Electrical characteristics ") but it limits the current flowing in the Zener diode
D1. In case the load is disconnected or in case of an open LED:
Equation 57
R1 must be dimensioned to limit the D1 rated power so it is an inexpensive small signal
Zener diode.
The overvoltage protection plays an important role for the inverting buck-boost topology. In
fact, in case of open row, the output voltage tends to diverge thus exceeding the input
voltage absolute maximum rate and the device would be damaged (see Equation 50). The
overvoltage protection limits VOUT and thereby it protects the device in case of load
disconnection.
To design the compensation network for the inverting buck-boost topology please refer to
paragraph Section 5.6: "Compensation network design".
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Application notes - alternative topologies
LED5000
Figure 26: Inverting BB PCB layout (component side)
Figure 27: Inverting BB PCB layout (bottom side)
6.2
Positive buck-boost
Positive buck-boost fits those applications that require a buck-boost topology (i.e.: the input
voltage range crosses the output voltage value) and where the inverting buck-boost is not
suitable because of the main constraints for the final application (refer to Section 6.1:
"Inverting buck-boost").
As a consequence the inverting buck-boost is the preferred option because it requires less
components and it has higher efficiency compared to the positive buck-boost topology.
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LED5000
Figure 28: Positive buck-boost
The positive buck-boost implementation (Figure 28: "Positive buck-boost") requires one
more diode and an external power switch than inverting buck-boost. The device is not
floating, referred to GND, and it is supplied with the input voltage of the application (the
input voltage in inverting buck-boost topology is instead VIN - VOUT, refer to Section 6.1:
"Inverting buck-boost" for details). The LED5000 device does not see the output voltage
during the switching activity so VOUT can be higher than the maximum input voltage.
The equations for the positive buck-boost are similar to those seen for the inverting.
Equation 58
where the ideal duty cycle DIDEAL for the buck-boost converter is:
Equation 59
However, due to power losses (mainly switching and conduction losses), the real duty cycle
is always higher than this. The real value (which can be measured in the application)
should be used in the following formulas.
The peak current flowing in the embedded switch is:
Equation 60
while its average current level is equal to:
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Application notes - alternative topologies
Equation 61
LED5000
This is due to the fact that the current flowing through the internal power switch is delivered
to the output only during the OFF phase.
The switch peak current must be lower than the minimum current limit of the overcurrent
protection (see Table 5: "Electrical characteristics " for details) while the average current
must be lower than the rated DC current of the device.
As a consequence, the maximum output current is:
Equation 62
where ISW MAX represents the rated current of the device.
The current capability is reduced by the term (1 - DREAL) and so, for example, with a duty
cycle of 0.5, and considering an average current through the switch of 3 A, the maximum
output current deliverable to the load is 1.5 A.
Figure 29: "LED current source based on positive BB + topology" shows the circuit
schematic for an LED current source based on positive buck-boost topology. The input
voltage ranges from 18 to 30 V and it can drive a string composed of 7 LEDs with 0.7 A DC
(VFW_LED = 3.75 V so VOUT = 26.4 V).
The network D5, R4, RS implements an inexpensive overvoltage protection. R4 effect can
be neglected during the normal operation since the FB biasing current is negligible (tens of
nA, see Table 5: "Electrical characteristics ") but it limits the current flowing in the Zener
diode D5. In case the load is disconnected or in case of open LED:
Equation 63
R4 must be dimensioned to limit the D5 rated power so it is an inexpensive small signal
Zener diode.
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LED5000
Figure 29: LED current source based on positive BB + topology
In case of open row, the positive output voltage tends to diverge, exceeding the D3
maximum reverse voltage and so the diode would be damaged. The overvoltage protection
limits VOUT and it protects the power components in case of load disconnection.
The network D4, R8 implements a level shifter to drive the gate of the transistor Q1. The
voltage at Q1 is:
Equation 64
Considering the VIN range 18 to 30 V:
Equation 65
The gate is driven inside the component specification. R8 can be dimensioned to discharge
the gate when VSW is low.
In case the input voltage range of the application is not suitable to implement a level shifter
to drive Q1, a dissipative clamping network (like R5, D6) must be used.
To design the compensation network for the positive buck-boost topology please refer to
Section 6.4: "Compensation network design for alternative topologies".
6.3
Floating boost
The floating boost topology (see ) serves those applications with an input voltage range
narrower than the output voltage, that is the voltage drop across the LEDs and the sensing
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Application notes - alternative topologies
LED5000
resistor (i.e.: VIN < VOUT). The topology is called floating since the output voltage is referred
to VIN and not GND, but this is typically suitable for a floating load like a string of LEDs.
Figure 30: Floating boost
The device is supplied by the output voltage so the maximum voltage drop across the
LEDs string is 48 V. The direct path of the boost conversion (C OUT, VDIODE, L) guarantees
the proper startup when the input voltage is:
Equation 66
where VOP_MIN is the minimum operating voltage.
The equations for the floating boost are:
Equation 67
The ideal duty cycle DIDEAL for the boost converter is:
Equation 68
As seen for the buck-boost topologies (Section 6.1: "Inverting buck-boost" and Section
"@NA short description"), due to power losses the real duty cycle is always higher than the
ideal. The real value (that can be measured in the application) should be used in the
following formulas to estimate the switch current.
The peak current flowing in the embedded switch is:
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LED5000
Equation 69
while its average current level is equal to:
Equation 70
This is due to the fact that the current flowing through the internal power switch is delivered
to the output only during the OFF phase.
The switch peak current must be lower than the minimum current limit of the overcurrent
protection (see Table 5: "Electrical characteristics " for details) while the average current
must be lower than the rated DC current of the device.
As a consequence, the maximum output current depends on the application conditions:
Equation 71
where ISW MAX represents the rated current of the device.
The current capability is reduced by the term (1-DREAL) and so, for example, with a duty
cycle of 0.5, and considering an average current through the switch of 3 A, the maximum
output current deliverable to the load is 1.5 A.
Figure 31: "LED current source based on floating boost topology" shows the circuit
schematic for an LED current source based on the floating boost topology. The input
voltage ranges from 12 to 36 V and it can drive a string composed of 11 LEDs with 0.7 A
DC (VFW_LED = 3.74 V so VOUT = 41 V).
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Application notes - alternative topologies
LED5000
Figure 31: LED current source based on floating boost topology
The network D1, R1, RS implements an inexpensive overvoltage protection. R1 effect can
be neglected during the normal operation since the FB biasing current is negligible (tens of
nA, see Table 5: "Electrical characteristics ") but it limits the current flowing in the Zener
diode D1. In case the load is disconnected or in case of open LED:
Equation 72
R1 must be dimensioned to limit the D1 rated power so it is an inexpensive small signal
Zener diode.
The circuitry Q1, R3, R4, R5 implements a level shifter to convert the dimming signal
voltage levels (referred to GND) to the device rails, since the LED5000 local ground is
floating. The LED5000 local GND level is:
Equation 73
where VLGND represent the local GND value.
Figure 25: "Inverting BB dimming operation" shows the dimming operation: the light blue
trace represents the DIM pin, the yellow the SW (high level is VIN, low level is VIN - VOUT),
the green trace the inductor current (see Equation 69) and the purple is the output voltage.
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Application notes - alternative topologies
Figure 32: Floating BB dimming operation
To design the compensation network for the boost topology please refer to Section 5.6:
"Compensation network design".
Figure 33: Floating boost PCB layout (component side)
Figure 34: Floating boost PCB layout (bottom side)
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Application notes - alternative topologies
6.4
LED5000
Compensation network design for alternative topologies
The small signal analysis for the alternative topologies can be written as:
Equation 74
that shares similar terms with Equation 1 which is valid for the buck (see Equation 1). In
addition KDX depends on the topology (different for boost and buck-boost) and wZ_RHP
(Equation 75) is a zero in the right half plane:
Equation 75
The RHP (right half plane) zero has the same 20 dB/dec rising gain magnitude as
a conventional zero, but with 90 degree phase drop instead of lead. This characteristic
cannot be compensated with the error amplifier network so the loop gain is designed to roll
off at lower frequency in order to keep its contribution outside the small signal analysis.
ωZ_RHP (see Equation 75) depends on the equivalent output resistance, inductor value and
the duty cycle. As a consequence the minimum ωZ_RHP over the input voltage range
determines the maximum system bandwidth:
Equation 76
the system phase margin depends on K.
This paragraph provides the equations to calculate the components of the compensation
network once selected the power components and given the BW specification.
Table 10: "BB and boost parameters" summarizes the KD, Km, K parameters useful for the
next calculations of the compensation network.
The DC gain of the total small loop is:
Equation 77
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Application notes - alternative topologies
where Gm is the error amplifier transconductance, REA the equivalent output resistance of
the error amplifier, RCS the internal current sense gain (for these parameters refer to Table
5: "Electrical characteristics "), RS the sensing resistor value, and KD can be calculated
from Table 10: "BB and boost parameters".
The calculation of the components composing the compensation network depends on the
relative position of the pole fp (see Equation 3) and the designed bandwidth BW.
Equation 78
Table 10: BB and boost parameters
Boost
Buck-boost
KD
Km
k
6.4.1
fp < BW
In case the pole fp is inside the system bandwidth BW, the component values composing
the compensation network can be calculated as:
Equation 79
and
Equation 80
Where K represents the leading position of the FZ (Equation 11) in respect to the system
bandwidth. In general a decade (K = 10) gives enough phase margin to the overall small
loop transfer function.
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Application notes - alternative topologies
6.4.2
LED5000
fp > BW
In case the pole fp is outside the system bandwidth BW, the component values composing
the compensation network can be calculated as:
Equation 81
and
Equation 82
where K represents the leading position of the FZ (Equation 11) in respect to the pole fp.
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7
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
7.1
HSOP8 package information
Figure 35: HSOP8 package outline
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Package information
LED5000
Table 11: HSOP8 package mechanical data
Dimensions (mm)
Symbol
Min.
Max.
A
1.75
A1
0.15
A2
1.25
b
0.38
0.51
c
0.17
0.25
D
4.80
4.90
5.00
D1
3.10
3.30
3.50
E
5.80
6.00
6.20
E1
3.80
3.90
4.00
E2
2.20
2.40
2.60
e
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Typ.
1.27
h
0.30
0.50
L
0.45
0.80
k
0°
8°
DocID023951 Rev 6
LED5000
8
Ordering information
Ordering information
Table 12: Order code
Order code
Package
Packing
LED5000PHR
HSOP8
Tape & reel
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Revision history
9
LED5000
Revision history
Table 12: Document revision history
Date
Revision
31-Jan-2013
1
Initial release.
2
Updated package name in package photo on page 1 (replaced “HPSO8” by
“HSOP8”).
Updated Section : Features on page 1 (replaced “200 mW” by “200 mΩ” in
“typical RDSON”).
Updated Table 3 on page 7 (added note 1 below Table 3).
Updated Figure 3 on page 10 (replaced by a new block diagram).
Updated Table 6 on page 13 (changed “transconductance“ from 2200 µS to
220 µS).
Updated Section 5.2 on page 14 [updated text below Equation 1 - added
“equal to 0.38”. Added “where: ESR is the equivalent series resistor to the
output capacitor.” below Equation 2 on page 15. Added “equal to 1.2 V”
below Equation 4 on page 15 to “(VPP peak to peak amplitude)” ].
Updated Section 5.3 (updated text below Equation 8 on page 16 - replaced
“Where
Avo = Gm · Ro” by “Where AV0 = Gm · R0 (RO = output resistor of OTA = 200
* 10 ^ 6 Ω)”.
Updated Section 5.4 (updated Equation 12 on page 18 - replaced “RSENSE”
by “RS”, added “where RS is the resistor put in series to the LED string”
below Equation 12).
Updated Section 5.6 (updated text below Equation 16 on page 20 - replaced
text “RS the sensing resistor value” by “RS the resistor put in series to the
LED string” and “RCS the current sense gain” by “RCS the equivalent sensing
resistor of the current sense circuitry equal to 0.38”).
Updated Section 5.7 on page 20 (replaced “rLED= 1.1 W” by “rLED= 1.1 Ω“ in
“Design specification”) .
Updated Equation 29 on page 26 (added equations).
Updated Equation 41 on page 31 (replaced “TSW“ by “TSW_EQ“, added text
“where: TSW_EQ = (TRISE + TFALL )/2 = 12 nS” below Equation 41).
Updated text below Equation 43 on page 31 (updated package name replaced “HPSO8” by “HSOP8”, replaced “60” of “the estimated junction
temperature” by “40”).
Updated Figure 20 on page 34 (replaced by a new application circuit replaced “R56” by “R27”).
Updated Table 9 on page 35 [replaced “MSS7341”-473MLD” by
“XFL6060-473ME”, “ISAT = 1.0 A (30% drop)” by “ISAT = 1.8 A (10% drop)” and
“IRMS = 1.85 A (40 °C rise)” by “IRMS = 3.7 A (40 °C rise)”.
of “L1“ component ].
Updated Figure 24 on page 39, Figure 29 on page 43 and Figure 31 on
page 46 (replaced by new figures).
Updated Section 7 on page 51 (updated titles, reversed order of Figure 35
and Table 11, minor modifications).
Updated package name in Table 12 on page 53 (replaced “HPSO8” by
“HSOP8”).
Updated cross-references throughout document.
Minor modifications throughout document.
27-Feb-2014
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Changes
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LED5000
Date
Revision history
Revision
Changes
28-Apr-2014
3
Updated Section 6.1: Inverting buck-boost on page 37 (replaced 10 LEDs by
5 LEDs in text above Figure 24 on page 39).
30-Sep-2014
4
Updated Figure 24 on page 39 (replaced by new figure).
04-Apr-2016
5
Updated Section 8: "Ordering information".
Minor text changes.
26-Jul-2017
6
Minor text changes.
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LED5000
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