LNBK20PD

LNBK20 LNB supply and control voltage regulator (parallel interface) Feature summary ■ Complete interface for two LNBs remote supply and control ■ LNB selection and stand-by function ■ Built-in tone oscillator factory trimmed at 22KHz ■ Fast oscillator start-up facilitates DiSEqCTM encoding ■ Two supply inputs for lowest dissipation ■ Bypass function for slave operation ■ LNB short circuit protection and diagnostic ■ Auxiliary modulation input extends flexibility ■ Cable length compensation ■ Internal over temperature protection ■ Backward current protection Description c u d u d o o r P via the coaxial cable. It has the same functionality of the LNBP1X and LNBP20 series, at a reduced output current capability. Since most satellite receivers have two antenna ports, the output voltage of the regulator is available at one of two logic-selectable output pins (LNBA, LNBB). When the IC is powered and put in Stand-by (EN pin LOW), both regulator outputs are disabled to allow the antenna downconverters to be supplied/controlled by others satellite receivers sharing the same coaxial lines. In this occurrence the device will limit at 3 mA (max) the backward current that could flow from LNBA and LNBB output pins to GND. (See continuous description). e t le o s b O - Intended for analog and digital satellite receivers, the LNBK is a monolithic linear voltage regulator, assembled in PowerSO-20 and SO-20, specifically designed to provide the powering voltages and the interfacing signals to the LNB downconverter situated in the antenna ) s ( ct ) s t( SO-20 PowerSO-20 r P e t e l o s b O Order code Packages Part number LNBK20 February 2007 Packaging PowerSO-20 SO-20 LNBK20PD-TR LNBK20D2-TR Rev. 8 Tape & Reel 1/25 www.st.com 25 LNBK20 Contents 1 Description (continued) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7 Typical application schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 c u d e t le ) s ( ct u d o r P e t e l o s b O 2/25 o s b O - o r P ) s t( LNBK20 1 Description (continued) Description (continued) For slave operation in single dish, dual receiver systems, the bypass function is implemented by an electronic switch between the Master Input pin (MI) and the LNBA pin, thus leaving all LNB powering and control functions to the Master Receiver. This electronic switch is closed when the device is powered and EN pin is LOW. The regulator outputs can be logic controlled to be 13 or 18 V (typ.) by mean of the VSEL pin for remote controlling of LNBs. Additionally, it is possible to increment by 1V (typ.) the selected voltage value to compensate the excess voltage drop along the coaxial cable (LLC pin HIGH). In order to reduce the power dissipation of the device when the lowest output voltage is selected, the regulator has two Supply Input pins VCC1 and VCC2. They must be powered respectively at 16V (min) and 23V (min), and an internal switch automatically will select the suitable supply pin according to the selected output voltage. If adequate heatsink is provided and higher power losses are acceptable, both supply pins can be powered by the same 23V source without affecting any other circuit performance. ) s t( The ENT (Tone Enable) pin activates the internal oscillator so that the DC output is modulated by a ±0.3 V, 22KHz (typ.) square wave. This internal oscillator is factory trimmed within a tolerance of ±2KHz, thus no further adjustments neither external components are required. c u d o r P A burst coding of the 22KHz tone can be accomplished thanks to the fast response of the ENT input and the prompt oscillator start-up. This helps designers who want to implement the DiSEqCTM protocols (a). e t le In order to improve design flexibility and to allow implementation of newcoming LNB remote control standards, an analogic modulation input pin is available (EXTM). An appropriate DC blocking capacitor must be used to couple the modulating signal source to the EXTM pin. When external modulation is not used, the relevant pin can be left open. ) s ( ct o s b O - Two pins are dedicated to the overcurrent protection/monitoring: CEXT and OLF. The overcurrent protection circuit works dynamically: as soon as an overload is detected in either LNB output, the output is shut-down for a time Toff determined by the capacitor connected between CEXT and GND. Simultaneously the OLF pin, that is an open collector diagnostic output flag, from HIGH IMPEDANCE state goes LOW. u d o r P e After the time has elapsed, the output is resumed for a time ton=1/15toff (typ.) and OLF goes in HIGH IMPEDANCE. If the overload is still present, the protection circuit will cycle again through toff and ton until the overload is removed. Typical ton+toff value is 1200ms when a 4.7µF external capacitor is used. s b O t e l o This dynamic operation can greatly reduce the power dissipation in short circuit condition, still ensuring excellent power-on start up even with highly capacitive loads on LNB outputs. The device is packaged in PowerSO-20 for surface mounting. When a limited functionality in a smaller package matches design needs, a range of cost-effective PowerSO-10 solutions is also offered. All versions have built-in thermal protection against overheating damage. a. External components are needed to comply to level 2.x and above (bidirectional) DiSEqCTM bus hardware requirements. DiSEqCTM is a trademark or EUTELSAT. 3/25 Pin configuration LNBK20 2 Pin configuration Figure 1. Pin connections (top view) PowerSO-20 Table 1. SO-20 c u d Pin description for PowerSO-20 ) s t( o r P PIN NUMBER vs SALES TYPE (LNBP) SYMBOL NAME FUNCTION 1 e t le 1 1 20CR 20PD 10SP 11SP 12SP 13SP 14SP 15SP 16SP VCC1 15V to 27V supply. It is Supply input automatically selected 1 when VOUT= 13 or 14V VCC2 22V to 27V supply. It is Supply input automatically selected 2 when VOUT= 18 or 19V LNBA See truth table voltage and port selection. In stand-by mode this port Output port is powered by the MI pin via the internal bypass switch s b O so 2 b O - 1 1 1 2 3 2 2 2 2 2 2 2 3 4 3 3 3 3 3 3 3 Output voltage Logic control input: see selection:13 truth table or 18V (typ) 4 5 4 4 4 4 4 4 4 ) s ( ct u d o r P e t e l o VSEL 1 EN Port enable Logic control input: see truth table 5 6 5 5 5 5 5 5 5 OSEL Port selection Logic control input: see truth table 7 7 9 NA NA NA NA NA NA Ground Circuit ground. It is internally connected to the die frame 8 1 10 11 20 6 6 6 6 6 6 6 GND 4/25 LNBK20 Table 1. Pin configuration Pin description for PowerSO-20 PIN NUMBER vs SALES TYPE (LNBP) SYMBOL NAME FUNCTION 20CR 20PD 10SP 11SP 12SP 13SP 14SP 15SP 16SP 22KHz tone Logic control input: see enable truth table ENT 9 13 7 7 7 7 7 7 7 External capacitor Timing capacitor used by the dynamic overload protection. Typical application is 4.7µF for a 1200ms cycle 10 14 8 8 8 8 8 8 8 EXTM External modulator External modulation input. Needs DC decoupling to the AC source. if not used, can be left open. 11 15 NA NA NA 9 NA 9 9 LLC Line length compens. (1V typ) Logic control input: see truth table 12 16 NA NA 9 NA 9 Over load flag Logic output (open collector). Normally in HIGH IMPEDANCE, goes LOW when current or thermal overload occurs 13 17 NA 9 NA NA CEXT OLF MI LNBB e t le 10 10 10 NA c u d o r P ) s t( NA In stand-by mode, the voltage on MI is routed Master input to LNBA pin. Can be left open if bypass function is not needed 14 18 NA 10 10 10 NA NA NA See truth tables for Output port voltage and port selection o s b O - 15 19 10 NA NA NA NA NA NA ) s ( ct u d o r P e t e l o s b O 5/25 Pin configuration Table 2. LNBK20 Pin description for SO-20 PIN N° SYMBOL NAME 1 LLC Line Length Compens. (1V typ) 2 OLF Over Load Flag 3 MI Master Input In stand-by mode, the voltage on MI is routed to LNBA pin. Can be left open if bypass function is not needed 4 LNBB Output Port See truth tables for voltage and port selection 5, 6, 15, 16 GND Ground 7, 13 N.C. Not Connected 8 VCC1 Supply Input 1 15V to 27V supply. It is automatically selected when VOUT = 13 or 14V 9 VCC2 Supply Input 2 22V to 27V supply. It is automatically selected when VOUT = 18 or 19V 10 LNBA Output Port 11 VSEL Output Voltage Selection: 13 or 18V (typ) Logic control input: see truth table 12 EN Port Enable Logic control input: see truth table 14 OSEL Port Selection 18 ENT 22KHz Tone Enable 19 CEXT External Capacitor 20 EXTM External Modulator u d o ) s ( ct r P e t e l o s b O 6/25 FUNCTION Logic control input: see truth table Logic output (open collector). Normally in HIGH IMPEDANCE, goes LOW when current or thermal overload occurs Circuit Ground. It is internally connected to the die frame c u d ) s t( See truth table voltage and port selection. In stand-by mode this port is powered by the MI pin via the internal Bypass Switch e t le o r P o s b O - Logic control input: see truth table Logic control input: see truth table Timing Capacitor used by the Dynamic Overload protection. Typical application is 4.7µF for a 1200ms cycle External Modulation Input. Needs DC decoupling to the AC source. if not used, can be left open. LNBK20 Maximum ratings 3 Maximum ratings Table 3. Absolute maximum ratings Symbol Parameter VI DC Input voltage (VCC1, VCC2, MI) VO Output voltage IO Output current (LNBA, LNBB) VI Logic input voltage (ENT, EN OSEL, VSEL, LLC) Value Unit 28 V -0.3 to 28 V Internally Limited mA -0.5 to 7 V ISW Bypass switch current 900 mA PD Power dissipation at Tcase < 85°C 14 W Tstg Storage temperature range -40 to +150 °C Top Operating junction temperature range -40 to +125 °C c u d ) s t( Note: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied Table 4. Thermal data Symbol RthJC Table 5. Parameter CONTROL I/O PIN NAME OUT OLF IN ENT o r P e IN IN t e l o EN o s b O - SO-20 Unit 15 °C/W L H IOUT > IOMAX or Tj > 150°C IOUT < IOMAX 22KHz tone OFF 22KHz tone ON EN See Table Below See Table Below OSEL See Table Below See Table Below VSEL See Table Below See Table Below LLC See Table Below See Table Below (s) ct du o r P 2 Logic Controls Truth Table IN OSEL VSEL LLCO VLNBA VLNBB X X X VMI - 0.4V (typ.) Disabled L L L 13V (typ.) Disabled H L H L 18V (typ.) Disabled H L L H 14V (typ.) Disabled H L H H 19V (typ.) Disabled H H L L Disabled 13V (typ.) H H H L Disabled 18V (typ.) H H L H Disabled 14V (typ.) H H H H Disabled 19V (typ.) L bs H Note: e t le Thermal resistance junction-case IN O PowerSO-20 All logic input pins have internal pull-down resistor (typ. = 250KΩ) 7/25 Block diagram LNBK20 4 Block diagram Figure 2. Block diagram c u d e t le ) s ( ct u d o r P e t e l o s b O 8/25 o s b O - o r P ) s t( LNBK20 Electrical characteristics 5 Electrical characteristics Table 6. Electrical characteristics for LNBK Series (TJ = 0 to 85°C, CI = 0.22µF, CO = 0.1µF, EN=H, ENT=L, LLC=L, VIN1=16V, VIN2=23V IOUT=50mA, unless otherwise specified.) Symbol Parameter Test conditions Min. Max. Unit IO = 400 mA, ENT=H, VSEL=L, LLC=L 15 27 V IO = 400 mA, ENT=H, VSEL=L, LLC=H 16 27 V IO = 400 mA, ENT=H, VSEL=L, LLC=L 22 27 V IO = 400 mA, VSEL=L, LLC=H 23 27 V IO = 400 mA, VSEL=L, LLC=L 17.3 18.7 V VIN1 VCC1 Supply voltage VIN2 VCC2 Supply voltage VO1 Output voltage VO2 Output voltage ∆VO Line regulation ∆VO Load regulation VIN1=VIN2=22V, VOUT=13 or 18V IO = 0 to 3A SVR Supply voltage rejection VIN1 = VIN2 = 23 ± 0.5Vac, fac = 120 Hz, IMAX Output current limiting tOFF Dynamic overload protection OFF time Output Shorted, CEXT = 4.7µF tON Dynamic overload protection ON time Output Shorted, CEXT = 4.7µF fTONE Tone frequency ENT=H ATONE Tone amplitude ENT=H DTONE Tone duty cycle Typ. IO = 400 mA, ENT=H, VSEL=L, LLC=H 18 IO = 400 mA, VSEL=L, LLC=L 19 12.5 13 IO = 400 mA, ENT=H, VSEL=L, LLC=H 14 VIN1=15 to 18V, VOUT=13V 5 VIN2=22 to 25V, VOUT=18V 5 65 400 so (s) 13.5 V ) s t( V 50 mV 50 mV 150 mV uc d o r P e let b O - V 45 500 dB 600 mA 1100 ms tOFF/15 ms 20 22 24 KHz 0.55 0.72 0.9 VPP ENT=H 40 50 60 % Tone rise and fall time ENT=H 5 10 15 µs External modulation gain ∆VOUT/∆VEXTM, f = 10Hz to 40KHz VEXTM External modulation input voltage AC Coupling 400 mVPP ZEXTM External modulation impedance f = 10Hz to 40KHz 400 VSW Bypass switch voltage drop (MI to LNBA) EN=L, ISW=300mA, VCC2-VMI=4V 0.35 0.6 V VOL Overload flag pin logic LOW IOL=8mA 0.28 0.5 V IOZ Overload flag pin OFF state leakage current VOH = 6V 10 µA VIL Control input pin logic LOW 0.8 V tr, tf GEXTM u d o r P e t e l o s b O ct 5 Ω 9/25 Electrical characteristics Table 6. LNBK20 Electrical characteristics for LNBK Series (TJ = 0 to 85°C, CI = 0.22µF, CO = 0.1µF, EN=H, ENT=L, LLC=L, VIN1=16V, VIN2=23V IOUT=50mA, unless otherwise specified.) Symbol Parameter VIH Control input pin logic HIGH IIH Control pins input current ICC Supply current IOBK Output backward current TSHDN Test conditions Min. Typ. Max. 2.5 V VIH = 5V 20 Output Disabled (EN=L) 0.3 1 mA ENT=H, IOUT=500mA 3.1 6 mA EN=L, VLNBA = VLNBB = 18V VIN1 = VIN2 = 22V or floating 0.2 3 mA Temperature shutdown threshold µA 150 c u d e t le ) s ( ct u d o r P e t e l o s b O 10/25 Unit o s b O - o r P °C ) s t( LNBK20 Typical characteristics 6 Typical characteristics Figure 3. (unless otherwise specified TJ = 25°C) Output voltage vs output current Figure 4. Figure 5. Tone fall time vs temperature Tone duty cycle vs temperature c u d Figure 6. Tone frequency vs temperature e t le ) s ( ct Figure 7. r P e u d o Tone rise time vs temperature ) s t( o r P o s b O Figure 8. Tone amplitude vs temperature t e l o s b O 11/25 Typical characteristics Figure 9. LNBK20 S.V.R. vs Frequency Figure 10. External modulation vs temperature Figure 11. Bypass switch drop vs output current c u d e t le ) s ( ct u d o r P e Figure 13. Bypass switch drop vs output current t e l o s b O 12/25 ) s t( Figure 12. LNBA External modulation gain vs frequency o r P o s b O - Figure 14. Overload flag pin logic low vs flag current LNBK20 Typical characteristics Figure 15. Supply current vs temperature Figure 16. Supply current vs temperature Figure 17. Dynamic overload protection (ISC vs time) Figure 18. Tone enable c u d e t le u d o ) s ( ct Figure 19. Tone disable ) s t( o r P o s b O - Figure 20. 22KHz Tone r P e t e l o s b O 13/25 Typical characteristics LNBK20 Figure 21. Enable time Figure 22. Disable time Figure 23. 18V to 13V Change Figure 24. 18V to 13V Change c u d e t le ) s ( ct u d o r P e t e l o s b O 14/25 o s b O - o r P ) s t( LNBK20 7 Typical application schematics Typical application schematics Figure 25. Two antenna ports receiver MCU+V 17V 24V 10uF C2 AUX DATA ANT CONNECTORS 11 EXTM VCC1 VCC2 R1 13 47K 4 9 5 7 12 LNBA LNBB MI OLF VSEL ENT EN OSEL LLC CEXT 1 2 JA 3 15 14 JB TUNER 10 4.7µF C1 + GND C3 2x 0.1µF LNBP20CR Vcc C4 C5 C6 8 2x 47nF I/Os I/Os c u d MCU e t le ) s t( o r P Figure 26. Single antenna receiver with master receiver port o s b O 17V MCU+V 10uF C2 11 AUX DATA (s) EXTM R1 13 47K ct OLF u d o r P e s b O t e l o Vcc 4 9 5 7 12 VSEL ENT EN OSEL LLC VCC1 VCC2 LNBA LNBB MI CEXT 1 2 ANT 3 15 14 MASTER 10 4.7µF C1 + GND 24V TUNER C3 C4 C5 47nF 8 2x 0.1µF LNBP20CR I/Os I/Os MCU 15/25 Typical application schematics LNBK20 Figure 27. Using serial bus to save MPU I/os 17V 24V MCU+V ANT CONNECTORS C2 R1 11 AUX DATA VCC1 VCC2 EXTM 47K 10uF 13 1 2 3 15 STR D CLK OE Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 QS QS 4 5 6 7 14 13 12 11 LNBA LNBB MI OLF 4 9 5 7 12 VSEL CEXT ENT EN OSEL LLC 1 2 JA 3 15 14 JB TUNER 10 4.7µF C1 + GND C3 C4 C5 C6 8 2x 0.1µF LNBP20CR 2x 47nF 9 10 4094 SERIAL BUS c u d MCU+V I/Os Vcc MCU e t le ) s t( o r P o s b O - Figure 28. Two antenna ports receiver - low cost solution ) s ( ct 17V VCC1 VCC2 o r P e t e l o bs O 4 7 5 9 VSEL ENT EN OSEL du LNBA LNBB 24V ANT CONNECTORS 1 2 JA 3 10 JB CEXT 8 TUNER 4.7µF GND C1 + C3 C4 C5 C6 6 2x 0.1µF LNBP10SP 2x 47nF MCU+V Vcc I/Os I/Os MCU 16/25 LNBK20 Typical application schematics Figure 29. Connecting together VCC1 and VCC2 24V ANT CONNECTORS VCC1 VCC2 LNBA LNBB 1 2 JA 3 10 JB 4 7 5 9 CEXT VSEL ENT EN OSEL 8 TUNER C1 + 4.7µF GND C4 C5 C6 6 0.1µF LNBP10SP 2x 47nF MCU+V Vcc I/Os I/Os c u d MCU e t le ) s t( o r P Figure 30. Single antenna receiver with master receiver port - low cost solution o s b O - 17V C2 9 AUX DATA EXTM 10µF (t s) VCC1 VCC2 c u d 1 2 24V ANT 3 LNBA MI o r P e 4 7 5 t e l o MCU+V s b O Vcc VSEL ENT CEXT 10 MASTER TUNER 8 4.7µF C1 + EN C3 6 C4 C5 47nF GND 2x 0.1µF LNBP13SP I/Os I/Os MCU 17/25 Typical application schematics LNBK20 Figure 31. Single antenna receiver with overload diagnostic 17V 24V MCU+V C2 9 AUX DATA EXTM 10µF R1 10 47K 4 7 5 VCC1 VCC2 LNBA 1 2 3 ANT OLF VSEL ENT EN CEXT 8 TUNER 4.7µF C1 + GND C4 C5 47nF 2x 0.1µF LNBP15SP Vcc C3 6 I/Os I/Os MCU c u d e t le ) s ( ct u d o r P e t e l o s b O 18/25 o s b O - o r P ) s t( LNBK20 8 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. c u d e t le ) s ( ct ) s t( o r P o s b O - u d o r P e t e l o s b O 19/25 Package mechanical data LNBK20 PowerSO-20 MECHANICAL DATA mm. DIM. A a1 a2 a3 b c D (1) E e e3 E1 (1) E2 E3 G H h L N S T MIN. TYP inch MAX. 3.60 0.30 3.30 0.10 0.53 0.32 16.00 14.50 0.10 0 0.40 0.23 15.80 13.90 MIN. 0.80 0° 0.1417 0.0118 0.1299 0.0039 0.0209 0.0013 0.630 0.5710 0 0.0157 0.0090 0.6220 0.5472 0.0500 0.4500 11.10 2.90 6.2 0.10 15.9 1.10 1.10 10° 8° 5.8 0 15.5 MAX. 0.0039 1.27 11.43 10.90 TYP. 0.4291 0.2283 0.0000 0.6102 0.0314 e t le 10.0 0° c u d o r P 0.4370 0.1141 0.2441 0.0039 0.6260 0.0433 0.0433 10° 8° ) s t( 0.3937 o s b O - (1) “D and E1” do not include mold flash or protusions - Mold flash or protusions shall not exceed 0.15mm (0.006”) ) s ( ct u d o r P e t e l o s b O 0056635/I 20/25 LNBK20 Package mechanical data SO-20 MECHANICAL DATA mm. DIM. MIN. TYP inch MAX. MIN. TYP. MAX. A 2.35 2.65 0.093 0.104 A1 0.1 0.30 0.004 0.012 B 0.33 0.51 0.013 0.020 C 0.23 0.32 0.009 0.013 D 12.60 13.00 0.496 0.512 E 7.4 7.6 0.291 0.299 e 1.27 0.050 H 10.00 10.65 0.394 h 0.25 0.75 0.010 L 0.4 1.27 0.016 k 0° 8° ddd 0.100 ) s ( ct o s b O - e t le 0° Pr od uc ) s t( 0.419 0.030 0.050 8° 0.004 u d o r P e t e l o s b O 0016022D 21/25 Package mechanical data LNBK20 Tape & Reel PowerSO-20 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. 330 13.2 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 0.504 0.519 30.4 1.197 Ao 15.1 15.3 0.594 0.602 Bo 16.5 16.7 0.650 0.658 Ko 3.8 4.0 0.149 0.157 Po 3.9 4.1 0.153 P 23.9 24.1 0.941 W 23.7 24.3 0.933 r P e t le ) s ( ct u d o r P e t e l o s b O 22/25 MAX. o s b O - ) s t( 0.161 od uc 0.949 0.957 LNBK20 Package mechanical data Tape & Reel SO-20 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 330 13.2 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 0.504 0.519 30.4 1.197 Ao 10.8 11 0.425 0.433 Bo 13.2 13.4 0.520 Ko 3.1 3.3 0.122 Po 3.9 4.1 0.153 ) s t( P 11.9 12.1 0.468 0.528 P e let ro ) s ( ct c u d 0.130 0.161 0.476 o s b O - u d o r P e t e l o s b O 23/25 Revision history LNBK20 9 Revision history Table 7. Revision history Date Revision Changes 20-Sep-2006 7 Order Codes has been updated and new template. 14-Feb-2007 8 Order Codes has been updated. c u d e t le ) s ( ct u d o r P e t e l o s b O 24/25 o s b O - o r P ) s t( LNBK20 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. 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