M24512-RMN6TP

M24512-W M24512-R M24512-DF 512-Kbit serial I²C bus EEPROM Datasheet - production data Features • Compatible with all I2C bus modes: – 1 MHz – 400 kHz – 100 kHz TSSOP8 (DW) 169 mil width SO8 (MN) 150 mil width • Memory array: – 512 Kbit (64 Kbyte) of EEPROM – Page size: 128 byte – Additional Write lockable page (M24512-D order codes) • Single supply voltage and high speed: – 1 MHz clock from 1.7 V to 5.5 V UFDFPN8 (MC) DFN8 - 2x3 mm • Write: – Byte Write within 5 ms – Page Write within 5 ms • Operating temperature range: – from -40 °C up to +85 °C • Random and sequential Read modes WLCSP (CS) • Write protect of the whole memory array • Enhanced ESD/Latch-Up protection • More than 4 million Write cycles • More than 200-years data retention Packages • SO8 ECOPACK2® WLCSP (CU) • TSSOP8 ECOPACK2® • UFDFPN8 ECOPACK2® • WLCSP ECOPACK2® • Unsawn wafer (each die is tested) Unsawn wafer September 2018 This is information on a product in full production. DS6520 Rev 30 1/47 www.st.com Contents M24512-W M24512-R M24512-DF Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 Signal description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 Serial Clock (SCL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 Serial Data (SDA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 Chip Enable (E2, E1, E0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 Write Control (WC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.5 VSS (ground) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.6 Supply voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.6.1 Operating supply voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.6.2 Power-up conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.6.3 Device reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.6.4 Power-down conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3 Memory organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4 Device operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5 4.1 Start condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.2 Stop condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.3 Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.4 Acknowledge bit (ACK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.5 Device addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.1 5.2 Write operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.1.1 Byte Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.1.2 Page Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.1.3 Write Identification Page (M24512-D only) . . . . . . . . . . . . . . . . . . . . . . 17 5.1.4 Lock Identification Page (M24512-D only) . . . . . . . . . . . . . . . . . . . . . . . 17 5.1.5 ECC (Error Correction Code) and Write cycling . . . . . . . . . . . . . . . . . . 17 5.1.6 Minimizing Write delays by polling on ACK . . . . . . . . . . . . . . . . . . . . . . 18 Read operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.2.1 2/47 Random Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 DS6520 Rev 30 M24512-W M24512-R M24512-DF Contents 5.2.2 Current Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.2.3 Sequential Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.3 Read Identification Page (M24512-D only) . . . . . . . . . . . . . . . . . . . . . . . 20 5.4 Read the lock status (M24512-D only) . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6 Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 8 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 9 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 9.1 UFDFPN8 (DFN8) package information . . . . . . . . . . . . . . . . . . . . . . . . . . 33 9.2 TSSOP8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 9.3 SO8N package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 9.4 WLCSP8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 9.5 WLCSP8 ultra thin package information . . . . . . . . . . . . . . . . . . . . . . . . . 40 10 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 DS6520 Rev 30 3/47 3 List of tables M24512-W M24512-R M24512-DF List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. 4/47 Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Signals vs. bump position . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Device select code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Most significant address byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Least significant address byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Operating conditions (voltage range W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Operating conditions (voltage range R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Operating conditions (voltage range F) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Input parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Cycling performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Memory cell data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 DC characteristics (M24512-W, device grade 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 DC characteristics (M24512-R device grade 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 DC characteristics (M24512-DF, device grade 6). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 400 kHz AC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 1 MHz AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 UFDFPN8 – 2x3 mm, 0.55 thickness, ultra thin fine pitch dual flat package, no lead - package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 TSSOP8 – 3 x 4.4 mm, 0.65 mm pitch, 8-lead thin shrink small outline, package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 SO8N – 3.9x4.9 mm, 8-lead plastic small outline, 150 mils body width, package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 WLCSP - 8 bumps, 1.271 x 1.937 mm, 0.5 mm pitch wafer level chip scale package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 WLCSP - 8 balls, 1.289x1.955 mm, 1 mm pitch, wafer level chip scale mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Ordering information scheme (unsawn wafer) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 DS6520 Rev 30 M24512-W M24512-R M24512-DF List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 8-pin package connections, top view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 WLCSP connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Chip enable inputs connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 I2C bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Write mode sequences with WC = 0 (data write enabled) . . . . . . . . . . . . . . . . . . . . . . . . . 15 Write mode sequences with WC = 1 (data write inhibited) . . . . . . . . . . . . . . . . . . . . . . . . . 16 Write cycle polling flowchart using ACK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Read mode sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 13. Maximum Rbus value versus bus parasitic capacitance Cbus) for an I2C bus at maximum frequency fC = 1MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 UFDFPN8 – 2x3 mm, 0.55 thickness, ultra thin fine pitch dual flat package, no lead - package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 TSSOP8 – 3x4.4 mm, 0.65 mm pitch, 8-lead thin shrink small outline, package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 SO8N – 3.9x4.9 mm, 8-lead plastic small outline, 150 mils body width, package outline . 36 SO8N – 3.9x4.9 mm, 8-lead plastic small outline, 150 mils body width, package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 WLCSP - 8 bumps, 1.271 x 1.937 mm, 0.5 mm pitch wafer level chip scale package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 WLCSP - 8 bumps, 1.271 x 1.937 mm, 0.5 mm pitch wafer level chip scale package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 WLCSP - 8 balls, 1.289x1.955 mm, 1 mm pitch, wafer level chip scale package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 WLCSP - 8 balls, 1.289x1.955 mm, 1 mm pitch, wafer level chip scale recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Maximum Rbus value versus bus parasitic capacitance (Cbus) for an I2C bus at maximum frequency fC = 400 kHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 DS6520 Rev 30 5/47 5 Description 1 M24512-W M24512-R M24512-DF Description The M24512 is a 512-Kbit I2C-compatible EEPROM (Electrically Erasable PROgrammable Memory) organized as 64 K × 8 bits. The M24512-W can operate with a supply voltage from 2.5 V to 5.5 V, the M24512-R can operate with a supply voltage from 1.8 V to 5.5 V and the M24512-DF can operate with a supply voltage from 1.7 V to 5.5 V. All these devices operate with a clock frequency of 1 MHz (or less) over an ambient temperature range of -40 °C / +85 °C. The M24512-D offers an additional page, named the Identification Page (128 byte). The Identification Page can be used to store sensitive application parameters which can be (later) permanently locked in Read-only mode. Figure 1. Logic diagram 9&&  (( 6'$ 0[[[ 6&/ :& 966 $,I Table 1. Signal names Signal name Function Direction E2, E1, E0 Chip Enable Input SDA Serial Data I/O SCL Serial Clock Input WC Write Control Input VCC Supply voltage - VSS Ground - Figure 2. 8-pin package connections, top view (   9&& (   :& (   6&/ 966   6'$ $,I 6/47 DS6520 Rev 30 M24512-W M24512-R M24512-DF Description Figure 3. WLCSP connections  $ 6'$ 9&& % & 9&& 6&/ ( ( & ' ( ( $ % :& ( 966 6'$ 6&/ :& ' (  ( 966 ( %XPSVLGH ERWWRPYLHZ 0DUNLQJVLGH WRSYLHZ 069 Table 2. Signals vs. bump position Position A B C D E 1 SDA - E2 - VSS 2 - SCL - E1 - 3 VCC - WC - E0 DS6520 Rev 30 7/47 46 Signal description M24512-W M24512-R M24512-DF 2 Signal description 2.1 Serial Clock (SCL) The signal applied on the SCL input is used to strobe the data available on SDA(in) and to output the data on SDA(out). 2.2 Serial Data (SDA) SDA is an input/output used to transfer data in or data out of the device. SDA(out) is an open drain output that may be wire-OR’ed with other open drain or open collector signals on the bus. A pull-up resistor must be connected from Serial Data (SDA) to VCC (Figure 12 indicates how to calculate the value of the pull-up resistor). 2.3 Chip Enable (E2, E1, E0) (E2,E1,E0) input signals are used to set the value that is to be looked for on the three least significant bits (b3, b2, b1) of the 7-bit device select code (see Table 3). These inputs must be tied to VCC or VSS, as shown in Figure 4. When not connected (left floating), these inputs are read as low (0). Figure 4. Chip enable inputs connection 9&& 9&& 0[[[ 0[[[ (L (L 966 2.4 966 $L Write Control (WC) This input signal is useful for protecting the entire contents of the memory from inadvertent write operations. Write operations are disabled to the entire memory array when Write Control (WC) is driven high. Write operations are enabled when Write Control (WC) is either driven low or left floating. When Write Control (WC) is driven high, device select and address bytes are acknowledged, Data bytes are not acknowledged. 2.5 VSS (ground) VSS is the reference for the VCC supply voltage. 8/47 DS6520 Rev 30 M24512-W M24512-R M24512-DF Signal description 2.6 Supply voltage (VCC) 2.6.1 Operating supply voltage (VCC) Prior to selecting the memory and issuing instructions to it, a valid and stable VCC voltage within the specified [VCC(min), VCC(max)] range must be applied (see Operating conditions in Section 8: DC and AC parameters). In order to secure a stable DC supply voltage, it is recommended to decouple the VCC line with a suitable capacitor (usually of the order of 10 nF to 100 nF) close to the VCC/VSS package pins. This voltage must remain stable and valid until the end of the transmission of the instruction and, for a write instruction, until the completion of the internal write cycle (tW). 2.6.2 Power-up conditions The VCC voltage has to rise continuously from 0 V up to the minimum VCC operating voltage (see Operating conditions in Section 8: DC and AC parameters). 2.6.3 Device reset In order to prevent inadvertent write operations during power-up, a power-on-reset (POR) circuit is included. At power-up, the device does not respond to any instruction until VCC has reached the internal reset threshold voltage. This threshold is lower than the minimum VCC operating voltage (see Operating conditions in Section 8: DC and AC parameters). When VCC passes over the POR threshold, the device is reset and enters the Standby Power mode; however, the device must not be accessed until VCC reaches a valid and stable DC voltage within the specified [VCC(min), VCC(max)] range (see Operating conditions in Section 8: DC and AC parameters). In a similar way, during power-down (continuous decrease in VCC), the device must not be accessed when VCC drops below VCC(min). When VCC drops below the power-on-reset threshold voltage, the device stops responding to any instruction sent to it. 2.6.4 Power-down conditions During power-down (continuous decrease in VCC), the device must be in the Standby Power mode (mode reached after decoding a Stop condition, assuming that there is no internal write cycle in progress). DS6520 Rev 30 9/47 46 Memory organization 3 M24512-W M24512-R M24512-DF Memory organization The memory is organized as shown below. Figure 5. Block diagram :& ( ( ( +LJKYROWDJH JHQHUDWRU &RQWUROORJLF 6&/ 6'$ ,2VKLIWUHJLVWHU 'DWD UHJLVWHU ϭy>Ϯ ƚy,ϭy,Ϯ ƚ,> ƚ>, ^> ƚ>> ƚy>ϭy>Ϯ ^/Ŷ ƚ,> ƚy,ϭy,Ϯ ^ /ŶƉƵƚ ^ ƚy, ŚĂŶŐĞ ƚ>y ƚ,, ƚ,> t ƚ,t, ƚt>> ^ƚŽƉ ĐŽŶĚŝƚŝŽŶ ^ƚĂƌƚ ĐŽŶĚŝƚŝŽŶ ^> ^/Ŷ ƚt ƚ,, ƚ,> tƌŝƚĞĐLJĐůĞ ƚ,> ^> ƚ>Ys ^KƵƚ ƚ>Yy ĂƚĂǀĂůŝĚ ƚY>ϭY>Ϯ ĂƚĂǀĂůŝĚ /ϬϬϳϵϱŝ 32/47 DS6520 Rev 30 M24512-W M24512-R M24512-DF 9 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 9.1 UFDFPN8 (DFN8) package information Figure 15. UFDFPN8 – 2x3 mm, 0.55 thickness, ultra thin fine pitch dual flat package, no lead - package outline 3LQ,'PDUNLQJ  Ğ ď >ϭ >ϯ WŝŶϭ  Ϯ < >  Ϯ ĞĞĞ ϭ =:B0(H9 1. Drawing is not to scale. 2. The central pad (the area E2 by D2 in the above illustration) must be either connected to VSS or left floating (not connected) in the end application. Table 19. UFDFPN8 – 2x3 mm, 0.55 thickness, ultra thin fine pitch dual flat package, no lead - package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A 0.450 0.550 0.600 0.0177 0.0217 0.0236 A1 0.000 0.020 0.050 0.0000 0.0008 0.0020 b 0.200 0.250 0.300 0.0079 0.0098 0.0118 D 1.900 2.000 2.100 0.0748 0.0787 0.0827 D2 1.200 - 1.600 0.0472 - 0.0630 E 2.900 3.000 3.100 0.1142 0.1181 0.1220 E2 1.200 - 1.600 0.0472 - 0.0630 e - 0.500 - - 0.0197 - K 0.300 - - 0.0118 - - DS6520 Rev 30 33/47 46 Package information M24512-W M24512-R M24512-DF Table 19. UFDFPN8 – 2x3 mm, 0.55 thickness, ultra thin fine pitch dual flat package, no lead - package mechanical data (continued) inches(1) millimeters Symbol Min Typ Max Min Typ Max L 0.300 - 0.500 0.0118 - 0.0197 L1 - - 0.150 - - 0.0059 L3 0.300 - - 0.0118 - - 0.080 - - 0.0031 - - eee (2) 1. Values in inches are converted from mm and rounded to four decimal digits. 2. Applied for exposed die paddle and terminals. Exclude embedding part of exposed die paddle from measuring. 9.2 TSSOP8 package information Figure 16.TSSOP8 – 3x4.4 mm, 0.65 mm pitch, 8-lead thin shrink small outline, package outline  ϴ ϱ Đ ϭ ϭ  ϰ ɲ > ϭ W Ϯ  >ϭ ď Ğ 76623$0B9 1. Drawing is not to scale. Table 20. TSSOP8 – 3 x 4.4 mm, 0.65 mm pitch, 8-lead thin shrink small outline, package mechanical data inches(1) millimeters Symbol 34/47 Min. Typ. Max. Min. Typ. Max. A - - 1.200 - - 0.0472 A1 0.050 - 0.150 0.0020 - 0.0059 A2 0.800 1.000 1.050 0.0315 0.0394 0.0413 b 0.190 - 0.300 0.0075 - 0.0118 c 0.090 - 0.200 0.0035 - 0.0079 DS6520 Rev 30 M24512-W M24512-R M24512-DF Package information Table 20. TSSOP8 – 3 x 4.4 mm, 0.65 mm pitch, 8-lead thin shrink small outline, package mechanical data (continued) inches(1) millimeters Symbol Min. Typ. Max. Min. Typ. Max. CP - - 0.100 - - 0.0039 D 2.900 3.000 3.100 0.1142 0.1181 0.1220 e - 0.650 - - 0.0256 - E 6.200 6.400 6.600 0.2441 0.2520 0.2598 E1 4.300 4.400 4.500 0.1693 0.1732 0.1772 L 0.450 0.600 0.750 0.0177 0.0236 0.0295 L1 - 1.000 - - 0.0394 - α 0° - 8° 0° - 8° 1. Values in inches are converted from mm and rounded to four decimal digits. DS6520 Rev 30 35/47 46 Package information 9.3 M24512-W M24512-R M24512-DF SO8N package information Figure 17. SO8N – 3.9x4.9 mm, 8-lead plastic small outline, 150 mils body width, package outline HXƒ ! ! C CCC B E PP *$8*(3/$1( $ K  % %  ! , , 62$B9 1. Drawing is not to scale. Table 21. SO8N – 3.9x4.9 mm, 8-lead plastic small outline, 150 mils body width, package mechanical data Symbol inches(1) millimeters Min. Typ. Max. Min. Typ. Max. A - - 1.750 - - 0.0689 A1 0.100 - 0.250 0.0039 - 0.0098 A2 1.250 - - 0.0492 - - b 0.280 - 0.480 0.0110 - 0.0189 c 0.170 - 0.230 0.0067 - 0.0091 D 4.800 4.900 5.000 0.1890 0.1929 0.1969 E 5.800 6.000 6.200 0.2283 0.2362 0.2441 E1 3.800 3.900 4.000 0.1496 0.1535 0.1575 e - 1.270 - - 0.0500 - h 0.250 - 0.500 0.0098 - 0.0197 k 0° - 8° 0° - 8° L 0.400 - 1.270 0.0157 - 0.0500 L1 - 1.040 - - 0.0409 - ccc - - 0.100 - - 0.0039 1. Values in inches are converted from mm and rounded to four decimal digits. 36/47 DS6520 Rev 30 M24512-W M24512-R M24512-DF Package information Figure 18. SO8N – 3.9x4.9 mm, 8-lead plastic small outline, 150 mils body width, package recommended footprint   [  2B621B)3B9 1. Dimensions are expressed in millimeters. DS6520 Rev 30 37/47 46 Package information 9.4 M24512-W M24512-R M24512-DF WLCSP8 package information Figure 19. WLCSP - 8 bumps, 1.271 x 1.937 mm, 0.5 mm pitch wafer level chip scale package outline Ğϭ ďďď   y KƌŝĞŶƚĂƚŝŽŶ ƌĞĨĞƌĞŶĐĞ z KƌŝĞŶƚĂƚŝŽŶ ƌĞĨĞƌĞŶĐĞ Ğϯ ĞϮ ĞƚĂŝů Ğ  ' ĂĂĂ tĂĨĞƌďĂĐŬƐŝĚĞ  Ϯ ;ϰyͿ & ƵŵƉƐŝĚĞ ^ŝĚĞǀŝĞǁ ƵŵƉ ĞƚĂŝů ƌŽƚĂƚĞĚďLJϵϬΣ ϭ ĞĞĞ   ^ĞĂƚŝŶŐƉůĂŶĞ ď ;ϴyͿ T ĐĐĐD  y z TĚĚĚD  &IB0(B9 1. Drawing is not to scale. Table 22. WLCSP - 8 bumps, 1.271 x 1.937 mm, 0.5 mm pitch wafer level chip scale package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A 0.500 0.540 0.580 0.0197 0.0213 0.0228 A1 - 0.190 - - 0.0075 - A2 - 0.350 - - 0.0138 - (2) - 0.270 - - 0.0106 - D - 1.271 1.291 - 0.0500 0.0508 E - 1.937 1.957 - 0.0763 0.0770 e - 1.000 - - 0.0394 - e1 - 0.866 - - 0.0341 - e2 - 0.500 - - 0.0197 - e3 - 0.433 - - 0.0170 - F - 0.202 - - 0.0080 - G - 0.469 - - 0.0185 - aaa - - 0.110 - - 0.0043 bbb - - 0.110 - - 0.0043 ccc - - 0.110 - - 0.0043 b 38/47 DS6520 Rev 30 M24512-W M24512-R M24512-DF Package information Table 22. WLCSP - 8 bumps, 1.271 x 1.937 mm, 0.5 mm pitch wafer level chip scale package mechanical data (continued) ddd - - 0.060 - - 0.0024 eee - - 0.060 - - 0.0024 1. Values in inches are converted from mm and rounded to 4 decimal digits. 2. Dimension is measured at the maximum bump diameter parallel to primary datum Z. Figure 20. WLCSP - 8 bumps, 1.271 x 1.937 mm, 0.5 mm pitch wafer level chip scale package recommended footprint     EXPSV[‘ &IB)3B9 1. Dimensions are expressed in millimeters. DS6520 Rev 30 39/47 46 Package information 9.5 M24512-W M24512-R M24512-DF WLCSP8 ultra thin package information Figure 21. WLCSP - 8 balls, 1.289x1.955 mm, 1 mm pitch, wafer level chip scale package outline EEE = DDD ' ; H '(7$,/$ %$&.6,'(3527(&7,21 ; < ( H H H * E DDD 2ULHQWDWLRQUHIHUHQFH $ ; $ ) $ $ 7239,(: 6,'(9,(: 2ULHQWDWLRQUHIHUHQFH %277209,(: $ HHH = E FFF GGG 0 0 = = ; < = 6HDWLQJSODQH '(7$,/$ 527$7(' $=B37JB:/&63B0(B9 1. Drawing is not to scale. 2. Dimension is measured at the maximum bump diameter parallel to primary datum Z. 3. Primary datum Z and seating plane are defined by the spherical crowns of the bump. 4. Bump position designation per JESD 95-1, SPP-010. Table 23. WLCSP - 8 balls, 1.289x1.955 mm, 1 mm pitch, wafer level chip scale mechanical data inches(1) millimeters Symbol 40/47 Min Typ Max Min Typ Max A 0.262 0.295 0.328 0.0103 0.0116 0.0129 A1 - 0.095 - - 0.0037 - A2 - 0.175 - - 0.0069 - A3 - 0.025 - - 0.0010 - b - 0.185 - - 0.0073 - D - 1.289 1.309 - 0.0507 0.0515 E - 1.955 1.975 - 0.0770 0.0778 e - 1.000 - - 0.0394 - e1 - 0.866 - - 0.0341 - DS6520 Rev 30 M24512-W M24512-R M24512-DF Package information Table 23. WLCSP - 8 balls, 1.289x1.955 mm, 1 mm pitch, wafer level chip scale mechanical data (continued) inches(1) millimeters Symbol Min Typ Max Min Typ Max e2 - 0.500 - - 0.0197 - e3 - 0.433 - - 0.0170 - F - 0.212 - - 0.0083 - G - 0.478 - - 0.0188 - aaa - 0.11 - - 0.0043 - bbb - 0.11 - - 0.0043 - ccc - 0.11 - - 0.0043 - ddd - 0.06 - - 0.0024 - eee - 0.06 - - 0.0024 - 1. Values in inches are converted from mm and rounded to 4 decimal digits. Figure 22. WLCSP - 8 balls, 1.289x1.955 mm, 1 mm pitch, wafer level chip scale recommended footprint     EXPSV[ $=B37JB:/&63B)3B9 1. Dimensions are expressed in millimeters. DS6520 Rev 30 41/47 46 Ordering information 10 M24512-W M24512-R M24512-DF Ordering information Table 24. Ordering information scheme Example: M24512 -D W MC 6 T P Device type M24 = I2C serial access EEPROM Device function 512 = 512 Kbit (64 x 8 bit) Device family Blank = Without Identification page D = With Identification page Operating voltage W = VCC = 2.5 V to 5.5 V R = VCC = 1.8 V to 5.5 V F = VCC = 1.7 V to 5.5 V Package MN = SO8 (150 mil width)(1) DW = TSSOP8 (169 mil width)(1) MC = UFDFPN8 (DFN8)(1) CS = WLCSP(1) CU = WLCSP ultra-thin Device grade 6 = Industrial: device tested with standard test flow over –40 to 85 °C Option T = Tape and reel packing blank = tube packing Plating technology P or G = ECOPACK2® Process(2) /K = Manufacturing technology code 1. All package are ECOPACK2® (RoHS-compliant and free of brominated, chlorinated and antimony-oxide flame retardants) 2. The process letters apply to WLCSP devices only. The process letters appear on the device package (marking) and on the shipment box. Please contact your nearest ST Sales Office for further information. 42/47 DS6520 Rev 30 /K M24512-W M24512-R M24512-DF Ordering information Table 25. Ordering information scheme (unsawn wafer)(1) Example: M24512 - D F K W 20 I / 90 Device type M24 = I2C serial access EEPROM Device function 512 = 512Kbit (64 K x 8 bit) Device family D = With Identification page Operating voltage F = VCC = 1.7 V to 5.5 V Process K = F8H Delivery form W = Unsawn wafer Wafer thickness 20 = Non-backlapped wafer Wafer testing I = Inkless test Device grade 90 = -40°C to 85°C 1. For all information concerning the M24512 delivered in unsawn wafer, please contact your nearest ST Sales Office. DS6520 Rev 30 43/47 46 Ordering information Note: 44/47 M24512-W M24512-R M24512-DF Parts marked as ES or E or accompanied by an Engineering Sample notification letter are not yet qualified and therefore not approved for use in production. ST is not responsible for any consequences resulting from such use. In no event will ST be liable for the customer using any of these engineering samples in production. ST’s Quality department must be contacted prior to any decision to use these engineering samples to run a qualification activity. DS6520 Rev 30 M24512-W M24512-R M24512-DF 11 Revision history Revision history Table 26.Document revision history Date 31-Jan-2011 Revision 22 Changes Updated Table 7, Table 13, Table 16 and Table 17. Added note (2) to Table 14. Deleted Table 22: Available M24512-W and M24512-R products (package, voltage range, temperature grade) and Table 23: Available M24512-DR products (package, voltage range, temperature grade). – – – – – 01-Mar-2012 23 Deleted reference “M24512-DR” and inserted reference “M24512-DF”. Updated data regarding package UFDFPN8. Updated Section 1: Description. Added Figure 4 and updated title of Figure 3. Updated VESD value in Table 7: Absolute maximum ratings, note (1) under Table 13 and ICC value in Table 14. – Added Table 10: Operating conditions (voltage range F) and Table 15: DC characteristics (voltage range F). – Added values tWLDL and tDHWH in Table 16: 400 kHz AC characteristics and Table 17: 1 MHz AC characteristics. – Replaced Figure 14. 12-Apr-2012 24 Updated Section 1: Description. 25-Jun-2012 25 Datasheet split into: – M24512-125 datasheet for automotive products (range 3), – M24512-W M24512-R M24512-DR M24512-DF for standard products (range 6, this datasheet rev 25). Deleted: – SO8W package – UFDFPN8 (MLP8): MB version package – WLCSP (KA die) dimensions Added: – Reference M24512-DR – Table 12: Cycling performance – Table 13: Memory cell data retention Updated: – Figure 12: Maximum Rbus value versus bus parasitic capacitance (Cbus) for an I2C bus at maximum frequency fC = 400 kHz – Figure 13: Maximum Rbus value versus bus parasitic capacitance Cbus) for an I2C bus at maximum frequency fC = 1MHz 17-Sep-2012 26 Updated Section 5.2.2: Current Address Read. Modified Figure 3: WLCSP connections and Figure : . DS6520 Rev 30 45/47 46 Revision history M24512-W M24512-R M24512-DF Table 26.Document revision history (continued) Date Changes 27 Removed: – Note on Figure 3 – Note 2 on Table 3 Updated: – Note 1 on Table 12 and Table 13 – Table 18 – Figure 11 – Table 20 – titles on Figure and Table 21 – Table 24 – note 1 on Table 21 Added: – Note 2 on Table 12 – Note 4 and 5 on Table 14 – Note 6, 7 and 8 on Table 15 – Note 6, 7 on Table 16 – note 8 on Table 17 – Figure 20 – reference to Engineering sample after Ordering information scheme 28 Added: – Unsawn wafer reference on cover page and Table 25: Ordering information scheme (unsawn wafer) – Note 1 on Table 12 Removed ordering type M24512-DRxxxx from the whole document (device replaced by either M24512-Rxxx or M24512-DFxxx) 22-Mar-2018 29 Added WLCSP8 ultra thin package in cover page, Section 9.5: WLCSP8 ultra thin package information, Table 3: Device select code Updated Figure 3: WLCSP connections, Table 10: AC measurement conditions, Table 24: Ordering information scheme 21-Sep-2018 30 Updated Figure 19: WLCSP - 8 bumps, 1.271 x 1.937 mm, 0.5 mm pitch wafer level chip scale package outline and Figure 21: WLCSP - 8 balls, 1.289x1.955 mm, 1 mm pitch, wafer level chip scale package outline 16-Feb-2015 27-May-2015 46/47 Revision DS6520 Rev 30 M24512-W M24512-R M24512-DF IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2018 STMicroelectronics – All rights reserved DS6520 Rev 30 47/47 47