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M27V160-100XF1

M27V160-100XF1

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    FDIP42W_54.86X14.9MM

  • 描述:

    IC EPROM UV 16MBIT 100NS 42CDIP

  • 数据手册
  • 价格&库存
M27V160-100XF1 数据手册
M27V160 16 Mbit (2Mb x8 or 1Mb x16) Low Voltage UV EPROM and OTP EPROM Features ■ 3V to 3.6V Low Voltage in Read Operation ■ Access Time: 100 ns 42 42 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O ■ Byte-wide or Word-wide Configurable ■ 16 Mbit Mask ROM Replacement ■ Low Power Consumption – Active Current: 30 mA at 8 MHz – Standby Current: 60 µA ■ Programming Voltage: 12.5V ± 0.25V ■ Programming Time: 50 µs/word ■ Electronic Signature – Manufacturer Code: 20h – Device Code: B1h ■ ECOPACK® packages available 1 1 FDIP42W (F) PDIP42 (B) 42 1 SDIP42 (S) 44 1 PLCC44 (K) April 2006 Rev 5 SO44 (M) 1/25 www.st.com 1 Contents M27V160 Contents 1 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 Two-line output control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O 2.4 System considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.5 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.6 Presto III programming algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.7 Program Inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.8 Program Verify . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.9 Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.10 Erasure operation (applies to UV EPROM) . . . . . . . . . . . . . . . . . . . . . . . 11 3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.1 42-pin Ceramic Frit-seal DIP with window (FDIP42WB) . . . . . . . . . . . . . 18 5.2 42-pin Plastic DIP, 600 mils width (PDIP42) . . . . . . . . . . . . . . . . . . . . . . . 19 5.3 42-lead Shrink Plastic DIP, 600 mils width (SDIP42) . . . . . . . . . . . . . . . . 20 5.4 44-lead Square Plastic Leaded Chip Carrier (PLCC44) . . . . . . . . . . . . . . 21 5.5 44-lead Plastic Small Outline, 525 mils body width (SO44) . . . . . . . . . . . 22 6 Part Numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 2/25 M27V160 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Signal descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Read Mode DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Programming Mode DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Read Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Programming Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 FDIP42WB package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 PDIP42 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 SDIP42 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 PLCC44 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 SO44 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Ordering Information Scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O 3/25 List of figures M27V160 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 DIP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 SO Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 PLCC Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Programming Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 AC Testing Input Output Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 AC Testing Load Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Word-Wide Read Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Byte-Wide Read Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 BYTE Transition AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Programming and Verify Modes AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 FDIP42WB package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 PDIP42 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 SDIP42 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 PLCC44 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 SO44 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O 4/25 M27V160 1 Summary description Summary description The M27V160 is a low voltage 16 Mbit EPROM offered in the two ranges UV (ultra violet erase) and OTP (one time programmable). It is ideally suited for microprocessor systems requiring large data or program storage. It is organised as either 2 Mbit words of 8 bit or 1 Mbit words of 16 bit. The pin-out is compatible with a 16 Mbit Mask ROM. The M27V160 operates in the read mode with a supply voltage as low as 3V. The decrease in operating power allows either a reduction of the size of the battery or an increase in the time between battery recharges. The FDIP42W (window ceramic frit-seal package) has a transparent lid which allows the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written rapidly to the device by following the programming procedure. ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O For applications where the content is programmed only one time and erasure is not required, the M27V160 is offered in PDIP42, SDIP42, PLCC44 and SO44 packages. In order to meet environmental requirements, ST offers the M27V160 in ECOPACK® packages. ECOPACK packages are Lead-free. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK® specifications are available at: www.st.com. See Figure 1: Logic Diagram and Table 1: Signal descriptions for a brief overview of the signals connected to this device. Figure 1. Logic Diagram VCC 20 Q15A–1 A0-A19 15 Q0-Q14 E M27V160 G BYTEVPP VSS AI01898 5/26 Summary description Table 1. M27V160 Signal descriptions Signal Description A0-A19 Address Inputs Q0-Q7 Data Outputs Q8-Q14 Data Outputs Q15A–1 Data Output / Address Input E Chip Enable G Output Enable BYTEVPP Byte Mode / Program Supply VCC Supply Voltage VSS Ground NC Not Connected Internally ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Figure 2. DIP Connections A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 E VSS G Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 1 42 2 41 40 3 39 4 38 5 37 6 36 7 8 35 9 34 10 33 M27V160 11 32 12 31 13 30 14 29 15 28 16 27 17 26 18 25 19 24 20 23 21 22 AI01899 6/26 A19 A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTEVPP VSS Q15A-1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC M27V160 Summary description Figure 3. SO Connections NC A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 E VSS G Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 1 44 2 43 42 3 4 41 5 40 6 39 7 38 8 37 9 36 10 35 11 34 M27V160 12 33 13 32 14 31 15 30 16 29 28 17 27 18 26 19 25 20 24 21 22 23 NC A19 A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTEVPP VSS Q15A-1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O AI01900 A5 A6 A7 A17 A18 VSS A19 A8 A9 A10 A11 PLCC Connections 1 44 A4 A3 A2 A1 A0 E 12 M27V160 34 VSS G Q0 Q8 Q1 A12 A13 A14 A15 A16 BYTEVPP VSS Q15A–1 Q7 Q14 Q6 23 Q9 Q2 Q10 Q3 Q11 NC VCC Q4 Q12 Q5 Q13 Figure 4. AI04829 7/26 Device description 2 M27V160 Device description Table 2 lists the operating modes of the M27V160. A single power supply is required in the read mode. All inputs are TTL compatible except for VPP and 12V on A9 for the Electronic Signature. Table 2. Operating Modes (1) Mode E G BYTEVPP A9 Q15A–1 Q14-Q8 Q7-Q0 Read Word-wide VIL VIL VIH X Data Out Data Out Data Out Read Byte-wide Upper VIL VIL VIL X VIH Hi-Z Data Out Read Byte-wide Lower VIL VIL VIL X VIL Hi-Z Data Out Output Disable VIL VIH X X Hi-Z Hi-Z Hi-Z VIL Pulse VIH VPP X Data In Data In Data In Verify VIH VIL VPP X Data Out Data Out Data Out Program Inhibit VIH VIH VPP X Hi-Z Hi-Z Hi-Z Standby VIH X X X Hi-Z Hi-Z Hi-Z Electronic Signature VIL VIL VIH VID Code Codes Codes ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t 2.1 Read mode e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Program 1. X = VIH or VIL, VID = 12V ± 0.5V. The M27V160 has two organisations, Word-wide and Byte-wide. The organisation is selected by the signal level on the BYTEVPP pin. When BYTEVPP is at VIH the Word-wide organisation is selected and the Q15A–1 pin is used for Q15 Data Output. When the BYTEVPP pin is at VIL the Byte-wide organisation is selected and the Q15A–1 pin is used for the Address Input A–1. When the memory is logically regarded as 16 bit wide, but read in the Byte-wide organisation, then with A–1 at VIL the lower 8 bits of the 16 bit data are selected and with A–1 at VIH the upper 8 bits of the 16 bit data are selected. The M27V160 has two control functions, both of which must be logically active in order to obtain data at the outputs. In addition the Word-wide or Byte- wide organisation must be selected. Chip Enable (E) is the power control and should be used for device selection. Output Enable (G) is the output control and should be used to gate data to the output pins independent of device selection. Assuming that the addresses are stable, the address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is available at the output after a delay of tGLQV from the falling edge of G, assuming that E has been low and the addresses have been stable for at least tAVQV-tGLQV. 2.2 Standby mode The M27V160 has a standby mode which reduces the active current from 20mA to 20µA with low voltage operation VCC ≤ 3.6V, see Read Mode DC Characteristics table for details.The M27V160 is placed in the standby mode by applying a CMOS high signal to the 8/26 M27V160 Device description E input. When in the standby mode, the outputs are in a high impedance state, independent of the G input. 2.3 Two-line output control Because EPROMs are usually used in larger memory arrays, this product features a 2 line control function which accommodates the use of multiple memory connection. The two line control function allows: ● the lowest possible memory power dissipation, ● complete assurance that output bus contention will not occur. For the most efficient use of these two control lines, E should be decoded and used as the primary device selecting function, while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device. ) s ( t c u d o ) r s 2.4 System considerations ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e 2.5 Programming l d o o r s P b O e t e l o s b O The power switching characteristics of Advanced CMOS EPROMs require careful decoupling of the supplies to the devices. The supply current ICC has three segments of importance to the system designer: the standby current, the active current and the transient peaks that are produced by the falling and rising edges of E. The magnitude of the transient current peaks is dependent on the capacitive and inductive loading of the device outputs. The associated transient voltage peaks can be suppressed by complying with the two line output control and by properly selected decoupling capacitors. It is recommended that a 0.1µF ceramic capacitor is used on every device between VCC and VSS. This should be a high frequency type of low inherent inductance and should be placed as close as possible to the device. In addition, a 4.7µF electrolytic capacitor should be used between VCC and VSS for every eight devices. This capacitor should be mounted near the power supply connection point. The purpose of this capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces. The M27V160 has been designed to be fully compatible with the M27C160. As a result the M27V160 can be programmed as the M27C160 on the same programming equipments applying 12.75V on VPP and 6.25V on VCC by the use of the same PRESTO III algorithm. When delivered (and after each erasure for UV EPROM), all bits of the M27V160 are in the '1' state. Data is introduced by selectively programming '0's to the desired bit locations. Although only '0's will be programmed, both '1's and '0's can be present in the data word. The only way to change a '0' to a '1' is by die exposure to ultraviolet light (UV EPROM). The M27V160 is in the programming mode when Vpp input is at 12.5V, G is at VIH and E is pulsed to VIL. The data to be programmed is applied to 16 bits in parallel to the data output pins. The levels required for the address and data inputs are TTL. VCC is specified to be 6.25V ± 0.25V. 9/26 Device description 2.6 M27V160 Presto III programming algorithm The Presto III Programming Algorithm allows the whole array to be programed with a guaranteed margin in a typical time of 52.5 seconds. Programming with Presto III consists of applying a sequence of 50µs program pulses to each word until a correct Verify occurs (see Figure 5.). During programing and verify operation a Margin Mode circuit is automatically activated to guarantee that each cell is programed with enough margin. No overprogram pulse is applied since the Verify in Margin Mode at VCC much higher than 3.6V provides the necessary margin to each programmed cell. Figure 5. Programming Flowchart ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t e Inhibituc t 2.7 Program e l d o o r s P b O e t e l o s b O2.8 Program Verify VCC = 6.25V, VPP = 12.5V n=0 E = 50µs Pulse NO ++n = 25 YES FAIL NO VERIFY ++ Addr YES Last Addr NO YES CHECK ALL WORDS BYTEVPP =VIH 1st: VCC = 5V 2nd: VCC = 3V AI00901B Programming of multiple M27V160s in parallel with different data is also easily accomplished. Except for E, all like inputs including G of the parallel M27V160 may be common. A TTL low level pulse applied to a M27V160's E input and VPP at 12.5V, will program that M27V160. A high level E input inhibits the other M27V160s from being programmed. A verify (read) should be performed on the programmed bits to determine that they were correctly programmed. The verify is accomplished with E at VIH and G at VIL, VPP at 12.5V and VCC at 6.25V. 10/26 M27V160 2.9 Device description Electronic Signature The Electronic Signature (ES) mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and type. This mode is intended for use by programming equipment to automatically match the device to be programmed with its corresponding programming algorithm. The ES mode is functional in the 25°C ± 5°C ambient temperature range that is required when programming the M27V160. To activate the ES mode, the programming equipment must force 11.5V to 12.5V on address line A9 of the M27V160, with VPP = VCC = 5V. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH. All other address lines must be held at VIL during Electronic Signature mode. ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) to UVoEPROM) 2.10 Erasure operation (applies s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Byte 0 (A0 = VIL) represents the manufacturer code and byte 1 (A0 = VIH) the device identifier code. For the STMicroelectronics M27V160, these two identifier bytes are given in Table 3 and can be read-out on outputs Q7 to Q0. Note that the M27V160 and M27C160 have the same identifier bytes. Table 3. Electronic Signature A0 Q15 and Q7 Q14 and Q6 Q13 and Q5 Q12 and Q4 Q11 and Q3 Q10 and Q2 Q9 and Q1 Q8 and Q0 Hex Data Manufacturer’s Code VIL 0 0 1 0 0 0 0 0 20h Device Code VIH 1 0 1 1 0 0 0 1 B1h Identifier The erasure characteristics of the M27V160 is such that erasure begins when the cells are exposed to light with wavelengths shorter than approximately 4000 Å. It should be noted that sunlight and some type of fluorescent lamps have wavelengths in the 3000-4000 Å range. Research shows that constant exposure to room level fluorescent lighting could erase a typical M27V160 in about 3 years, while it would take approximately 1 week to cause erasure when exposed to direct sunlight. If the M27V160 is to be exposed to these types of lighting conditions for extended periods of time, it is suggested that opaque labels be put over the M27V160 window to prevent unintentional erasure. The recommended erasure procedure for M27V160 is exposure to short wave ultraviolet light which has a wavelength of 2537 Å. The integrated dose (i.e. UV intensity x exposure time) for erasure should be a minimum of 30 W-sec/cm2. The erasure time with this dosage is approximately 30 to 40 minutes using an ultraviolet lamp with 12000 µW/cm2 power rating. The M27V160 should be placed within 2.5 cm (1 inch) of the lamp tubes during the erasure. Some lamps have a filter on their tubes which should be removed before erasure. 11/26 Maximum ratings 3 M27V160 Maximum ratings Table 4. Absolute Maximum Ratings (1) Symbol Value Unit Ambient Operating Temperature (2) –40 to 125 °C TBIAS Temperature Under Bias –50 to 125 °C TSTG Storage Temperature –65 to 150 °C VIO (3) Input or Output Voltage (except A9) –2 to 7 V Supply Voltage –2 to 7 V –2 to 13.5 V –2 to 14 V TA VCC Parameter ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O VA9 (3) VPP A9 Voltage Program Supply Voltage 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. 2. Depends on range. 3. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns. 12/26 M27V160 4 DC and AC parameters DC and AC parameters TA = 0 to 70°C or –40 to 85°C; VCC = 3.3V ± 10%; VPP = VCC Table 5. Symbol Read Mode DC Characteristics (1) Parameter ILI Input Leakage Current ILO Output Leakage Current Test Condition Min. Max. Unit 0V ≤ VIN ≤ VCC ±1 µA 0V ≤ VOUT ≤ VCC ±10 µA E = VIL, G = VIL, IOUT = 0mA, f = 8MHz, VCC ≤ 3.6V 30 mA E = VIL, G = VIL, IOUT = 0mA, f = 5MHz, VCC ≤ 3.6V 20 mA E = VIH 1 mA E > VCC – 0.2V, VCC ≤ 3.6V 60 µA VPP = VCC 10 µA ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O ICC Supply Current ICC1 Supply Current (Standby) TTL ICC2 Supply Current (Standby) CMOS IPP Program Current VIL Input Low Voltage –0.3 0.2VCC V VIH (2) Input High Voltage 0.7VCC VCC + 1 V VOL Output Low Voltage 0.4 V VOH Output High Voltage TTL IOL = 2.1mA IOH = –400µA 2.4 V 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Maximum DC voltage on Output is VCC +0.5V. TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.5V ± 0.25V Table 6. Symbol Programming Mode DC Characteristics (1) Parameter Test Condition Min 0 ≤ VIN ≤ VCC Max Unit ±1 µA 50 mA 50 mA ILI Input Leakage Current ICC Supply Current IPP Program Current VIL Input Low Voltage –0.3 0.8 V VIH Input High Voltage 2.4 VCC + 0.5 V VOL Output Low Voltage 0.4 V VOH Output High Voltage TTL VID A9 Voltage E = VIL IOL = 2.1mA IOH = –2.5mA 3.6 11.5 V 12.5 V 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 13/26 DC and AC parameters Table 7. M27V160 AC Measurement Conditions Parameter High Speed Standard Input Rise and Fall Times ≤ 10ns ≤ 20ns Input Pulse Voltages 0 to 3V 0.4V to 2.4V 1.5V 0.8V and 2V Input and Output Timing Ref. Voltages TA = 25 °C, f = 1 MHz Table 8. Symbol Capacitance (1) Parameter Test Condition Min. Max. Unit ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O CIN COUT Input Capacitance (except BYTEVPP) VIN = 0V 10 pF Input Capacitance (BYTEVPP) VIN = 0V 120 pF VOUT = 0V 12 pF Output Capacitance 1. Sampled only, not 100% tested. Figure 6. AC Testing Input Output Waveform High Speed 3V 1.5V 0V Standard 2.4V 2.0V 0.8V 0.4V AI01822 Figure 7. AC Testing Load Circuit 1.3V 1N914 3.3kΩ DEVICE UNDER TEST OUT CL CL = 30pF for High Speed CL = 100pF for Standard CL includes JIG capacitance 14/26 AI01823B M27V160 DC and AC parameters TA = 0 to 70°C or –40 to 85°C; VCC = 3.3V ± 10%; VPP = VCC Table 9. Read Mode AC Characteristics (1) M27V160 Symbol Alt Parameter Test Condition -100 (2) -120 -150 Unit Min. Max. Min. Max. Min. Max. tACC Address Valid to Output Valid tAVQV E = VIL, G = VIL 100 120 150 ns tBHQV tST BYTE High to Output Valid E = VIL, G = VIL 100 120 150 ns tELQV tCE Chip Enable Low to Output Valid G = VIL 100 120 150 ns tGLQV tOE Output Enable Low to Output Valid E = VIL 50 60 60 ns E = VIL, G = VIL 45 50 50 ns ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O tBLQZ (3) tSTD BYTE Low to Output Hi-Z tEHQZ (3) tDF Chip Enable High to Output HiZ G = VIL 0 45 0 50 0 50 ns tGHQZ (3) tDF Output Enable High to Output Hi-Z E = VIL 0 45 0 50 0 50 ns tAXQX tOH Address Transition to Output Transition E = VIL, G = VIL 5 5 5 ns tBLQX tOH BYTE Low to Output Transition E = VIL, G = VIL 5 5 5 ns 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Speed obtained with High Speed measurement conditions. 3. Sampled only, not 100% tested. TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.5V ± 0.25V Table 10. Programming Mode AC Characteristics (1) Symbol Alt tAVEL tAS Address Valid to Chip Enable Low 2 µs tQVEL tDS Input Valid to Chip Enable Low 2 µs tVPHAV tVPS VPP High to Address Valid 2 µs tVCHAV tVCS VCC High to Address Valid 2 µs tELEH tPW Chip Enable Program Pulse Width 45 tEHQX tDH Chip Enable High to Input Transition 2 µs tQXGL tOES Input Transition to Output Enable Low 2 µs tGLQV tOE Output Enable Low to Output Valid tDFP Output Enable High to Output Hi-Z 0 tAH Output Enable High to Address Transition 0 tGHQZ (2) tGHAX Parameter Test Condition Min. Max. 55 Unit µs 120 ns 130 ns ns 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Sampled only, not 100% tested. 15/26 DC and AC parameters Figure 8. M27V160 Word-Wide Read Mode AC Waveforms A0-A19 VALID tAVQV VALID tAXQX E tEHQZ tGLQV G tGHQZ tELQV ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Hi-Z Q0-Q15 AI00741B Note: BYTEVPP = VIH. Figure 9. Byte-Wide Read Mode AC Waveforms A–1,A0-A19 VALID tAVQV VALID tAXQX E tGLQV tEHQZ G tELQV Q0-Q7 tGHQZ Hi-Z AI00742B Note: 16/26 BYTEVPP = VIL. M27V160 DC and AC parameters Figure 10. BYTE Transition AC Waveforms VALID A0-A19 A–1 VALID tAXQX tAVQV BYTEVPP tBHQV ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O DATA OUT Q0-Q7 tBLQX Hi-Z Q8-Q15 DATA OUT tBLQZ AI00743C Note: Chip Enable (E) and Output Enable (G) = VIL. Figure 11. Programming and Verify Modes AC Waveforms A0-A19 VALID tAVEL DATA IN Q0-Q15 tQVEL DATA OUT tEHQX BYTEVPP tVPHAV tGLQV tGHQZ VCC tVCHAV tGHAX E tELEH tQXGL G PROGRAM VERIFY AI00744 17/26 Package mechanical data M27V160 5 Package mechanical data 5.1 42-pin Ceramic Frit-seal DIP with window (FDIP42WB) Figure 12. FDIP42WB package outline A2 A1 B1 B A L α e C eA D2 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O eB D S N K E1 E K1 1 FDIPW-C Table 11. FDIP42WB package mechanical data millimeters inches Symbol Min. Typ. A Min. Typ. 5.71 Max. 0.225 A1 0.50 1.78 0.020 0.070 A2 3.90 5.08 0.154 0.200 B 0.40 0.55 0.016 0.022 B1 1.27 1.52 0.050 0.060 C 0.22 0.31 0.009 0.012 D D2 54.81 – E 50.80 2.158 – – 15.24 2.000 – 0.600 E1 14.50 14.90 0.571 0.587 e 2.29 2.79 0.090 0.110 eA 15.40 15.80 0.606 0.622 eB 16.17 18.32 0.637 0.721 K 9.32 9.47 0.367 0.373 K1 11.30 11.55 0.445 0.455 L 3.18 4.10 0.125 0.161 S 1.52 2.49 0.060 0.098 α 4° 15° 4° 15° N 18/26 Max. 42 42 M27V160 5.2 Package mechanical data 42-pin Plastic DIP, 600 mils width (PDIP42) Figure 13. PDIP42 package outline A2 A1 B1 B A L α e1 eA D2 C eB D S N ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O E1 E 1 PDIP Table 12. PDIP42 package mechanical data millimeters inches Symbol Min. Typ. Max. Min. Typ. Max. A – 5.08 – 0.200 A1 0.25 – 0.010 – A2 3.56 4.06 0.140 0.160 B 0.38 0.53 0.015 0.021 B1 1.27 1.65 0.050 0.065 C 0.20 0.36 0.008 0.014 D 52.20 52.71 2.055 2.075 D2 – 50.80 – – 2.000 15.24 0.600 – E – E1 13.59 e1 – eA – eB 15.24 17.78 0.600 0.700 L 3.18 3.43 0.125 0.135 S 0.86 1.37 0.034 0.054 α 0° 10° 0° 10° N – – 13.84 0.535 2.54 – – 0.100 – 14.99 – – 0.590 – 42 – 0.545 42 19/26 Package mechanical data 5.3 M27V160 42-lead Shrink Plastic DIP, 600 mils width (SDIP42) Figure 14. SDIP42 package outline A2 A1 b2 b A L e eA D2 c eB D S N ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O E1 E 1 SDIP Table 13. SDIP42 package mechanical data millimeters inches Symbol Min. Typ. A Min. Typ. 5.08 Max. 0.200 A1 0.51 A2 3.05 3.81 4.57 0.120 0.150 0.180 b 0.38 0.46 0.56 0.015 0.018 0.022 b2 0.89 1.02 1.14 0.035 0.040 0.045 c 0.23 0.25 0.38 0.009 0.010 0.015 D 36.58 36.83 37.08 1.440 1.450 1.460 e – 1.78 – – 0.070 – 16.00 0.600 13.72 14.48 0.500 E 15.24 E1 12.70 eA 0.020 15.24 eB L 20/26 Max. 0.630 0.540 0.600 18.54 2.54 3.30 0.570 3.56 0.730 0.100 0.130 S 0.64 0.025 N 42 42 0.140 M27V160 5.4 Package mechanical data 44-lead Square Plastic Leaded Chip Carrier (PLCC44) Figure 15. PLCC44 package outline D D1 A1 c 1 N B1 E3 e E2 E1 E B ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O D3 A2 A CP D2 PLCC-B Table 14. PLCC44 package mechanical data millimeters inches Symbol Min. Typ. Max. Min. Typ. Max. A 4.200 4.570 0.1654 0.1799 A1 2.290 3.040 0.0902 0.1197 A2 3.650 3.700 0.1437 0.1457 B 0.331 0.533 0.0130 0.0210 B1 0.661 0.812 0.0260 0.0320 CP 0.101 c 0.0040 0.510 0.0201 D 17.400 17.650 0.6850 0.6949 D1 16.510 16.662 0.6500 0.6560 D2 14.990 16.000 0.5902 D3 – – – E 17.400 17.650 0.6850 0.6949 E1 16.510 16.660 0.6500 0.6559 E2 14.990 16.000 0.5902 E3 – 12.700 – – 0.5000 – e – 1.270 – – 0.0500 – N 12.700 44 0.6299 0.5000 – 0.6299 44 21/26 Package mechanical data 5.5 M27V160 44-lead Plastic Small Outline, 525 mils body width (SO44) Figure 16. SO44 package outline A A2 C b e CP D N ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O E EH 1 A1 α L SO-d Table 15. SO44 package mechanical data millimeters inches Symbol Min. Typ. A Min. Typ. 2.80 Max. 0.1102 A1 0.10 0.0039 A2 2.20 2.30 2.40 0.0866 0.0906 0.0945 b 0.35 0.40 0.50 0.0138 0.0157 0.0197 C 0.10 0.15 0.20 0.0039 0.0059 0.0079 CP 0.08 0.0030 D 28.00 28.20 28.40 1.1024 1.1102 1.1181 E 13.20 13.30 13.50 0.5197 0.5236 0.5315 EH 15.75 16.00 16.25 0.6201 0.6299 0.6398 e – 1.27 – – 0.0500 – L 0.80 α N 22/26 Max. 0.0315 8° 44 8° 44 M27V160 6 Part Numbering Part Numbering Table 16. Ordering Information Scheme Example: M27V160 -100 X M 1 Device Type M27 Supply Voltage ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O V = 3V to 3.6V Device Function 160 = 16 Mbit (2Mb x 8 or 1Mb x 16) Speed -100 (1)= 100 ns -120 = 120 ns -150 = 150 ns VCC Tolerance blank = 3.3V ± 10% X = 3.3V ± 5% Package F = FDIP42W (2) B = PDIP42 S = SDIP42 K = PLCC44 M = SO44 (2) Temperature Range 1 = 0 to 70 °C 6 = –40 to 85 °C 1. High Speed, see AC Characteristics section for further information. 2. Packages option available on request. Please contact STMicroelectronics local Sales Office. For a list of available options (Speed, Package, etc...) or for further information on any aspect of this device, please contact the STMicroelectronics Sales Office nearest to you. 23/26 Revision history 7 M27V160 Revision history Table 17. Document revision history Date Revision Changes 10-Mar-2000 1 First Issue 23-Apr-2001 2 PLCC44 package added 19-Jul-2001 3 SDIP42 package added 21-Mar-2002 4 SO44 package mechanical and data clarified Converted to new template. Added ECOPACK® information. Removed “On-board Programming” section. Removed Tape & Reel Packing option. ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O 12-Apr-2006 24/26 5 M27V160 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. 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