M74HC390B1R

M74HC390 Dual decade counter Features ■ ■ ■ ■ ■ ■ HIgh Speed: fMAX = 79MHz (Typ.) at VCC = 6V Low power dissipation: ICC = 4µA (Max.) at TA = 25°C High noise immunity: VNIH = VNIL = 28 % VCC (Min.) Balanced propagation delays: tPLH ≅ tPHL Wide operating voltage range: VCC (Opr) = 2V to 6V Pin and function compatible with 74 series 390 DIP-16 SO-16 Description The M74HC390 is an high speed CMOS dual decade counter fabricated with silicon gate C2MOS technology. This dual decade counter contains two independent ripple carry counters. Each counter is composed of a divide by two and divide by five counter. The divide by two and divide by five counters can be cascaded to form dual decade, dual biquinary, or various combination up to a single divide by 100 counter. Each 4-bit counter is increased on the high to low transition (negative edge) of the clock input, and each has an independent clear input. When clear is set low all four bits of each counter are set to low. This enables count truncation and allows the implementation of divide by N counter configuration. All inputs are equipped with protection circuits against static discharge and transient excess voltage. Order codes Part number M74HC390B1R M74HC390RM13TR Package DIP-14 SO-14 Packaging Tube Tape and reel July 2006 Rev 2 1/17 www.st.com 17 Contents M74HC390 Contents 1 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 1.2 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 3 4 5 6 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Block and logic diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Timing chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6.1 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 7 8 9 10 11 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2/17 M74HC390 Pin settings 1 1.1 Pin settings Pin connection Figure 1. Pin connection (top through view) 1.2 Pin description Table 1. Pin description Pin N° 1, 15 2, 14 3, 5, 6, 7 4, 12 Symbol Name and function 1 CLOCK A Clock input divide by 2 section (HIGH to LOW Edge-Triggered) 2 CLOCK B 1 CLEAR 2 CLEAR Asynchronous master reset inputs 1QA to 1QD Flip flop outputs 1 CLOCK A Clock input divide by 5 section (HIGH to LOW Edge-Triggered) 2 CLOCK B 13, 11, 10, 9 2QA to 2QD Flip flop outputs 8 16 GND Vcc Ground (0V) Positive supply voltage 3/17 Device summary M74HC390 2 Device summary Figure 2. IInput and output equivalent circuit Figure 3. Logic diagram 4/17 M74HC390 Truth table 3 Truth table Table 2. Truth table Outputs COUNT QD 0 1 2 3 4 5 6 7 8 9 L L L L L L L L H H BCD COUNT (1) QC L L L L H H H H L L QB L L H H L L H H L L QA L H L H L H L H L H QA L L L L L H H H H H BI-QUINARY (2) QD L L L L H H L L L H QC L L H H L L L H H L QB L H L H L L H L H L 1. Output QA is connected to input CLOCK B for BCD count. 2. Output QD is connected to input CLOCK A for bi-quinary count. Table 3. Truth table Inputs CLOCK A X CLOCK B X X X CLEAR H L L QA L Outputs QB L QC L QD L BINARY COUNT UP QUINARY COUNT UP 5/17 Block and logic diagrams M74HC390 4 Block and logic diagrams Figure 4. Block diagram Figure 5. Logic diagram Note: 6/17 This logic diagram has not be used to estimate propagation delays M74HC390 Timing chart 5 Timing chart Figure 6. Timing chart 7/17 Maximum rating M74HC390 6 Maximum rating Stressing the device above the rating listed in the “Absolute Maximum Ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 4. Absolute maximum ratings Symbol VCC VI VO IIK IOK IO ICC or IGND PD Tstg TL Supply voltage DC input voltage DC output voltage DC input diode current DC output diode current DC output current DC VCC or ground current Power dissipation Storage temperature Lead temperature (10 sec) Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 ± 20 ± 20 ± 25 ± 50 500(1) -65 to +150 300 Unit V V V mA mA mA mA mW °C °C 1. 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C 6.1 Recommended operating conditions Table 5. Recommended operating conditions Symbol VCC VI VO Top Supply voltage Input voltage Output voltage Operating temperature VCC = 2.0V tr, tf Input rise and fall time VCC = 4.5V VCC = 6.0V Parameter Value 2 to 6 0 to VCC 0 to VCC -55 to 125 0 to 1000 0 to 500 0 to 400 Unit V V V °C ns ns ns 8/17 M74HC390 Electrical characteristics 7 Electrical characteristics Table 6. DC specifications Test condition Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 High level output voltage 4.5 6.0 4.5 6.0 2.0 Low level output voltage 4.5 6.0 4.5 6.0 II Input leakage current Output leakage current Quiescent supply current 6.0 IO=-20µA IO=-20µA IO=-20µA IO=-4.0 mA IO=-5.2 mA IO=20µA IO=20µA IO=20µA IO=4.0 mA IO=5.2 mA VI = VCC or GND VI = VIH or VIL VO = VCC or GND VI = VCC or GND 1.9 4.4 5.9 2.0 4.5 6.0 TA = 25°C Min Typ Max 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.13 5.63 0.1 0.1 0.1 0.1 0.1 0.1 0.33 0.33 ±1 Value -40 to 85°C -55 to 125°C Unit Min 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.10 5.60 0.1 0.1 0.1 0.40 0.40 ±1 µA V V Max Min 1.5 3.15 4.2 0.5 1.35 1.8 V V Max VIH High level input voltage Low level input voltage VIL VOH 4.18 4.31 5.68 5.8 0.0 0.0 0.0 VOL 0.17 0.26 0.18 0.26 ±0.1 IOZ 6.0 ±0.5 ±5 ±10 µA ICC 6.0 1 10 20 µA 9/17 Electrical characteristics Table 7. AC electrical characteristics (CL = 50 pF, Input tr = tf = 6ns) Test condition Symbol Parameter VCC (V) 2.0 Output transition tTLH tTHL time 4.5 6.0 tPLH tPHL Propagation delay time (CLOCK A - QA) Propagation delay time (CLOCK AQB,QD) Propagation delay time (CLOCK A - QC) Propagation delay time (CLOCK B - QC) Propagation delay time (CLEAR Qn) Maximum clock frequency (CLOCK A - QA) Maximum clock frequency (CLOCK B - QB) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 tW(H) tW(L) Minimum pulse width (CLOCK) 4.5 6.0 2.0 tW(H) Minimum pulse width (CLEAR) 4.5 6.0 2.0 tREM Minimum removal time 4.5 6.0 8.4 42 50 8.4 42 50 QA Connected to CKB TA = 25°C Min Typ 30 8 7 42 14 12 45 15 13 108 36 31 72 24 20 45 15 13 17 65 79 17 67 79 24 6 5 24 6 5 75 15 13 75 15 13 25 5 5 Max 75 15 13 120 24 20 120 24 20 280 56 48 185 37 31 125 25 21 6.8 34 40 6.8 34 40 95 19 16 95 19 16 30 6 5 Value -40 to 85°C Min Max 95 19 16 150 30 26 150 30 26 350 70 60 230 46 39 155 31 26 5.6 28 33 5.6 28 33 M74HC390 -55 to 125°C Unit Min Max 110 22 19 180 36 31 180 36 31 420 84 71 280 56 48 190 38 32 ns ns ns ns ns ns tPLH tPHL tPLH tPHL tPLH tPHL tPHL fMAX MHz fMAX MHz 110 22 19 110 22 19 35 7 6 ns ns ns 10/17 M74HC390 Electrical characteristics Table 8. Capacitive characteristics Test condition Symbol Parameter VCC (V) TA = 25°C Min Typ 5 Max 10 Value -40 to 85°C Min Max 10 -55 to 125°C Min Max 10 pF Unit CIN Input capacitance Power dissipation capacitance (1) CPD 84 pF 1. CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC 11/17 Test circuit M74HC390 8 Test circuit Figure 7. Test circuit Note: CL = 50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50Ω) 9 Waveforms Figure 8. Clock waveform (f = 1MHz; 50% duty cycle) 12/17 M74HC390 Package mechanical data 10 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 13/17 Package mechanical data M74HC390 Plastic DIP-16 (0.25) MECHANICAL DATA mm. DIM. MIN. a1 B b b1 D E e e3 F I L Z 3.3 1.27 8.5 2.54 17.78 7.1 5.1 0.130 0.050 0.51 0.77 0.5 0.25 20 0.335 0.100 0.700 0.280 0.201 1.65 TYP MAX. MIN. 0.020 0.030 0.020 0.010 0.787 0.065 TYP. MAX. inch P001C 14/17 M74HC390 Package mechanical data SO-16 MECHANICAL DATA DIM. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 9.8 5.8 1.27 8.89 4.0 5.3 1.27 0.62 8° (max.) 0.149 0.181 0.019 10 6.2 0.35 0.19 0.5 45° (typ.) 0.385 0.228 0.050 0.350 0.157 0.208 0.050 0.024 0.393 0.244 0.1 mm. MIN. TYP MAX. 1.75 0.25 1.64 0.46 0.25 0.013 0.007 0.019 0.004 MIN. inch TYP. MAX. 0.068 0.010 0.063 0.018 0.010 0016020D 15/17 Revision history M74HC390 11 Revision history Table 9. Revision history Date 07-Aug-2001 21-Jul-2006 Revision 1 2 First Release New template, deleted TSSOP16 package information Changes 16/17 M74HC390 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. 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