M74HC4060
14-stage binary counter/oscillator
Datasheet - production data
Applications
• Automotive
• Industrial
SO16
• Computer
TSSOP16
• Consumer
Description
Features
The M74HC4060 device is a high speed CMOS
14-stage binary counter/oscillator fabricated with
silicon gate C2MOS technology.
• High speed:
fmax = 65 MHz (typ.) at VCC = 6 V
• Low power dissipation:
ICC = 4 A (max.) at TA = 25 °C
The oscillator configuration allows design of either
RC or crystal oscillator circuits. A high level on the
CLEAR accomplishes the reset function, i.e. all
counter outputs are made low and the oscillator is
disabled.
• High noise immunity:
VNIH = VNIL = 28% VCC (min.)
• Symmetrical output impedance:
|IOH| = IOL = 4 mA (min.)
• Balanced propagation delays: TPLH ≅ TPHL
• Wide operating voltage range:
VCC (opr.) = 2 V to 6 V
• Pin and function compatible with 74 series
4060
• ESD performance
– HBM: 2 kV
– MM: 200 V
– CDM: 1 kV
A negative transition on the clock input
increments the counter. Ten kinds of divided
output are provided; 4 to 10 and 12 to 14 stage
inclusive. The maximum division available at Q12
is 1/16384 of the oscillator frequency.
The ∅I input and the CLEAR input are equipped
with protection circuits against static discharge
and transient excess voltage.
Table 1. Device summary
Temperature
range
Package
-55 °C to +125 °C
SO16
-40 °C to +125 °C
SO16 (automotive version)
M74HC4060TTR
-55 °C to +125 °C
TSSOP16
M74HC4060YTTR(1)
-40 °C to +125 °C
TSSOP16 (automotive version)
Order code
M74HC4060RM13TR
M74HC4060YRM13TR
(1)
Packing
Marking
74HC4060
Tape and reel
74HC4060Y
HC4060
HC4060Y
1. Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC
Q001 and Q002.
January 2014
This is information on a product in full production.
DocID1967 Rev 3
1/17
www.st.com
Contents
M74HC4060
Contents
1
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.1
SO16 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.2
TSSOP16 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2/17
DocID1967 Rev 3
M74HC4060
1
Pin description
Pin description
Figure 1. Pin connection and IEC logic symbols
4
9&&
4
4
4
4
4
4
4
&/($5
4
2,
4
22
*1'
22
5&75
2
2
&; ,*
5;
&7
&7
4
4
4
4
4
4
4
4
4
4
/&
$09
Table 2. Pin description
Pin no
Symbol
1, 2, 3
Q12 to Q14
7, 5, 4, 6, 14, 13, 15
Q4 to Q10
9
∅O
External capacitor connection
10
∅O
External resistor connection
11
∅I
Clock input / oscillator pin
12
CLEAR
Master reset
8
GND
Ground (0 V)
16
VCC
Positive supply voltage
DocID1967 Rev 3
Name and function
Counter outputs
3/17
17
Functional description
2
M74HC4060
Functional description
Figure 2. Logic diagram
4
2,
22
22
'
&.
'
&.
5
&/($5
4
5
4
&.
'
5
4
&.
'
4
4
5
4
&.
'
4
4
5
&.
'
4
4
5
5
4
&.
'
4
'
&.
4
5
'
&.
5
4
&.
'
4
4
5
&.
'
4
'
&.
5
4
4
5
&.
'
4
5
4
5
&.
'
4
4
$0
1. This logic diagram has not be used to estimate propagation delays.
Table 3. Truth table
∅I
CLEAR
Function
X(1)
H
Counter is reset to zero state ∅O output goes to high level ∅O output goes to
low level
L
Count up one step
L
No change
1. X: don't care.
Figure 3. Input and output equivalent circuit
6&
4/17
DocID1967 Rev 3
M74HC4060
3
Electrical characteristics
Electrical characteristics
Table 4. Absolute maximum ratings(1)
Symbol
VCC
Parameter
Value
Supply voltage
-0.5 to +7
VI
DC Input voltage
VO
DC output voltage
IIK
DC input diode current
IOK
DC output diode current
IO
DC output current
25
DC VCC or ground current
50
ICC or IGND
PD
Power dissipation
Tstg
Storage temperature
TL
Lead temperature (10 sec.)
Unit
-0.5 to VCC + 0.5
V
20
500(2)
-65 to +150
300
mA
mW
°C
1. Absolute maximum ratings are those values beyond which damage to the device may occur. Functional
operation under these conditions is not implied.
2. 500 mW at 65 °C; derate to 300 mW by 10 mW/ C from 65 °C to 85 °C.
Table 5. Recommended operating conditions
Symbol
Parameter
VC
Supply voltage
VI
Input voltage
VO
Output voltage
Top
Operating temperature
tr, tf
Input rise and fall time
Value
Unit
2 to 6
0 to VCC
-55 to 125
VCC = 2.0 V
0 to 1000
VCC = 4.5 V
0 to 500
VCC = 6.0 V
0 to 400
DocID1967 Rev 3
V
°C
ns
5/17
17
Electrical characteristics
M74HC4060
Table 6. DC specifications
Test condition
Symbol
Parameter
Value
TA = 25°C
VCC
(V)
-40 to 85 °C
Min. Typ. Max. Min. Max.
VIH
VIL
VOH
VOL
VOH
VOL
II
ICC
6/17
High level input voltage
Low level input voltage
-55 to 125
°C
Min.
2.0
1.5
1.5
1.5
4.5
3.15
3.15
3.15
6.0
4.2
4.2
4.2
Unit
Max.
V
2.0
0.5
0.5
0.5
4.5
1.35
1.35
1.35
6.0
1.8
1.8
1.8
V
2.0
IO = -20 A
1.9
2.0
1.9
1.9
4.5
IO = -20 A
4.4
4.5
4.4
4.4
6.0
IO = -20 A
5.9
6.0
5.9
5.9
4.5
IO = -4.0 mA
4.18 4.31
4.13
4.10
6.0
IO = -5.2 mA
5.68
5.63
5.60
2.0
IO = 20 A
0.0
0.1
0.1
0.1
4.5
IO = 20 A
0.0
0.1
0.1
0.1
6.0
IO = 20 A
0.0
0.1
0.1
0.1
4.5
IO = 4.0 mA
0.17 0.26
0.33
0.40
6.0
IO = 5.2 mA
0.18 0.26
0.33
0.40
2.0
IO =-20 A
1.8
2.0
1.8
1.8
4.5
IO = -20 A
4.4
4.5
4.0
4.0
6.0
IO = -20 A
5.5
5.9
5.5
5.5
2.0
IO = -20 A
0.0
0.2
0.2
0.2
4.5
IO = -20 A
0.0
0.5
0.5
0.5
6.0
IO = -20 A
0.1
0.5
0.5
0.5
Input leakage current
6.0
VI = VCC or GND
0.1
±1
±1
μA
Quiescent supply
current
6.0
VI = VCC or GND
4
40
80
μA
High level output
voltage (Q output)
Low level output voltage
(Q output)
High level output
voltage (∅O, ∅O output)
Low level output voltage
(∅O, ∅O output)
DocID1967 Rev 3
5.8
V
V
2.0
V
V
M74HC4060
Electrical characteristics
Table 7. AC electrical characteristics (CL = 50 pF, input tr = tf = 6 ns)
Test
condition
Symbol
Parameter
VCC (V)
tTLH tTHL
tPLH tPHL
tPD
tPHL
fMAX
Output transition time
Propagation delay
time (∅I - Q4)
Propagation delay
time difference
(Qn - Qn+1)
Propagation delay
time (CLEAR - Qn)
Maximum clock
frequency
Minimum pulse width
tW(H), tW(L)
(∅I)
tW(H)
tREM
Value
Minimum pulse width
(CLEAR)
Minimum removal
time
TA = 25 °C
Min.
-40 to 85 °C
Min.
Max.
-55 to 125 °C
Typ.
Max.
Min.
2.0
30
75
95
110
4.5
8
15
19
22
6.0
7
13
16
19
2.0
170
300
375
450
4.5
41
60
75
90
6.0
30
51
64
76
2.0
32
75
95
110
4.5
7
15
19
22
6.0
5
13
16
19
2.0
85
195
245
295
4.5
23
39
49
59
6.0
17
33
42
50
2.0
6
12
5
4
4.5
30
50
24
20
6.0
35
65
28
24
Max.
ns
ns
ns
ns
MHz
2.0
30
75
95
110
4.5
8
15
19
22
6.0
7
13
16
19
2.0
30
75
95
110
4.5
8
15
19
22
6.0
7
13
16
19
2.0
40
100
125
150
4.5
10
20
25
30
6.0
9
17
21
26
DocID1967 Rev 3
Unit
ns
ns
ns
7/17
17
Electrical characteristics
M74HC4060
Table 8. Capacitive characteristics
Test
condition
Symbol
Parameter
Value
VCC (V)
CIN
Input capacitance
5.0
CPD
Power dissipation
capacitance(1)
5.0
TA = 25 °C
Min.
Typ.
5
10
Max.
27
-40 to 85 °C -55 to 125 °C
Min.
10
Max.
Min.
Unit
Max.
10
pF
1. CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the
operating current consumption without load. (Refer to Figure 4: Test circuit). Average operating current can
be obtained by the following equation. ICC(opr.) = CPD x VCC x fIN + ICC.
Figure 4. Test circuit
6&
1. CL = 50 pF or equivalent (includes jig and probe capacitance)
RT = ZOUT of pulse generator (typically 50 Ω).
8/17
DocID1967 Rev 3
M74HC4060
Electrical characteristics
Figure 5. Waveform 1: propagation delay times, minimum pulse width (∅I)
(f = 1 MHz; 50 % duty cycle)
QV
QV
9&&
2,
*1'
WZ
WZ
92+
4
92/
W3/+
W3+/
6
Figure 6. Waveform 2: propagation delay times, minimum pulse width (CLEAR)
(f = 1 MHz; 50 % duty cycle)
QV
QV
9&&
&/($5
*1'
WZ
92+
41
92/
W3+/
6
DocID1967 Rev 3
9/17
17
Electrical characteristics
M74HC4060
Figure 7. Waveform 3:propagation delay times (f = 1 MHz; 50 % duty cycle)
W7+/
41
W7/+
41
W3/+
6
Figure 8. Waveform 4: propagation delay times (f = 1 MHz; 50 % duty cycle)
W7+/
92+
41
92/
W7+/
92+
41
92/
W3+/
6
10/17
DocID1967 Rev 3
M74HC4060
Electrical characteristics
Figure 9. Typical clock drive circuits
2,
2,
22 22
2,
22 22
22 22
56
5I
^
5;
23(1
;7$/
&;
& &
5 5;a5;
6
6
DocID1967 Rev 3
23(1
6
11/17
17
Package information
4
M74HC4060
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK is an ST trademark.
12/17
DocID1967 Rev 3
M74HC4060
4.1
Package information
SO16 package information
Figure 10. SO16 package outline
/
*
F
&
D $
E
H
D
6
H
E
(
'
0
)
'
Table 9. SO16 package mechanical data
Dimensions
Symbol
mm
Min.
Typ.
A
a1
inch
Max.
Min.
Typ.
1.75
0.1
0.2
a2
Max.
0.068
0.003
0.007
1.65
0.064
b
0.35
0.46
0.013
0.018
b1
0.19
0.25
0.007
0.010
C
0.5
0.019
c1
45° (typ.)
D
9.8
10
0.385
0.393
E
5.8
6.2
0.228
0.244
e
1.27
0.050
e3
8.89
0.350
F
3.8
4.0
0.149
0.157
G
4.6
5.3
0.181
0.208
L
0.5
1.27
0.019
0.050
M
0.62
S
0.024
8° (max.)
DocID1967 Rev 3
13/17
17
Package information
4.2
M74HC4060
TSSOP16 package information
Figure 11. TSSOP16 package outline
$
$
$
.
H
E
/
F
(
'
(
3,1,'(17,),&$7,21
'
Table 10. TSSOP16 mechanical data
Dimensions
Symbol
mm
Min.
Typ.
A
Max.
Min.
Typ.
1.2
A1
0.05
A2
0.8
b
Max.
0.047
0.15
0.002
0.004
0.006
1.05
0.031
0.039
0.041
0.19
0.30
0.007
0.012
c
0.09
0.20
0.004
0.0089
D
4.9
5
5.1
0.193
0.197
0.201
E
6.2
6.4
6.6
0.244
0.252
0.260
E1
4.3
4.4
4.48
0.169
0.173
0.176
e
14/17
inch
1
0.65
K
0°
L
0.45
0.60
0.0256
8°
0°
0.75
0.018
DocID1967 Rev 3
8°
0.024
0.030
M74HC4060
5
Ordering information
Ordering information
Table 11. Device summary
Temperature
range
Package
M74HC4060RM13TR
-55 °C to +125 °C
SO16
74HC4060
M74HC4060YRM13TR(1)
-40 °C to +125 °C
SO16
(automotive version)
74HC4060Y
M74HC4060TTR
-55 °C to +125 °C
TSSOP16
M74HC4060YTTR(1)
-40 °C to +125 °C
TSSOP16
(automotive version)
Order code
Packing
Tape and reel
Marking
HC4060
HC4060Y
1. Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening
according to AEC Q001 and Q002.
DocID1967 Rev 3
15/17
17
Revision history
6
M74HC4060
Revision history
Table 12. Document revision history
Date
Revision
1-Feb-2008
1
Initial release.
2
Added Applications on page 1.
Corrected Description (replaced “The maximum division
available at Q12 is 1/16384 f oscillator.” by “The
maximum division available at Q12 is 1/16384 of the
oscillator frequency.”).
Updated Table 1 (added order codes, temperature
range, updated package, added marking).
Moved Figure 1 to page 3.
Redrawn Figure 1, Figure 2, Figure 5 to Figure 9.
Added Contents.
Added titles to Section 1: Pin description to Section 6:
Revision history.
Added numbers to Table 1 to Table 12 and Figure 1 to
Figure 11.
Updated Section 4: Package information (added
ECOPACK text, reversed order of Figure 10 to Figure 11
and Table 9 to Table 10).
Minor corrections throughout document.
3
Removed PDIP16 package
Added ESD data to Features
Table 1: Device summary: added “Packing” and updated
footnote 1.
Added Section 5: Ordering information
Updated layout
15-May-2013
10-Jan-2014
16/17
Changes
DocID1967 Rev 3
M74HC4060
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17/17
17
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