M74HC4511TTR

M74HC4511 BCD TO 7 SEGMENT LATCH/DECODER DRIVER s s s s s s s HIGH SPEED: tPD= 23ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) HIGH SOURGE CURRENT : |IOH| = 20 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 4511 DIP SOP TSSOP ORDER CODES PACKAGE DIP SOP TSSOP TUBE M74HC4511B1R M74HC4511M1R T&R M74HC4511RM13TR M74HC4511TTR DESCRIPTION The M74HC4511 is an high speed CMOS BCD-TO-7 SEGMENT LATCH/DECODER/ DRIVER fabricated with silicon gate C2MOS technology. The segment output driver has large IOH capability which enables common cathode leds to be directly driven. When lamp test (LT) is taken "L", all segment outputs will go to "H", and when blanking (BI) is taken "L" and LT is taken "H" all segment outputs will go to "L". These functions operate regardless of other inputs and are used to test the display. Input BI is used to pulse-modulate the brightness of the display. When an error input code (over 10) is applied to the BCD input, all segment outputs will go "L" (turn off). All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS August 2001 1/13 M74HC4511 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 3 4 5 7, 1, 2, 6 13, 12, 11, 10, 9, 15, 14 8 16 SYMBOL LT BI LE A to D a to g GND VCC NAME AND FUNCTION Lamp Test Input (Active LOW) Ripple Blanking Input (Active LOW) Latch Enable Input BCD Address Inputs Segment Outputs Ground (0V) Positive Supply Voltage TRUTH TABLE INPUT LE X X L L L L L L L L L L L L L BI X L H H H H H H H H H H H H L LT L H H H H H H H H H H H H H L D X X L L L L L L L L H H H H X C X X L L L L H H H H L L L H X B X X L L H H L L H H L L H X X A X X L H L H L H L H L H X X X a H L H L H H L H L H H H L L b c OUTPUT DISPLAY MODE d e f g 8 BLANK 0 1 2 3 4 5 6 7 8 9 BLANK BLANK H H H H H H L L L L L L H H H H H L H H L L L L H L H H L H H H H L L H H H L L H H L H H L H H L H H H H H H L L L L L H H H H H H H H L L H H L L L L L L L L L L L L Hold the stage at the leading edge of LE X : Don’t Care 2/13 M74HC4511 LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays DISPLAY MODE 3/13 M74HC4511 BLOCK DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VO IIK IOK IO Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 ± 20 ± 20 -35/25 +150/-50 500(*) -65 to +150 300 Unit V V V mA mA mA mA mW °C °C ICC or IGND DC VCC or Ground Current PD Power Dissipation Tstg TL Storage Temperature Lead Temperature (10 sec) Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO Top tr, tf Supply Voltage Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time VCC = 2.0V VCC = 4.5V VCC = 6.0V Parameter Value 2 to 6 0 to VCC 0 to VCC -55 to 125 0 to 1000 0 to 500 0 to 400 Unit V V V °C ns ns ns 4/13 M74HC4511 DC SPECIFICATIONS Test Condition Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 VOL Low Level Output Voltage 2.0 4.5 6.0 4.5 6.0 II ICC Input Leakage Current Quiescent Supply Current 6.0 6.0 IO=-20 µA IO=-20 µA IO=-20 µA IO=-4.0 mA IO=-5.2 mA IO=20 µA IO=20 µA IO=20 µA IO=4.0 mA IO=5.2 mA VI = VCC or GND VI = VCC or GND TA = 25°C Min. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.18 5.68 2.0 4.5 6.0 4.31 5.8 0.0 0.0 0.0 0.17 0.18 0.1 0.1 0.1 0.26 0.26 ± 0.1 4 1.9 4.4 5.9 4.13 5.63 0.1 0.1 0.1 0.37 0.37 ±1 40 Typ. Max. Value -40 to 85°C Min. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.10 5.60 0.1 0.1 0.1 0.40 0.40 ±1 80 µA µA V V Max. -55 to 125°C Min. 1.5 3.15 4.2 0.5 1.35 1.8 Max. V Unit VIH High Level Input Voltage Low Level Input Voltage High Level Output Voltage VIL V VOH 5/13 M74HC4511 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns) Test Condition Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 TA = 25°C Min. Typ. 25 7 6 30 8 7 125 33 23 70 22 17 60 15 12 95 32 23 30 8 7 20 5 4 Max. 60 12 11 75 15 13 255 51 43 175 35 30 120 24 20 240 48 41 75 15 13 75 15 13 0 0 0 Value -40 to 85°C Min. Max. 75 15 13 95 19 16 320 64 54 220 44 37 150 30 26 300 60 51 95 19 16 95 19 16 0 0 0 -55 to 125°C Min. Max. 90 18 15 110 22 19 385 77 65 265 53 45 180 36 31 360 72 61 110 22 19 110 22 19 0 0 0 ns Unit tTLH Output Transition Time Output Transition Time tTHL ns tPLH tPHL Propagation Delay Time (BCD - Seg.) tPLH tPHL Propagation Delay Time (BI - Seg.) tPLH tPHL Propagation Delay Time (LT - Seg.) tPLH tPHL Propagation Delay Time (LE - Seg.) tW(L) Minimum Pulse Width Minimum Set Up Time Minimum Hold Time ns ns ns ns ns ts ns th ns CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter VCC (V) 5.0 5.0 TA = 25°C Min. Typ. 5 95 Max. 10 Value -40 to 85°C Min. Max. 10 -55 to 125°C Min. Max. 10 pF pF Unit CIN CPD Input Capacitance Power Dissipation Capacitance (note 1) 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC 6/13 M74HC4511 TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50Ω) WAVEFORM 1 : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle) 7/13 M74HC4511 WAVEFORM 2 : MINIMUM PULSE WIDTH (f=1MHz; 50% duty cycle) W AVEFORM 3 : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle) 8/13 M74HC4511 WAVEFORM 4 : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle) W AVEFORM 5 : MINIMUM SETUP AND HOLD TIME (f=1MHz; 50% duty cycle) 9/13 M74HC4511 Plastic DIP-16 (0.25) MECHANICAL DATA mm. DIM. MIN. a1 B b b1 D E e e3 F I L Z 3.3 1.27 8.5 2.54 17.78 7.1 5.1 0.130 0.050 0.51 0.77 0.5 0.25 20 0.335 0.100 0.700 0.280 0.201 1.65 TYP MAX. MIN. 0.020 0.030 0.020 0.010 0.787 0.065 TYP. MAX. inch P001C 10/13 M74HC4511 SO-16 MECHANICAL DATA DIM. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 9.8 5.8 1.27 8.89 4.0 5.3 1.27 0.62 8° (max.) 0.149 0.181 0.019 10 6.2 0.35 0.19 0.5 45° (typ.) 0.385 0.228 0.050 0.350 0.157 0.208 0.050 0.024 0.393 0.244 0.1 mm. MIN. TYP MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.003 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010 PO13H 11/13 M74HC4511 TSSOP16 MECHANICAL DATA mm. DIM. MIN. A A1 A2 b c D E E1 e K L 0° 0.45 0.60 0.05 0.8 0.19 0.09 4.9 6.2 4.3 5 6.4 4.4 0.65 BSC 8° 0.75 0° 0.018 0.024 1 TYP MAX. 1.2 0.15 1.05 0.30 0.20 5.1 6.6 4.48 0.002 0.031 0.007 0.004 0.193 0.244 0.169 0.197 0.252 0.173 0.0256 BSC 8° 0.030 0.004 0.039 MIN. TYP. MAX. 0.047 0.006 0.041 0.012 0.0089 0.201 0.260 0.176 inch A A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080338D 12/13 M74HC4511 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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