M74HC534
OCTAL D-TYPE FLIP FLOP
WITH 3 STATE OUTPUT INVERTING
■
■
■
■
■
■
■
HIGH SPEED:
fMAX = 90MHz (TYP.) at VCC = 6V
LOW POWER DISSIPATION:
ICC = 4µA(MAX.) at TA=25°C
HIGH NOISE IMMUNITY:
VNIH = V NIL = 28 % VCC (MIN.)
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 6mA (MIN)
BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
WIDE OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 534
DESCRIPTION
The M74HC534 is an high speed CMOS OCTAL
D-TYPE FLIP FLOP WITH 3-STATE OUTPUTS
INVERTING fabricated with silicon gate C2MOS
technology.
This 8 bit D-TYPE FLIP FLOP is controlled by a
clock input (CK) and an output enable input (OE).
On the positive transition of the clock, the Q
outputs will be set to the logic state that were
setup at the D inputs.
While the OE input is at low level, the eight outputs
will be in a normal logic state (high or low logic
)
(s
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DIP
PACKAGE
TUBE
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TSSOP
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ORDER CODES
DIP
SOP
TSSOP
)
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ct
SOP
M74HC534B1R
M74HC534M1R
T&R
M74HC534RM13TR
M74HC534TTR
level) and while high level the outputs will be in a
high impedance state.
The output control does not affect the internal
operation of flip-flops; that is, the old data can be
retained or the new data can be entered even
while the outputs are off.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
t
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PIN CONNECTION AND IEC LOGIC SYMBOLS
August 2001
1/11
M74HC534
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
SYMBOL
1
OE
2, 5, 6, 9, 12,
15, 16, 19
3, 4, 7, 8, 13,
14, 17, 18
11
Q0 to Q7
3 State Output Enable
Input (Active LOW)
3 State Outputs
D0 to D7
Data Inputs
CLOCK
10
20
GND
VCC
Clock Input (LOW to
HIGH, edge triggered)
Ground (0V)
Positive Supply Voltage
TRUTH TABLE
NAME AND FUNCTION
u
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INPUTS
OE
CK
H
X
OUTPUT
D
X
e
t
e
ol
L
X
L
bs
L
X: Don’t Care
Z: High Impedance
O
)
LOGIC DIAGRAM
s
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This logic diagram has not be used to estimate propagation delays
2/11
)
s
(
ct
Pr
Q
Z
NO CHANGE
L
H
H
L
M74HC534
ABSOLUTE MAXIMUM RATINGS
Symbol
VCC
Parameter
Value
Supply Voltage
Unit
-0.5 to +7
V
-0.5 to VCC + 0.5
-0.5 to VCC + 0.5
V
DC Input Diode Current
± 20
mA
IOK
DC Output Diode Current
± 20
mA
IO
DC Output Current
± 35
mA
± 70
mA
500(*)
mW
VI
DC Input Voltage
VO
DC Output Voltage
IIK
ICC or IGND DC VCC or Ground Current
PD
Power Dissipation
Tstg
Storage Temperature
TL
Lead Temperature (10 sec)
V
)
s
(
t
-65 to +150
300
c
u
d
°C
°C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
e
t
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l
Parameter
Supply Voltage
VI
Input Voltage
VO
Output Voltage
Top
Operating Temperature
Input Rise and Fall Time
o
s
b
tr, tf
s
(
t
c
O
)
u
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P
Value
Unit
2 to 6
V
0 to VCC
V
0 to VCC
V
-55 to 125
°C
VCC = 2.0V
0 to 1000
ns
VCC = 4.5V
0 to 500
ns
VCC = 6.0V
0 to 400
ns
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3/11
M74HC534
DC SPECIFICATIONS
Test Condition
Symbol
VIH
Parameter
High Level Input
Voltage
Low Level Input
Voltage
VIL
VOH
VOL
II
High Level Output
Voltage
Low Level Output
Voltage
IOZ
Input Leakage
Current
High Impedance
Output Leakage
Current
Quiescent Supply
Current
ICC
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4/11
TA = 25°C
VCC
(V)
Min.
2.0
4.5
6.0
2.0
4.5
6.0
Typ.
Max.
1.5
3.15
4.2
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
1.5
3.15
4.2
0.5
1.35
1.8
0.5
1.35
1.8
1.9
2.0
1.9
1.9
IO=-20 µA
4.4
4.5
4.4
4.4
du
IO=-20 µA
5.9
6.0
5.9
IO=-6.0 mA
4.18
4.31
4.13
5.68
5.9
6.0
IO=-7.8 mA
2.0
IO=20 µA
0.0
0.1
4.5
IO=20 µA
0.0
0.1
o
r
P
6.0
IO=20 µA
0.0
0.1
4.5
IO=6.0 mA
0.17
6.0
IO=7.8 mA
0.18
6.0
5.8
V
5.63
V
)
s
(
ct
IO=-20 µA
4.5
Max.
0.5
1.35
1.8
4.5
6.0
Unit
1.5
3.15
4.2
2.0
V
4.10
5.60
0.1
0.1
0.1
0.1
0.1
0.1
0.26
0.33
0.40
0.26
0.33
0.40
VI = VCC or GND
± 0.1
±1
±1
µA
6.0
VI = VIH or VIL
VO = VCC or GND
± 0.5
±5
± 10
µA
6.0
VI = VCC or GND
4
40
80
µA
)
(s
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Value
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M74HC534
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns)
Test Condition
Symbol
Parameter
tTLH tTHL Output Transition
Time
tPLH tPHL Propagation Delay
Time
(CK - Q)
tPZL tPZH High Impedance
Output Enable
Time
tPLZ tPHZ High Impedance
Output Disable
Time
fMAX
Maximum Clock
Frequency
tW(L)
tW(H)
Minimum Pulse
Width (CK)
ts
Minimum Set-up
Time
e
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th
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Min.
50
50
150
50
RL = 1 KΩ
150
RL = 1 KΩ
50
RL = 1 KΩ
50
Typ.
Max.
25
7
6
45
15
13
60
20
17
39
13
11
54
18
15
30
14
13
18
75
90
15
6
6
25
6
4
60
12
10
140
28
24
190
38
32
135
27
23
185
37
31
125
25
21
6.2
31
37
50
50
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
75
15
13
175
35
30
240
48
41
170
34
29
230
46
39
155
31
26
let
5
25
30
75
15
13
75
15
13
0
0
0
50
Unit
Max.
90
18
15
210
42
36
285
57
48
205
41
35
280
56
48
190
38
32
ns
ns
)
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O
)
s
(
t
c
du
o
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P
Minimum Hold
Time
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
TA = 25°C
CL
(pF)
VCC
(V)
Value
4.2
21
25
95
19
16
95
19
16
0
0
0
ns
ns
ns
ns
ns
110
22
19
110
22
19
0
0
0
ns
ns
ns
CAPACITIVE CHARACTERISTICS
Test Condition
Symbol
Parameter
CIN
Input Capacitance
COUT
Output
Capacitance
Power Dissipation
Capacitance (note
1)
CPD
VCC
(V)
Value
TA = 25°C
Min.
Typ.
Max.
5
10
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
10
Unit
Max.
10
pF
10
pF
47
pF
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/8 (per Flip
Flop) and the CPD when n pcs of Flip Flop operate, can be gained by the following equation: CPD(TOTAL) = 30 + 17 x n (pF)
5/11
M74HC534
TEST CIRCUIT
)
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TEST
tPLH, tPHL
tPZL, tPLZ
e
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ol
tPZH, tPHZ
CL = 50pF/150pF or equivalent (includes jig and probe capacitance)
R1 = 1KΩ or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
s
b
O
Pr
SWITCH
Open
VCC
GND
WAVEFORM 1 : CK TO Qn PROPAGATION DELAYS, Dn TO CK SETUP AND HOLD TIMES,
MAXIMUM CK FREQUENCY (f=1MHz; 50% duty cycle)
)
(s
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6/11
M74HC534
WAVEFORM 2 : OUTPUT ENABLE AND DISABLE TIMES (f=1MHz; 50% duty cycle)
)
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WAVEFORM 3 : CK MINIMUM PULSE WIDTH (f=1MHz; 50% duty cycle)
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7/11
M74HC534
Plastic DIP-20 (0.25) MECHANICAL DATA
mm.
inch
DIM.
MIN.
a1
0.254
B
1.39
TYP
MAX.
MIN.
TYP.
MAX.
0.010
1.65
0.055
0.065
b
0.45
0.018
b1
0.25
0.010
D
)
s
(
ct
25.4
E
8.5
e
2.54
e3
22.86
u
d
o
0.335
7.1
I
3.93
s
(
t
c
1.34
e
t
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ol
bs
O
)
3.3
Z
Pr
0.100
F
L
1.000
0.900
0.280
0.155
0.130
0.053
u
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P001J
8/11
M74HC534
SO-20 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
A
MAX.
MIN.
TYP.
a1
2.65
MAX.
0.1
0.104
0.2
a2
0.004
0.008
2.45
0.096
b
0.35
0.49
0.014
b1
0.23
0.32
0.009
C
0.5
0.019
)
s
(
ct
0.012
0.020
c1
u
d
o
45° (typ.)
D
12.60
13.00
0.496
E
10.00
10.65
0.393
e
1.27
e3
11.43
F
7.40
7.60
L
0.50
1.27
M
)
(s
S
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ol
s
b
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0.75
Pr
0.512
0.419
0.050
0.450
0.291
0.300
0.020
0.050
0.029
8° (max.)
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PO13L
9/11
M74HC534
TSSOP20 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
MAX.
A
MIN.
TYP.
MAX.
1.2
A1
0.05
A2
0.8
b
0.047
0.15
0.002
0.004
0.006
1.05
0.031
0.039
0.041
0.19
0.30
0.007
c
0.09
0.20
0.004
D
6.4
6.5
6.6
0.252
E
6.2
6.4
6.6
0.244
E1
4.3
4.4
4.48
1
e
bs
0.65 BSC
K
0°
L
0.45
let
o
s
b
0.60
s
(
t
c
0.75
du
ro
P
e
A2
A1
b
0.260
0.252
0.260
0.173
0.176
0.0256 BSC
0°
8°
0.018
0.024
O
K
e
0.030
L
E
c
D
E1
PIN 1 IDENTIFICATION
1
0087225C
10/11
0.0089
0.256
u
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P
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A
O
)
8°
0.012
t
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0.169
)
s
(
ct
M74HC534
)
s
(
ct
u
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o
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P
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)
(s
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
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11/11
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