M74HC592TTR

M74HC592 8 BIT REGISTER BINARY COUNTER ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 53 MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 592 DESCRIPTION The M74HC592 is an high speed CMOS 8-BIT REGISTER COUNTER fabricated with silicon gate C2MOS technology. The M74HC592 is a parallel input, 8 bit storage register feeding an 8 bit binary counter. Both the register and the counter have individual positive edge triggered clock. In addition, the counter has ) (s t c u DIP PACKAGE TUBE t e l o s b O TSSOP u d o r P e ORDER CODES DIP SOP TSSOP ) s ( ct SOP M74HC592B1R M74HC592M1R T&R M74HC592RM13TR M74HC592TTR direct load and clear functions. Expansion is easily accomplished by connecting RCO at the first stage to the count enable of the second stage. All inputs are equipped with protection circuits against static discharge and transient excess voltage. d o r P e t e l o s b O PIN CONNECTION AND IEC LOGIC SYMBOLS August 2001 1/14 M74HC592 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL 1 to 7, 15 9 10 11 12 A to H RCO CCLR CCK CCKEN 13 14 8 16 RCK CLOAD GND VCC NAME AND FUNCTION Data Inputs Ripple Carry Output Counter Clear Input Counter Clock Input Counter Clock Enable Input Register Clock Input Counter Load Input Ground (0V) Positive Supply Voltage ) s ( ct u d o TRUTH TABLE r P e INPUTS OUTPUT RCK CLOAD CCLR CCKEN CCK x x L H H L X X X X REGISTER DATA IS LOADED INTO COUNTER COUNTER CLEAR H H X X THE DATA OF A THRU H INPUTS IS STORED INTO REGISTER H H X X REGISTER STATE IS NOT CHANGED X H H L X H H L X H H H t c u ) (s X t e l o s b O COUNTER ADVANCES THE COUNT NO COUNT NO COUNT X: Don’t Care RCO = QA’·QB’·QC’·QD’·QE’·QF’·QG’·QH’ (QA’ to QH’ : INTERNAL OUTPUTS OF THE COUNTER) d o r P e t e l o s b O 2/14 M74HC592 LOGIC DIAGRAM ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O This logic diagram has not be used to estimate propagation delays 3/14 M74HC592 TIMING CHART ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e ABSOLUTE MAXIMUM RATINGS t e l o Symbol VCC Supply Voltage Parameter Value Unit -0.5 to +7 V VI DC Input Voltage -0.5 to VCC + 0.5 V VO DC Output Voltage IIK DC Input Diode Current -0.5 to VCC + 0.5 ± 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA s b O ICC or IGND DC VCC or Ground Current PD Power Dissipation Tstg Storage Temperature TL Lead Temperature (10 sec) V ± 50 mA 500(*) mW -65 to +150 °C 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C 4/14 M74HC592 RECOMMENDED OPERATING CONDITIONS Symbol Parameter VCC Value Supply Voltage VI Input Voltage VO Output Voltage Top Operating Temperature Input Rise and Fall Time tr, tf Unit 2 to 6 V 0 to VCC V 0 to VCC V -55 to 125 °C VCC = 2.0V 0 to 1000 ns VCC = 4.5V 0 to 500 ns VCC = 6.0V 0 to 400 ns ) s ( ct DC SPECIFICATIONS Test Condition Symbol VIH Parameter Min. 2.0 4.5 6.0 2.0 4.5 6.0 Low Level Input Voltage VOH TA = 25°C VCC (V) High Level Input Voltage VIL High Level Output Voltage 1.5 3.15 4.2 IO=-20 µA 4.5 IO=-20 µA 6.0 ICC ete ol s b O II Pr Input Leakage Current Quiescent Supply Current b O u d o -40 to 85°C Max. e t e l Pr Min. Max. 1.5 3.15 4.2 0.5 1.35 1.8 -55 to 125°C Min. 0.5 1.35 1.8 2.0 1.9 1.9 4.4 4.5 4.4 4.4 5.9 6.0 5.9 5.9 IO=-4.0 mA 4.18 4.31 4.13 4.10 IO=-5.2 mA 5.68 5.8 5.63 V 0.5 1.35 1.8 1.9 Unit Max. 1.5 3.15 4.2 IO=-20 µA s ( t c u d o Low Level Output Voltage )- 2.0 4.5 Typ. so 6.0 VOL Value V V 5.60 2.0 IO=20 µA 0.0 0.1 0.1 0.1 4.5 IO=20 µA 0.0 0.1 0.1 0.1 6.0 IO=20 µA 0.0 0.1 0.1 0.1 4.5 IO=4.0 mA 0.17 0.26 0.33 0.40 6.0 IO=5.2 mA 0.18 0.26 0.33 0.40 6.0 VI = VCC or GND ± 0.1 ±1 ±1 µA 6.0 VI = VCC or GND 4 40 80 µA V 5/14 M74HC592 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns) Test Condition Symbol Parameter tPLH tPHL Propagation Delay Time (CCK - RCO) tPLH tPHL Propagation Delay Time (CLOAD - RCO) tPHL Propagation Delay Time (CCLR - RCO) tPLH tPHL Propagation Delay Time (RCK - RCO) fMAX Maximum Clock Frequency tW(H) tW(L) Minimum Pulse Width tW(L) Minimum Pulse Width (CCLR, CLOAD) ts e t e ol ts s b O th tREM 6/14 Minimum Set-up Time (RCK-CLOAD) (A...H - RCK) Minimum Hold Time Minimum Removal Time 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 Min. 5.4 27 32 6.0 2.0 4.5 6.0 2.0 4.5 6.0 )- s ( t c du o r P Minimum Set-up Time (CCKEN CCK) TA = 25°C VCC (V) tTLH tTHL Output Transition Time Value -55 to 125°C Min. Min. Typ. Max. 30 8 7 63 21 18 110 30 26 70 20 17 120 34 29 11 45 53 40 8 7 40 8 7 28 7 6 40 10 75 15 13 165 33 28 235 47 40 160 32 27 260 52 44 Max. 75 15 13 75 15 13 75 15 13 100 20 95 19 16 95 19 16 95 19 16 125 25 110 22 19 110 22 19 110 22 19 145 29 9 17 21 25 28 7 6 0 0 0 75 15 13 0 0 0 95 19 16 0 0 0 110 22 19 95 19 16 205 41 35 295 59 50 200 40 34 325 65 55 4.4 22 26 Unit Max. 110 22 19 250 50 43 355 71 60 240 48 41 390 78 66 ns ns ) s ( ct u d o r P e let so b O -40 to 85°C 3.6 18 21 ns ns ns MHz ns ns ns ns ns ns M74HC592 CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter Value TA = 25°C VCC (V) Min. Typ. Max. 10 CIN Input Capacitance 5 CPD Power Dissipation Capacitance (note 1) 30 -40 to 85°C -55 to 125°C Min. Min. Max. 10 Unit Max. 10 pF pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC ) s ( ct TEST CIRCUIT u d o r P e t e l o ) (s s b O t c u d o r CL = 50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50Ω) P e t e l o s b O 7/14 M74HC592 WAVEFORM 1 : MINIMUM PULSE WIDTH, REMOVAL TIME (f=1MHz; 50% duty cycle) ) s ( ct u d o r P e t e l o ) (s t c u d o r P e t e l o s b O 8/14 s b O M74HC592 WAVEFORM 2 : PROPAGATION DELAY TIME, MINIMUM PULSE WIDTH (f=1MHz; 50% duty cycle) ) s ( ct u d o r P e t e l o WAVEFORM 3 : MINIMUM SETUP AND HOLD TIME (f=1MHz; 50% duty cycle) ) (s s b O t c u d o r P e t e l o s b O 9/14 M74HC592 WAVEFORM 4 : MINIMUM SETUP AND HOLD TIME (f=1MHz; 50% duty cycle) ) s ( ct u d o r P e t e l o WAVEFORM 5 : MINIMUM PULSE WIDTH, SETUP AND HOLD TIME (f=1MHz; 50% duty cycle) ) (s t c u d o r P e t e l o s b O 10/14 s b O M74HC592 Plastic DIP-16 (0.25) MECHANICAL DATA mm. inch DIM. MIN. a1 0.51 B 0.77 TYP MAX. MIN. TYP. MAX. 0.020 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D ) s ( ct 20 E 8.5 e 2.54 e3 17.78 u d o 0.335 7.1 I 5.1 s ( t c 1.27 e t e ol bs O ) 3.3 Z Pr 0.100 F L 0.787 0.700 0.280 0.201 0.130 0.050 u d o r P e t e l o s b O P001C 11/14 M74HC592 SO-16 MECHANICAL DATA mm. DIM. MIN. TYP A inch MAX. MIN. TYP. a1 1.75 MAX. 0.1 0.068 0.2 a2 0.003 0.007 1.65 0.064 b 0.35 0.46 0.013 b1 0.19 0.25 0.007 C 0.5 0.018 ) s ( ct 0.010 0.019 c1 45° (typ.) D 9.8 10 0.385 E 5.8 6.2 0.228 e 1.27 e3 8.89 F 3.8 4.0 4.6 5.3 L 0.5 ) (s e t e l so b O 1.27 S Pr 0.393 0.244 0.050 G M u d o 0.62 0.350 0.149 0.157 0.181 0.208 0.019 0.050 0.024 8° (max.) t c u d o r P e t e l o s b O PO13H 12/14 M74HC592 TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 c 0.09 0.20 0.004 D 4.9 5 5.1 0.193 E 6.2 6.4 6.6 0.244 E1 4.3 4.4 4.48 1 e bs 0.65 BSC K 0° L 0.45 let o s b 0.60 s ( t c 0.75 du ro P e 0.0089 0.197 0.201 0.252 0.260 0.173 0.176 0.0256 BSC 0° 8° 0.018 0.024 0.030 u d o r P e A O ) 8° 0.012 t e l o 0.169 ) s ( ct A2 A1 b O e K c L E D E1 PIN 1 IDENTIFICATION 1 0080338D 13/14 M74HC592 ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. 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