M74HC623B1R

M74HC623 OCTAL BUS TRANSCEIVER WITH 3 STATE OUTPUTS (NON INVERTING) ■ ■ HIGH SPEED: tPD = 10ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 6mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 623 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O ■ ■ ■ ■ ■ DESCRIPTION The 74HC623 is an advanced high-speed CMOS OCTAL BUS TRANSCEIVER (3-STATE) fabricated with silicon gate technology. This IC is intended for two-way asynchronous communication between data buses. The control function implementation allows maximum flexibility in timing. This device allows data transmission from the A bus to B bus or from the B to the A bus depending upon the logic level levels at the enable inputs (GBA and GAB). The enable inputs can be used to disable the device so that the buses are effectively isolated. The dual enable configuration gives this DIP SOP TSSOP ORDER CODES PACKAGE TUBE DIP SOP TSSOP M74HC623B1R M74HC623M1R T&R M74HC623RM13TR M74HC623TTR device the capability to store data by simultaneous enabling of GBA and GAB. Each output reinforces its input in this transceiver configuration. Thus, when both control inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (16 in all) will remain at their last states. The 8-bit codes appearing on the two sets of buses will be identical. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS August 2001 1/11 M74HC623 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL 1, 19 2, 3, 4, 5, 6, 7, 8, 9 11, 12, 13, 14, 15, 16, 17, 18 10 20 GBA , GAB A1 to A8 Direction Control Data Inputs/Outputs B1 to B8 Data Inputs/Outputs GND VCC NAME AND FUNCTION Ground (0V) Positive Supply Voltage ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O TRUTH TABLE INPUTS FUNCTION OUTPUT GAB GBA L H L H L H H L A BUS OUTPUT INPUT INPUT OUTPUT HIGH IMPEDANCE HIGH IMPEDANCE X : Don’t Care Z : High Impedance LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays 2/11 B BUS A=B B=A Z Z M74HC623 ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Value Supply Voltage Unit -0.5 to +7 V -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 V DC Input Diode Current ± 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 35 mA ± 70 mA 500(*) mW VI DC Input Voltage VO DC Output Voltage IIK ICC or IGND DC VCC or Ground Current PD Power Dissipation Tstg Storage Temperature TL Lead Temperature (10 sec) V ) s ( t -65 to +150 300 c u d °C °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C RECOMMENDED OPERATING CONDITIONS Symbol VCC VI Input Voltage VO Output Voltage Top Operating Temperature o s b Input Rise and Fall Time O ) s ( t c tr, tf u d o r P e t e l o s b O e t e l Parameter Supply Voltage ) s ( ct o r P c u d Value ) s t( Unit 2 to 6 V 0 to VCC V o r P 0 to VCC V -55 to 125 °C VCC = 2.0V 0 to 1000 ns VCC = 4.5V 0 to 500 ns VCC = 6.0V 0 to 400 ns b O - so e t le u d o r P e t e l o s b O 3/11 M74HC623 DC SPECIFICATIONS Test Condition Symbol VIH VIL Parameter High Level Input Voltage Low Level Input Voltage Value TA = 25°C VCC (V) Min. 2.0 4.5 6.0 2.0 4.5 6.0 Typ. Max. 1.5 3.15 4.2 -40 to 85°C -55 to 125°C Min. Min. Max. 1.5 3.15 4.2 0.5 1.35 1.8 Unit Max. 1.5 3.15 4.2 0.5 1.35 1.8 V 0.5 1.35 1.8 V ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O VOH VOL II IOZ ICC 4/11 High Level Output Voltage Low Level Output Voltage Input Leakage Current High Impedance Output Leakage Current Quiescent Supply Current 2.0 IO=-20 µA 1.9 2.0 1.9 1.9 4.5 IO=-20 µA 4.4 4.5 4.4 4.4 6.0 IO=-20 µA 5.9 6.0 5.9 5.9 4.5 IO=-6.0 mA 4.18 4.31 4.13 4.10 5.68 V 6.0 IO=-7.8 mA 2.0 IO=20 µA 0.0 0.1 0.1 0.1 4.5 IO=20 µA 0.0 0.1 0.1 0.1 6.0 IO=20 µA 0.0 0.1 0.1 0.1 4.5 IO=6.0 mA 0.17 0.26 0.33 0.40 6.0 IO=7.8 mA 0.18 0.26 0.33 0.40 6.0 VI = VCC or GND ± 0.1 ±1 ±1 µA 6.0 VI = VIH or VIL VO = VCC or GND ± 0.5 ±5 ± 10 µA 6.0 VI = VCC or GND 4 40 80 µA 5.8 5.63 5.60 V M74HC623 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns) Test Condition Symbol Parameter tTLH tTHL Output Transition Time tPLH tPHL Propagation Delay Time VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 Value TA = 25°C CL (pF) Min. 50 50 Typ. Max. 25 7 6 38 12 10 51 16 14 57 19 16 69 23 20 43 18 15 60 12 10 85 17 14 130 26 22 150 30 26 180 36 31 125 25 21 -40 to 85°C -55 to 125°C Min. Min. Max. 75 15 13 105 21 18 165 33 28 190 38 32 225 45 38 155 31 26 Unit Max. 90 18 15 130 26 22 195 39 33 225 45 38 270 54 46 190 38 32 ns ns ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O tPZL tPZH High Impedance Output Enable Time tPLZ tPHZ High Impedance Output Disable Time 150 50 RL = 1 KΩ 150 RL = 1 KΩ 50 RL = 1 KΩ ns ns ns ns CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter VCC (V) Value TA = 25°C Min. Typ. Max. 10 CIN Input Capacitance 5 CPD Power Dissipation Capacitance (note 1) 34 -40 to 85°C -55 to 125°C Min. Min. Max. 10 Unit Max. 10 pF pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC 5/11 M74HC623 TEST CIRCUIT ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O TEST tPLH, tPHL SWITCH Open tPZL, tPLZ VCC tPZH, tPHZ GND CL = 50pF/150pF or equivalent (includes jig and probe capacitance) R1 = 1KΩ or equivalent RT = ZOUT of pulse generator (typically 50Ω) WAVEFORM 1: PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle) 6/11 M74HC623 WAVEFORM 2 : OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle) ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O 7/11 M74HC623 Plastic DIP-20 (0.25) MECHANICAL DATA mm. inch DIM. MIN. a1 0.254 B 1.39 b TYP MAX. MIN. TYP. MAX. 0.010 1.65 0.45 0.055 0.065 0.018 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O b1 0.25 D 0.010 25.4 1.000 E 8.5 0.335 e 2.54 0.100 e3 22.86 0.900 F 7.1 0.280 I 3.93 0.155 L Z 3.3 0.130 1.34 0.053 P001J 8/11 M74HC623 SO-20 MECHANICAL DATA mm. inch DIM. MIN. TYP A a1 MIN. TYP. 2.65 0.1 0.004 0.008 2.45 0.35 MAX. 0.104 0.2 a2 b MAX. 0.096 0.49 0.014 0.019 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O b1 0.23 C 0.32 0.009 0.5 0.012 0.020 c1 45° (typ.) D 12.60 13.00 0.496 0.512 E 10.00 10.65 0.393 0.419 e 1.27 0.050 e3 11.43 0.450 F 7.40 7.60 0.291 0.300 L 0.50 1.27 0.020 0.050 M S 0.75 0.029 8° (max.) PO13L 9/11 M74HC623 TSSOP20 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. A MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 6.4 6.5 6.6 0.252 0.256 0.260 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 1 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O e 0.65 BSC K 0° L 0.45 A 0.0256 BSC 0.60 8° 0° 0.75 0.018 8° 0.024 0.030 A2 A1 b K e L E c D E1 PIN 1 IDENTIFICATION 1 0087225C 10/11 M74HC623 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom © http://www.st.com 11/11