M74HCT04_08

M74HCT04 Hex inverter Features ■ ■ ■ ■ ■ ■ High speed: tPD = 11 ns (typ.) at VCC = 4.5 V Low power dissipation: ICC = 1 μA (max.) at TA = 25 °C Compatible with TTL outputs: VIH = 2 V (min.) VIL = 0.8 V (max) Balanced propagation delays: tPLH ≅ tPHL Symmetrical output impedance: |IOH| = IOL = 4 mA (min) Pin and function compatible with 74 series 04 SO-14 DIP-14 Description The M74HCT04 is a high speed CMOS hex inverter fabricated with silicon gate C2MOS technology. The internal circuit is composed of 3 stages including a buffer output, which enables high noise immunity and stable output. The M74HCT04 is designed to directly interface HSC2MOS systems with TTL and NMOS components. All inputs are equipped with protection circuits against static discharge and transient excess voltage. Table 1. Device summary Order code M74HCT04B1R Package DIP-14 SO-14 Packing Tube Tape and reel M74HCT04RM13TR May 2008 Rev 2 1/11 www.st.com 11 Pin connection and IEC logic symbols M74HCT04 1 Pin connection and IEC logic symbols Figure 1. Pin connections and IEC logic symbols 1A 1Y 2A 2Y 3A 3Y GND 1 14 VCC 6A 6Y 5A 5Y 4A 4Y 2 3 4 5 6 7 13 12 11 10 9 8 Table 2. Pin description Symbol 1A to 6A 1Y to 6Y GND VCC Data inputs Data outputs Ground (0 V) Positive supply voltage Name and function Pin number 1, 3, 5, 9, 11, 13 2, 4, 6, 8, 10, 12 7 14 Figure 2. Input and output equivalent circuit VCC VCC Input Output GND GND Table 3. Truth table A L H Y H L 2/11 M74HCT04 Maximum rating 2 Maximum rating Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only, and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 4. Symbol VCC VI VO IIK IOK IO ICC or IGND PD Tstg TL Supply voltage DC input voltage DC output voltage DC input diode current DC output diode current DC output current DC VCC or Ground current Power dissipation Storage temperature Lead temperature (10 sec) Absolute maximum ratings Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 ± 20 ± 20 ± 25 ± 50 500(1) -65 to +150 300 Unit V V V mA mA mA mA mW °C °C 1. 500 mW at 65 ° C; derate to 300 mW by 10 mW/ ° C from 65 ° C to 85 ° C Table 5. Symbol VCC VI VO Top tr, tf Recommemded operating conditions Parameter Supply voltage Input voltage Output voltage Operating temperature Input rise and fall time (VCC = 4.5 to 5.5 V) Value 4.5 to 5.5 0 to VCC 0 to VCC -55 to 125 0 to 500 Unit V V V °C ns 3/11 Maximum rating Table 6. DC specifications Test condition Symbol Parameter TA = 25 °C Min VIH High level input voltage Low level input voltage High level output voltage Low level output voltage Input leakage current Quiescent supply current 4.5 to 5.5 4.5 to 5.5 4.5 IO = -20 μA IO = -4.0 mA 4.5 IO = 20 μA IO = 4.0 mA 5.5 5.5 VI = VCC or GND VI = VCC or GND Per input pin VI = 0.5 V or VI = 2.4 V Other inputs at VCC or GND IO = 0 4.4 4.18 4.5 4.31 0.0 0.17 0.1 0.26 ± 0.1 1 2.0 Typ Max Value -40 to 85°C Min 2.0 Max M74HCT04 VCC (V) -55 to 125°C Min 2.0 Max Unit V VIL 0.8 4.4 4.13 0.8 4.4 0.8 V VOH V 4.10 0.1 0.33 ±1 10 0.1 V 0.40 ±1 20 μA μA VOL II ICC Δ ICC Additional worst case supply current 5.5 2.0 2.9 3.0 mA Table 7. AC electrical characteristics (CL = 50 pF, input tr = tf = 6 ns) Test condition Value TA = 25°C Min. Typ. 8 11 Max. 15 18 -40 to 85°C Min. Max. 19 23 -55 to 125°C Min. Max. 23 27 ns ns Unit Symbol Parameter VCC (V) tTLH tTHL tPLH tPHL Output transition time Propagation delay time 4.5 4.5 4/11 M74HCT04 Maximum rating Table 8. Capacitive characteristics Test condition Value TA = 25°C Min Typ 5 20 Max 10 -40 to 85°C Min Max 10 -55 to 125°C Min Max 10 pF pF Unit Symbol Parameter VCC (V) CIN CPD Input capacitance Power dissipation capacitance (1) 1. CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/6 (per gate) 5/11 Test circuit M74HCT04 3 Test circuit Figure 3. Test circuit 1. CL = 50pF or equivalent (includes jig and probe capacitance) 2. RT = ZOUT of pulse generator (typically 50Ω) Figure 4. Waveform: propagation delay times (f = 1 MHz; 50 % duty cycle) 6/11 M74HCT04 Package mechanical data 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 7/11 Package mechanical data M74HCT04 Plastic DIP-14 MECHANICAL DATA mm. DIM. MIN. a1 B b b1 D E e e3 F I L Z 1.27 3.3 2.54 0.050 8.5 2.54 15.24 7.1 5.1 0.130 0.100 0.51 1.39 0.5 0.25 20 0.335 0.100 0.600 0.280 0.201 1.65 TYP MAX. MIN. 0.020 0.055 0.020 0.010 0.787 0.065 TYP. MAX. inch P001A 8/11 M74HCT04 Package mechanical data SO-14 MECHANICAL DATA DIM. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 8.55 5.8 1.27 7.62 4.0 5.3 1.27 0.68 8° (max.) 0.149 0.181 0.019 8.75 6.2 0.35 0.19 0.5 45° (typ.) 0.336 0.228 0.050 0.300 0.157 0.208 0.050 0.026 0.344 0.244 0.1 mm. MIN. TYP MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.003 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010 PO13G 9/11 Package mechanical data M74HCT04 Tape & Reel SO-14 MECHANICAL DATA mm. DIM. MIN. A C D N T Ao Bo Ko Po P 6.4 9 2.1 3.9 7.9 12.8 20.2 60 22.4 6.6 9.2 2.3 4.1 8.1 0.252 0.354 0.082 0.153 0.311 TYP MAX. 330 13.2 0.504 0.795 2.362 0.882 0.260 0.362 0.090 0.161 0.319 MIN. TYP. MAX. 12.992 0.519 inch 10/11 M74HCT04 Revision history 5 Revision history Table 9. Date July-2001 23-May-2008 Document revision history Revision 1 2 Initial release. Document converted and restructured to new template. Removed: M74HC04M1R and M74HCT04TTR order codes. Added: tape and reel specifications for SO-14 package. Changes 11/11