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M74HCT138M1R

M74HCT138M1R

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

  • 描述:

    M74HCT138M1R - 3 TO 8 LINE DECODER INVERTING - STMicroelectronics

  • 详情介绍
  • 数据手册
  • 价格&库存
M74HCT138M1R 数据手册
M 54HCT138 M74HCT138 3 TO 8 LINE DECODER (INVERTING) . . . . . . . HIGH SPEED tPD = 16 ns (TYP.) at VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA AT TA = 25 °C OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS BALANCED PROPAGATION DELAYS tPLH = tPHL SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) PIN AND FUNCTION COMPATIBLE WITH 54/74LS138 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) DESCRIPTION The M54/74HC138 is a high speed CMOS 3 TO 8 LINE DECODER fabricated in silicon gate C 2MOS technology. It has the same high speed performance of LSTTL combined with true CMOSlow power consumption. If the device is enabled, 3 binary select inputs (A, B and C) determine which one of the outputs will go low. If enable input G1 is held low or either G2A or G2B is held high, the decoding function is inhibited and all the 8 outputs go high. Three enable inputs are provided to ease cascade connection and application of address decoders for memory systems. All inputs are equipped with protection circuits against static discharge and tran- sient excess voltage.This integrated circuit has input and output characteristics that are fully compatible with 54/74 LSTTL logic families. M54/74HCT devices 2 are designed to directly interface HSC MOS systems with TTL and NMOS components. They are also plug in replacements for LSTTL devices giving a reduction of power consumption. INPUT AND OUTPUT EQUIVALENT CIRCUIT ORDER CODES : M54HCT138F1R M74HCT138M1R M74HCT138B1R M74HCT138C1R PIN CONNECTIONS (top view) NC = No Internal Connection February 1993 1/10 M54/M74HCT138 T RUTH TABLE INPUTS ENABLE G2B G2A X X X H H X L L L L L L L L L L L L L L L L X: Don’t Care G1 L X X H H H H H H H H C X X X L L L L H H H H SELECT B X X X L L H H L L H H OUTPUTS A X X X L H L H L H L H Y0 H H H L H H H H H H H Y1 H H H H L H H H H H H Y2 H H H H H L H H H H H Y3 H H H H H H L H H H H Y4 H H H H H H H L H H H Y5 H H H H H H H H L H H Y6 H H H H H H H H H L H Y7 H H H H H H H H H H L PIN DESCRIPTION PIN No 1, 2, 3 4, 5 6 15, 14, 13, 12, 11, 10, 9, 7 8 16 SYMBOL A, B, C G2A, G2B G1 Y0 to Y7 NAME AND FUNCTION Address Inputs Enable Inputs Enable Input Outputs IEC LOGIC SYMBOL GND V CC Ground (0V) Positive Supply Voltage LOGIC DIAGRAM 2/10 M54/M74HCT138 A BSOLUTE MAXIMUM RATINGS Symbol VCC VI VO IIK IOK IO ICC or IGND PD Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Source Sink Current Per Output Pin DC VCC or Ground Current Power Dissipation Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 ± 20 ± 20 ± 25 ± 50 500 (*) -65 to +150 300 Unit V V V mA mA mA mA mW o o C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition isnotimplied. (*) 500 mW: ≅ 65 oC derate to 300 mW by 10mW/oC: 65 oC to 85 oC RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO Top tr, tf Parameter Supply Voltage Input Voltage Output Voltage Operating Temperature: M54HC Series M74HC Series Input Rise and Fall Time (VCC = 4.5 to 5.5V) Value 4.5 to 5.5 0 to VCC 0 to VCC -55 to +125 -40 to +85 0 to 500 Unit V V V o o C C ns 3/10 M54/M74HCT138 D C SPECIFICATIONS Test Conditions Symbol Parameter VCC (V) 4.5 to 5.5 4.5 to 5.5 4.5 VI = IO=-20 µA VIH or IO=-4.0 mA V IL VI = IO= 20 µA VIH or IO= 4.0 mA V IL VI = VCC or GND VI = VCC or GND Per Input pin VI = 0.5V or V I = 2.4V Other Inputs at V CC or GND 4.4 4.18 4.5 4.31 0.0 0.17 0.1 0.26 ±0.1 4 2.0 TA = 25 oC 54HC and 74HC Min. Typ. Max. 2.0 Value -40 to 85 oC -55 to 125 oC 74HC 54HC Min. Max. Min. Max. 2.0 2.0 Unit VIH High Level Input Voltage Low Level Input Voltage High Level Output Voltage V V IL 0.8 0.8 0.8 V V OH 4.4 4.13 0.1 0.33 ±1 40 2.9 4.4 4.10 0.1 V 0.4 ±1 80 3.0 µA µA mA V VOL Low Level Output Voltage 4.5 II ICC ∆ICC Input Leakage Current Quiescent Supply Current Additional worst case supply current 5.5 5.5 5.5 4/10 M54/M74HCT138 A C ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = tf = 6 ns) Test Conditions Symbol Parameter VCC (V) 4.5 4.5 TA = 25 oC 54HC and 74HC Min. Typ. Max. 8 17 15 30 Value -40 to 85 oC -55 to 125 oC 74HC 54HC Min. Max. Min. Max. 19 38 22 45 ns 4.5 16 30 38 45 ns 4.5 19 30 38 45 ns 5 52 10 10 10 pF pF Unit tTLH tTHL tPLH tPHL tPLH tPHL tPLH tPHL CIN CPD (*) Output Transition Time Propagation Delay Time (A, B, C - Y) Propagation Delay Time (G1 - Y) Propagation Delay Time (G2 - Y) Input Capacitance Power Dissipation Capacitance ns (*) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC SWITCHING CHARACTERISTICS TEST WAVEFORM TEST CIRCUIT ICC (Opr.) INPUT WAVEFORM IS THE SAME AS THAT IN CASE OF SWITCHING CHARACTERISTICSTEST. 5/10 M54/M74HCT138 Plastic DIP16 (0.25) MECHANICAL DATA mm MIN. a1 B b b1 D E e e3 F I L Z 3.3 1.27 8.5 2.54 17.78 7.1 5.1 0.130 0.050 0.51 0.77 0.5 0.25 20 0.335 0.100 0.700 0.280 0.201 1.65 TYP. MAX. MIN. 0.020 0.030 0.020 0.010 0.787 0.065 inch TYP. MAX. DIM. P001C 6/10 M54/M74HCT138 Ceramic DIP16/1 MECHANICAL DATA mm MIN. A B D E e3 F G H L M N P Q 7.8 2.29 0.4 1.17 0.22 0.51 0.38 17.78 2.79 0.55 1.52 0.31 1.27 10.3 8.05 5.08 0.307 0.090 0.016 0.046 0.009 0.020 3.3 0.015 0.700 0.110 0.022 0.060 0.012 0.050 0.406 0.317 0.200 TYP. MAX. 20 7 0.130 MIN. inch TYP. MAX. 0.787 0.276 DIM. P053D 7/10 M54/M74HCT138 SO16 (Narrow) MECHANICAL DATA DIM. MIN. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 9.8 5.8 1.27 8.89 4.0 5.3 1.27 0.62 8° (max.) 0.149 0.181 0.019 10 6.2 0.35 0.19 0.5 45° (typ.) 0.385 0.228 0.050 0.350 0.157 0.208 0.050 0.024 0.393 0.244 0.1 mm TYP. MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.004 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010 P013H 8/10 M54/M74HCT138 PLCC20 MECHANICAL DATA mm MIN. A B D d1 d2 E e e3 F G M M1 1.27 1.14 7.37 1.27 5.08 0.38 0.101 0.050 0.045 9.78 8.89 4.2 2.54 0.56 8.38 0.290 0.050 0.200 0.015 0.004 TYP. MAX. 10.03 9.04 4.57 MIN. 0.385 0.350 0.165 0.100 0.022 0.330 inch TYP. MAX. 0.395 0.356 0.180 DIM. P027A 9/10 M54/M74HCT138 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use ascritical components in life support devices or systems without express written approval of SGS-THOMSON Microelectonics. © 1994 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A 10/10
M74HCT138M1R
### 物料型号 - M54HCT138F1R - M74HCT138M1R - M74HCT138B1R - M74HCT138C1R

### 器件简介 M54/74HC138是一款采用硅门C²MOS工艺制造的高速CMOS 3至8线解码器。它结合了LSTTL的高速性能和CMOS的低功耗特性。该器件具有3个二进制选择输入(A、B和C),在使能时,它们确定哪个输出将变为低电平。如果使能输入G1为低电平,或G2A或G2B任一为高电平,则解码功能被禁止,所有8个输出变为高电平。提供三个使能输入以便于级联连接和在存储器系统中应用地址解码器。所有输入都配备了防静电和瞬态过电压的保护电路。该集成电路的输入和输出特性与54/74 LSTTL逻辑系列完全兼容。M54/74HCT系列设计用于直接将HSC MOS系统与TTL和NMOS组件接口连接。它们也是LSTTL设备的即插即用替代品,可降低功耗。

### 引脚分配 - 1,2,3: A,B,C(地址输入) - 4,5: G2A, G2B(使能输入) - 6: G1(使能输入) - 15, 14, 13, 12, 11, 10, 9, 7: Y0到Y7(输出) - 8: GND(地,0V) - 16: Vcc(正供电电压)

### 参数特性 - 供电电压(Vcc):-0.5到+7V - 输入电压(V1):-0.5到Vcc + 0.5V - 输出电压(Vo):-0.5到Vcc + 0.5V - 输入二极管电流(K):±20mA - 输出二极管电流(loK):±20mA - 每个输出引脚的DC输出源/汇电流(lo):±25mA - DC Vcc或地电流(lcc或IGND):±50mA - 功耗(PD):500mW() - 存储温度(Tstg):-65到+150℃ - 引脚温度(TL,10秒):300℃

### 功能详解 M54/74HCT138是一个3至8线的解码器,当使能时,三个选择输入(A、B和C)会确定哪个输出将变为低电平。如果使能输入G1为低,或G2A或G2B任一为高,则所有输出变为高电平,解码功能被抑制。该器件适用于存储器系统的地址解码器和级联连接。

### 应用信息 M54/74HCT138适用于需要高速性能和低功耗的场合,可以直接与TTL和NMOS组件接口连接,也适用于作为LSTTL设备的即插即用替代品。

### 封装信息 - Plastic DIP16 (0.25英寸) - Ceramic DIP16/1 - SO16(窄体) - PLCC20
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