M74HCT164RM13TR

M74HCT164 8 BIT SIPO SHIFT REGISTER ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 24 ns (TYP.) at VCC = 4.5V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 164 DIP TSSOP ORDER CODES DESCRIPTION The M74HCT164 is an high speed CMOS 8 BIT SIPO SHIFT REGISTER fabricated with silicon gate C2MOS technology. The 74HCT164 is an 8 bit shift register with serial data entry and an output from each of the eight stages. Data is entered serially through one of two inputs (A or B), either of these inputs can be used as an active high enable for data entry through the other input. An unused input must be high, or both inputs connected together. Each low-to-high transition on the clock inputs shifts data one place to the right and enters into QA, the logic NAND of ) s ( ct SOP PACKAGE TUBE DIP SOP TSSOP M74HCT164B1R M74HCT164M1R ) s t( T&R o r P c u d M74HCT164RM13TR M74HCT164TTR the two data inputs (A x B), the data that existed before the rising clock edge. A low level on the clear input overrides all other inputs and clears the register asynchronously, forcing all Q outputs low. The M74HCT164 is designed to directly interface HSC2MOS systems with TTL and NMOS components. All inputs are equipped with protection circuits against static discharge and transient excess voltage. e t le o s b O - u d o r P e t e l o PIN CONNECTION AND IEC LOGIC SYMBOLS s b O July 2001 1/11 M74HCT164 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL 1,2 3, 4, 5, 6, 10, 11, 12, 13 A, B NAME AND FUNCTION QA to QH Data Inputs 8 CLOCK 9 7 14 CLEAR GND Vcc Outputs Clock Input (LOW to HIGH, Edge Triggered Master Reset Input Ground (0V) Positive Supply Voltage TRUTH TABLE INPUTS OUTPUTS SERIAL IN CLEAR CLOCK QA QB ........... L L ........... A B X X H X X H L X L H X L L H H H H L X o s b O - P e let QAn QAn X : Don’t Care QAn - QGn : The level of QA - QG, respectively. before the most-recent transition of the clock LOGIC DIAGRAM ) s ( ct u d o r P e t e l o s b O This logic diagram has not be used to estimate propagation delays 2/11 d o r NO CHANGE QAn uc ) s t( QH L ........... QGn ........... QGn ........... QGn M74HCT164 TIMING CHART c u d e t le ABSOLUTE MAXIMUM RATINGS Symbol VCC c u d VI DC Input Voltage VO DC Output Voltage IIK DC Input Diode Current IOK DC Output Diode Current o r P e t e l o IO DC Output Current ICC or IGND DC VCC or Ground Current s b O (t s) Parameter Supply Voltage PD Power Dissipation Tstg Storage Temperature TL Lead Temperature (10 sec) o s b O - ) s t( o r P Value Unit -0.5 to +7 V -0.5 to VCC + 0.5 V -0.5 to VCC + 0.5 ± 20 mA ± 20 mA ± 25 mA V ± 50 mA 500(*) mW -65 to +150 °C 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C 3/11 M74HCT164 RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Value Unit Supply Voltage 4.5 to 5.5 V VI Input Voltage 0 to VCC V VO Output Voltage Top Operating Temperature tr, tf Input Rise and Fall Time (VCC = 4.5 to 5.5V) 0 to VCC V -55 to 125 °C 0 to 500 ns DC SPECIFICATIONS Test Condition Symbol VIH Parameter VOL II ICC ∆ ICC Min. 4.5 to 5.5 4.5 to 5.5 Low Level Input Voltage VOH TA = 25°C VCC (V) High Level Input Voltage VIL High Level Output Voltage 4.5 Low Level Output Voltage 4.5 Input Leakage Current Quiescent Supply Current Additional Worst Case Supply Current r P e s b O 4/11 Typ. Max. 2.0 -40 to 85°C -55 to 125°C Min. Min. Max. 2.0 2.0 IO=-20 µA 4.4 4.5 4.4 c u d IO=-4.0 mA 4.18 4.31 4.13 4.10 0.8 0.0 0.17 VI = VCC or GND 5.5 VI = VCC or GND 5.5 Per Input pin VI = 0.5V or VI = 2.4V Other Inputs at VCC or GND IO = 0 ) s ( ct b O - so 0.8 Unit Max. ) s t( 0.8 V V 0.1 o r P 0.1 0.1 0.26 0.33 0.40 ± 0.1 ±1 ±1 µA 4 40 80 µA 2.0 2.9 3.0 mA e t le IO=20 µA IO=4.0 mA 5.5 u d o t e l o Value 4.4 V V M74HCT164 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns) Test Condition Symbol Parameter tW(L) ts th tREM TA = 25°C VCC (V) tTLH tTHL Output Transition Time tPLH tPHL Propagation Delay Time (CLOCK - Q) Propagation Delay tPHL Time (CLEAR - Q) fMAX Maximum Clock Frequency Minimum Pulse tW(H) Width (CLOCK) tW(L) Minimum Pulse Width (CLEAR) Minimum Set-Up Time (A, B - CK) Minimum Hold Time (A, B - CK) Minimum Removal Time Value Min. Input Capacitance CPD Power Dissipation Capacitance (note 1) Min. 4.5 8 15 19 22 ns 4.5 23 36 45 54 ns 4.5 24 37 46 56 ns 4.5 30 50 Max. 24 Max. 20 MHz 4.5 8 15 19 22 ns 4.5 8 15 19 22 ns 4.5 4 10 13 15 ns 4.5 0 0 0 ns 4.5 5 8 ns so b O Min. ) s ( ct ) s t( Value Typ. Max. 5 10 137 c u d o r P 6 e t le TA = 25°C VCC (V) CIN Min. Unit Max. Test Condition Parameter -55 to 125°C Typ. CAPACITIVE CHARACTERISTICS Symbol -40 to 85°C -40 to 85°C -55 to 125°C Min. Min. Max. 10 Unit Max. 10 pF pF u d o 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC r P e t e l o s b O 5/11 M74HCT164 TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50Ω) c u d ) s t( WAVEFORM 1 : MINIMUM PULSE WIDTH (CLEAR) AND REMOVAL TIME( CLEAR TO CLOCK) (f=1MHz; 50% duty cycle) e t le ) s ( ct u d o r P e t e l o s b O 6/11 o s b O - o r P M74HCT164 WAVEFORM 2 : PROPAGATION DELAY TIMES, SETUP AND HOLD TIME (f=1MHz; 50% duty cycle) c u d e t le ) s ( ct ) s t( o r P o s b O - u d o r P e t e l o s b O 7/11 M74HCT164 Plastic DIP-14 MECHANICAL DATA mm. inch DIM. MIN. a1 0.51 B 1.39 TYP MAX. MIN. TYP. 0.020 1.65 0.055 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 15.24 0.600 F 7.1 I 5.1 L c u d e t le 3.3 Z MAX. 1.27 2.54 ) s ( ct o s b O - 0.050 o r P ) s t( 0.280 0.201 0.130 0.100 u d o r P e t e l o s b O P001A 8/11 M74HCT164 SO-14 MECHANICAL DATA mm. DIM. MIN. TYP A inch MAX. MIN. TYP. a1 1.75 0.1 0.068 0.2 a2 MAX. 0.003 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45° (typ.) D 8.55 8.75 0.336 0.344 E 5.8 6.2 0.228 ) s t( 0.244 e 1.27 0.050 e3 7.62 0.300 F 3.8 4.0 0.149 G 4.6 5.3 0.181 L 0.5 1.27 0.019 M e t le 0.68 S 8° (max.) ) s ( ct o r P c u d 0.157 0.208 0.050 0.026 o s b O - u d o r P e t e l o s b O PO13G 9/11 M74HCT164 TSSOP14 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 4.9 5 5.1 0.193 0.197 E 6.2 6.4 6.6 0.244 0.252 E1 4.3 4.4 4.48 0.169 0.173 1 e c u d 0.65 BSC K 0° L 0.45 0.60 A1 ) s ( ct u d o b r P e t e l o e o r P 0.260 0.176 0.0256 BSC e t le 8° A2 A ) s t( 0.201 0° 0.75 o s b O - 0.018 K c 8° 0.024 0.030 L E D s b O E1 PIN 1 IDENTIFICATION 1 0080337D 10/11 M74HCT164 c u d e t le ) s ( ct ) s t( o r P o s b O - u d o r P e t e l o s b O Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom © http://www.st.com 11/11