M74HCT165M1R

M 54HCT165 M74HCT165 8 BIT PISO SHIFT REGISTER . . . . . . . HIGH SPEED tPD = 17 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS BALANCED PROPAGATION DELAYS tPLH = tPHL SYMMETRICAL OUTPUT IMPEDANCE IOL = IOH = 4 mA (MIN.) COMPATIBLE WITH TTL OUTPUTS VIH = 2 V (MIN.) VIL = 0.8 V (MAX.) PIN AND FUNCTION COMPATIBLE WITH 54/74LS165 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) DESCRIPTION The M54/74HCT165 is a high speed CMOS 8 BIT PISO SHIFT REGISTER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. It achives the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. This device contains eight clocked master slave RS flip-flops connected as a shift register, with auxiliary gating to provide over-riding asynchronous parallel entry. Parallel data entrens when the shift/load input is low. The parallel data can change while shift/load is low, provided that the recommended set-up and hold times are observed. For clocked operation, shift/load must be high. The two clock input perform identically; one can be used as a clock inhibit by applying a high signal; to permit this operation clocking is accomplished through a 2 input nor gates. To avoid double clocking, however, the inhibit signal should only go high while the clock is high. Otherwise the rising inhibit signal will cause the same response as rising clock edge.This integrated circuit has input and output characteristics that are fully compatible with 54/74 LSTTL logic families. M54/74HCT devices are designed to directly interface HSCMOS systems with TTL and NMOS components. They are also plug in replacements for LSTTL devices giving a reduction of power consumption. All inputs are equipped with protection circuits against static discharge and transient excess voltage. October 1993 ORDER CODES : M54HCT165F1R M74HCT165M1R M74HCT165B1R M74HCT165C1R PIN CONNECTIONS (top view) NC = No Internal Connection 1/13 M54/M74HCT165 I NPUT AND OUTPUT EQUIVALENT CIRCUIT TRUTH TABLE INPUTS SHIFT/ LOAD L H H H H H H X H CLOCK INHIBIT X L L L L H X CLOCK X SERIAL IN X H L H L X X A .........H a............h X X X X X X INTERNAL OUTPUTS QA a H L H QB b QAn QAn QAn OUTPUS QH h QGn QGn QGn QGn OUTPUS QH h QGn QGn QGn QGn L QAn NO CHANGE NO CHANGE a.......h: The level of steady input voltage at inputs A through H respectively QAn - QGn : The level of QA -QG, respectively, before the most-recent transition of the clock. LOGIC DIAGRAM 2/13 M54/M74HCT165 P IN DESCRIPTION PIN No 1 2 7 9 SYMBOL S/L QH QH CLOCK NAME AND FUNCTION Asynchronous Parallel Load Input Complementary Output Serial Output Clock Input (LOW to HIGH edge triggered) Serial Data Input Parallel Data Inputs IEC LOGIC SYMBOL 10 SI 11, 12, 13, A to H 14, 3, 4, 5, 6 15 CLOCK INH 8 16 GND V CC CLock Inhibit Ground (0V) Positive Supply Voltage ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VO IIK IOK IO ICC or IGND PD Tstg TL Parameter Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Source Sink Current Per Output Pin DC VCC or Ground Current Power Dissipation Storage Temperature Lead Temperature (10 sec) Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 ± 20 ± 20 ± 25 ± 50 500 (*) -65 to +150 300 Unit V V V mA mA mA mA mW o o C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition isnotimplied. (*) 500 mW: ≅ 65 oC derate to 300 mW by 10mW/oC: 65 oC to 85 oC RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO Top tr, tf Parameter Supply Voltage Input Voltage Output Voltage Operating Temperature: M54HC Series M74HC Series Input Rise and Fall Time (VCC = 4.5 to 5.5V) Value 4.5 to 5.5 0 to VCC 0 to VCC -55 to +125 -40 to +85 0 to 500 Unit V V V C o C o ns 3/13 M54/M74HCT165 D C SPECIFICATIONS Test Conditions Symbol Parameter VCC (V) 4.5 to 5.5 4.5 to 5.5 4.5 VI = IO=-20 µA VIH or IO=-4.0 mA V IL VI = IO= 20 µA VIH or IO= 4.0 mA V IL VI = VCC or GND VI = VCC or GND Per Input pin VI = 0.5V or V I = 2.4V Other Inputs at V CC or GND IO= 0 4.4 4.18 4.5 4.31 0.0 0.17 0.1 0.26 ±0.1 4 2.0 TA = 25 oC 54HC and 74HC Min. Typ. Max. 2.0 Value -40 to 85 oC -55 to 125 oC 74HC 54HC Min. Max. Min. Max. 2.0 2.0 Unit VIH High Level Input Voltage Low Level Input Voltage High Level Output Voltage V V IL 0.8 0.8 0.8 V V OH 4.4 4.13 0.1 0.33 ±1 40 2.9 4.4 4.10 0.1 V 0.4 ±1 80 3.0 µA µA mA V VOL Low Level Output Voltage 4.5 II ICC ∆ICC Input Leakage Current Quiescent Supply Current Additional worst case supply current 5.5 5.5 5.5 4/13 M54/M74HCT165 A C ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = tf = 6 ns) Test Conditions Symbol Parameter VCC (V) 4.5 4.5 TA = 25 C 54HC and 74HC Min. Typ. 8 24 Max. 15 37 o Value -40 to 85 oC -55 to 125 oC 74HC 54HC Min. Max. 19 46 Min. Max. 22 56 Unit tTLH tTHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL fMAX tW(H) tW(L) tW(H) tW(L) ts Output Transition Time Propagation Delay Time (CK - QH, QH) Propagation Delay Time (CKINH - QH, QH) Propagation Delay Time (S/L - QH, QH) Propagation Delay Time (H - QH, QH) Maximum Clock Frequency Minimum Pulse Width (CK, CKINH) Minimum Pulse Width (S/L) Minimum Set-up Time (PI - S/L) Minimum Set-up Time (S/L -CK, CHINH) Minimum Set-up Time (S -CK, CHINH) Minimum Hold Time (PI - S/L) (S/L -CK, CHINH) Minimum Removal Time (CK - CKINH) (CKINH - CK) Input Capacitance Power Dissipation Capacitance ns ns 4.5 24 37 46 56 ns 4.5 26 40 50 60 ns 4.5 22 34 43 51 ns 4.5 4.5 30 46 8 15 24 19 22 MHz ns 4.5 8 15 19 ns 4.5 7 15 19 22 ns ts 4.5 7 15 19 22 ns ts 4.5 7 15 19 22 ns th 4.5 0 0 0 ns tREM 4.5 5 15 19 22 ns CIN CPD (*) 5 96 10 10 10 pF pF (*) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC 5/13 M54/M74HCT165 TIMING CHART 6/13 M54/M74HCT165 SWITCHING CHARACTERISTICS TEST WAVEFORM SERIAL MODE PARALLEL MODE PARALLEL MODE PARALLEL MODE PARALLEL MODE 7/13 M54/M74HCT165 TEST CIRCUIT ICC (Opr.) INPUT WAVEFORM IS THE SAME AS THAT IN CASE OF SWITCHING CHARACTERISTICS TEST. 8/13 M54/M74HCT165 Plastic DIP16 (0.25) MECHANICAL DATA mm MIN. a1 B b b1 D E e e3 F I L Z 3.3 1.27 8.5 2.54 17.78 7.1 5.1 0.130 0.050 0.51 0.77 0.5 0.25 20 0.335 0.100 0.700 0.280 0.201 1.65 TYP. MAX. MIN. 0.020 0.030 0.020 0.010 0.787 0.065 inch TYP. MAX. DIM. P001C 9/13 M54/M74HCT165 Ceramic DIP16/1 MECHANICAL DATA mm MIN. A B D E e3 F G H L M N P Q 7.8 2.29 0.4 1.17 0.22 0.51 0.38 17.78 2.79 0.55 1.52 0.31 1.27 10.3 8.05 5.08 0.307 0.090 0.016 0.046 0.009 0.020 3.3 0.015 0.700 0.110 0.022 0.060 0.012 0.050 0.406 0.317 0.200 TYP. MAX. 20 7 0.130 MIN. inch TYP. MAX. 0.787 0.276 DIM. P053D 10/13 M54/M74HCT165 SO16 (Narrow) MECHANICAL DATA DIM. MIN. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 9.8 5.8 1.27 8.89 4.0 5.3 1.27 0.62 8° (max.) 0.149 0.181 0.019 10 6.2 0.35 0.19 0.5 45° (typ.) 0.385 0.228 0.050 0.350 0.157 0.208 0.050 0.024 0.393 0.244 0.1 mm TYP. MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.004 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010 P013H 11/13 M54/M74HCT165 PLCC20 MECHANICAL DATA mm MIN. A B D d1 d2 E e e3 F G M M1 1.27 1.14 7.37 1.27 5.08 0.38 0.101 0.050 0.045 9.78 8.89 4.2 2.54 0.56 8.38 0.290 0.050 0.200 0.015 0.004 TYP. MAX. 10.03 9.04 4.57 MIN. 0.385 0.350 0.165 0.100 0.022 0.330 inch TYP. MAX. 0.395 0.356 0.180 DIM. P027A 12/13 M54/M74HCT165 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use ascritical components in life support devices or systems without express written approval of SGS-THOMSON Microelectonics. © 1994 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A 13/13