M87C257-12F1

M87C257 Address Latched 256 Kbit (32Kb x8) UV EPROM and OTP EPROM Feature summary ■ 5V ± 10% supply voltage in Read operation ■ Integrated address latch ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O ■ Access time: 45ns ■ Low power consumption: – Active Current 30mA – Standby Current 100µA ■ Programming voltage: 12.75V ± 0.25V ■ Programming times of around 3s ■ Electronic signature – Manufacturer Code: 20h – Device Code: 80h ■ ECOPACK® packages available 28 1 FDIP28W (F) PLCC32 (C) May 2006 Rev 2 1/9 www.st.com 1 Contents M87C257 Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Device operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 Two Line Output Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O 2.4 System considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.5 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.6 PRESTO II programming algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.7 Program Inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.8 Program Verify . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.9 Electronic signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.10 Erasure operation (applies for UV EPROM) . . . . . . . . . . . . . . . . . . . . . . . 10 3 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5 Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 2/22 M87C257 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Electronic signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Read mode DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Programming mode DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Read mode AC characteristics 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Read mode AC characteristics 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Programming mode AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 FDIP28WB - 28 pin Ceramic Frit-seal DIP, with window (round 0.280"), package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 PLCC32 - 32 pin Rectangular Plastic Leaded Chip Carrier, package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Table 13. Table 14. Table 15. 3/22 List of figures M87C257 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 DIP connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 LCC connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Programming flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 AC testing input output waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 AC testing load circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Read mode AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Programming and Verify modes AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 FDIP28W - 28 pin Ceramic Frit-seal DIP, with window, package outline . . . . . . . . . . . . . . 18 PLCC32 - 32 pin Rectangular Plastic Leaded Chip Carrier, package outline. . . . . . . . . . . 19 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O 4/22 M87C257 1 Description Description The M87C257 is a 256 Kbit EPROM offered in the two ranges UV (ultra violet erase) and OTP (one time programmable). It incorporates latches for all address inputs to minimize chip count, reduce cost, and simplify the design of multiplexed bus systems and is organized as 32,768 by 8 bits. The FDIP28W (window ceramic frit-seal package) has a transparent lid which allows the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written to the device by following the programming procedure. For applications where the content is programmed only one time and erasure is not required, the M87C257 is offered in PLCC32 package. ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O In order to meet environmental requirements, ST offers the M87C257 in ECOPACK® packages. ECOPACK packages are Lead-free. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 1. Logic diagram VCC 15 8 A0-A14 E Q0-Q7 M87C257 G ASVPP VSS AI00928B 5/22 Description M87C257 Table 1. Signal names A0-A14 Address Inputs Q0-Q7 Data Outputs E Chip Enable G Output Enable ASVPP Address Strobe / Program Supply VCC Supply Voltage VSS Ground NC Not Connected Internally ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O DU Figure 2. Don’t Use DIP connections ASVPP A12 A7 A6 A5 A4 A3 A2 A1 A0 Q0 Q1 Q2 VSS 1 28 2 27 3 26 4 25 5 24 6 23 7 22 M87C257 8 21 9 20 10 19 11 18 12 17 13 16 14 15 VCC A14 A13 A8 A9 A11 G A10 E Q7 Q6 Q5 Q4 Q3 AI00929 LCC connections A7 A12 ASVPP DU VCC A14 A13 Figure 3. 1 32 A6 A5 A4 A3 A2 A1 A0 NC Q0 M87C257 9 25 A8 A9 A11 NC G A10 E Q7 Q6 VSS DU Q3 Q4 Q5 Q1 Q2 17 AI00930 6/22 M87C257 2 Device operation Device operation The modes of operation of the M87C257 are listed in the Operating Modes. A single power supply is required in the read mode. All inputs are TTL levels except for VPP and 12V on A9 for Electronic Signature. 2.1 Read mode The M87C257 has two control functions, both of which must be logically active in order to obtain data at the outputs. Chip Enable (E) is the power control and should be used for device selection. Output Enable (G) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that the addresses are stable (AS = VIH) or latched (AS = VIL), the address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is available at the output after delay of tGLQV from the falling edge of G, assuming that E has been low and the addresses have been stable for at least tAVQVtGLQV.The M87C257 reduces the hardware interface in multiplexed address-data bus systems. The processor multiplexed bus (AD0-AD7) may be tied to the M87C257's address and data pins. No separate address latch is needed because the M87C257 latches all address inputs when AS is low. ) s ( t c u d o ) r s ( P t c e t u e d l o o 2.2 Standby mode r s P b e O t e l ) o s ( s t b c u O 2.3 Two Line Output d Control o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O The M87C257 has a standby mode which reduces the active current from 30mA to 100µA (Address Stable). The M87C257 is placed in the standby mode by applying a CMOS high signal to the E input. When in the standby mode, the outputs are in a high impedance state, independent of the G input. Because EPROMs are usually used in larger memory arrays, this product features a 2 line control function which accommodates the use of multiple memory connection. The two line control function allows: ● the lowest possible memory power dissipation, ● complete assurance that output bus contention will not occur. For the most efficient use of these two control lines, E should be decoded and used as the primary device selecting function, while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is desired from a particular memory device. 7/22 Device operation 2.4 M87C257 System considerations The power switching characteristics of Advance CMOS EPROMs require careful decoupling of the devices. The supply current, ICC, has three segments that are of interest to the system designer: the standby current level, the active current level, and transient current peaks that are produced by the falling and rising edges of E. The magnitude of this transient current peaks is dependent on the capacitive and inductive loading of the device at the output. The associated transient voltage peaks can be suppressed by complying with the two line output control and by properly selected decoupling capacitors. It is recommended that a 0.1µF ceramic capacitor be used on every device between VCC and VSS. This should be a high frequency capacitor of low inherent inductance and should be placed as close to the device as possible. In addition, a 4.7µF bulk electrolytic capacitor should be used between VCC and VSS for every eight devices. The bulk capacitor should be located near the power supply connection point. The purpose of the bulk capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces. ) s ( t c u 2.5 Programming d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s 2.6 PRESTO II programming algorithm t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O When delivered (and after each erasure for UV EPROM), all bits of the M87C257 are in the '1' state. Data is introduced by selectively programming '0's into the desired bit locations. Although only '0's will be programmed, both '1's and '0's can be present in the data word. The only way to change a '0' to a '1' is by die exposition to ultraviolet light (UV EPROM). The M87C257 is in the programming mode when VPP input is at 12.75V, G is at VIH and E is pulsed to VIL. The data to be programmed is applied to 8 bits in parallel to the data output pins. The levels required for the address and data inputs are TTL. VCC is specified to be 6.25 V ± 0.25 V. PRESTO II Programming Algorithm allows to program the whole array with a guaranteed margin, in a typical time of 3.5 seconds. Programming with PRESTO II involves the application of a sequence of 100µs program pulses to each byte until a correct verify occurs (see Figure 4). During programming and verify operation, a MARGIN MODE circuit is automatically activated in order to guarantee that each cell is programmed with enough margin. No overprogram pulse is applied since the verify in MARGIN MODE provides necessary margin to each programmed cell. 8/22 M87C257 Device operation Figure 4. Programming flowchart VCC = 6.25V, VPP = 12.75V n=0 E = 100µs Pulse NO ++n = 25 YES NO VERIFY ++ Addr YES ) s ( t c u d o ) r s ( P t c e t u e d l o o r s 2.7 Program Inhibit P b e O t e l ) o s ( s t b c u O d o ) r s 2.8 Program Verify P ( t c e t u e l d o o r s P b O e t e l o s b O FAIL Last Addr NO YES CHECK ALL BYTES 1st: VCC = 6V 2nd: VCC = 4.2V AI00760B Programming of multiple M87C257s in parallel with different data is also easily accomplished. Except for E, all like inputs including G of the parallel M87C257 may be common. A TTL low level pulse applied to a M87C257's E input, with VPP at 12.75V, will program that M87C257. A high level E input inhibits the other M87C257s from being programmed. A verify (read) should be performed on the programmed bits to determine that they were correctly programmed. The verify is accomplished with G at VIL, E at VIH, VPP at 12.75V and VCC at 6.25V. 9/22 Device operation 2.9 M87C257 Electronic signature The Electronic Signature (ES) mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and type. This mode is intended for use by programming equipment to automatically match the device to be programmed with its corresponding programming algorithm. The ES mode is functional in the 25°C ± 5°C ambient temperature range that is required when programming the M87C257. To activate the ES mode, the programming equipment must force 11.5V to 12.5V on address line A9 of the M87C257, with VCC = VPP = 5V. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH. All other address lines must be held at VIL during Electronic Signature mode. Byte 0 (A0 = VIL) represents the manufacturer code and byte 1 (A0 = VIH) the device identifier code. When A9 = VID, AS need not be toggled to latch each identifier address. For the STMicroelectronics M87C257, these two identifier bytes are given in Table 4 and can be read-out on outputs Q7 to Q0. ) s ( t c u 2.10 Erasure operation (applies for UV EPROM) od ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O The erasure characteristics of the M87C257 is such that erasure begins when the cells are exposed to light with wavelengths shorter than approximately 4000 Å. It should be noted that sunlight and some type of fluorescent lamps have wavelengths in the 3000-4000 Å range. Research shows that constant exposure to room level fluorescent lighting could erase a typical M87C257 in about 3 years, while it would take approximately 1 week to cause erasure when exposed to direct sunlight. If the M87C257 is to be exposed to these types of lighting conditions for extended periods of time, it is suggested that opaque labels be put over the M87C257 window to prevent unintentional erasure. The recommended erasure procedure for the M87C257 is exposure to short wave ultraviolet light which has wavelength 2537Å. The integrated dose (i.e. UV intensity x exposure time) for erasure should be a minimum of 15 W-sec/cm2. The erasure time with this dosage is approximately 15 to 20 minutes using an ultraviolet lamp with 12000 µW/cm2 power rating. The M87C257 should be placed within 2.5 cm (1 inch) of the lamp tubes during the erasure. Some lamps have a filter on their tubes which should be removed before erasure. 10/22 M87C257 3 Maximum rating Maximum rating Stressing the device above the rating listed in the Absolute Maximum Ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 2. Absolute maximum ratings Symbol Parameter TA Ambient Operating Value Temperature(1) Temperature Under Bias TSTG Storage Temperature VIO(2) Input or Output Voltage (except A9) VCC od –65 to 150 e t e l A9 Voltage o s b Program Supply Voltage VPP uc –50 to 125 Supply Voltage VA9(2) ) s ( t –40 to 125 TBIAS 1. Depends on range. Pr –2 to 7 –2 to 7 c u d –2 to 13.5 o r P –2 to 14 Unit °C °C °C ) s t( V V V V 2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns. Table 3. s ( t c Operating modes Mode ASVPP Q7-Q0 VIL X VIL Data Out VIL X VIH Data Out VIL VIH X X Hi-Z VIL Pulse VIH X VPP Data In VIH VIL X VPP Data Out Program Inhibit VIH VIH X VPP Hi-Z Standby VIH X X X Hi-Z Electronic Signature VIL VIL VID VIL Codes Pr VIL ct Output Disable e t e l Program du t e l o bs O o r P e Verify VIL (s) Read (Applied Address) O o s b O - A9 u d o E e t le G Read (Latched Address) o s b O ) 1. X = VIH or VIL, VID = 12V ± 0.5V. Table 4. Electronic signature Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data Manufacturer’s Code VIL 0 0 1 0 0 0 0 0 20h Device Code VIH 1 0 0 0 0 0 0 0 80h 11/22 DC and AC parameters 4 M87C257 DC and AC parameters This section summarizes the operating and measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC Characteristic tables that follow are derived from tests performed under the Measurement Conditions summarized in the relevant tables. Designers should check that the operating conditions in their circuit match the measurement conditions when relying on the quoted parameters. Table 5. AC measurement conditions High Speed Standard Input Rise and Fall Times ≤10ns ≤20ns Input Pulse Voltages 0 to 3V 0.4V to 2.4V 1.5V 0.8V and 2V ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Input and Output Timing Ref. Voltages Figure 5. AC testing input output waveform High Speed 3V 1.5V 0V Standard 2.4V 2.0V 0.8V 0.4V AI01822 Figure 6. AC testing load circuit 1.3V 1N914 3.3kΩ DEVICE UNDER TEST OUT CL CL = 30pF for High Speed CL = 100pF for Standard CL includes JIG capacitance 12/22 AI01823B M87C257 DC and AC parameters Table 6. Capacitance(1) (2) Symbol CIN Parameter Test Condition Max Unit VIN = 0V 6 pF VOUT = 0V 12 pF Input Capacitance COUT Output Capacitance Min 1. TA = 25 °C, f = 1 MHz 2. Sampled only, not 100% tested. Table 7. Symbol Read mode DC characteristics(1) (2) Parameter Test Condition ILI Input Leakage Current ILO Output Leakage Current ICC Supply Current ±10 µA 0V ≤VOUT ≤VCC ±10 µA d o r o s b E > VCC – 0.2V, ASVPP = VSS, Address Stable O ) VIL Input Low Voltage VIH(3) Input High Voltage VOL Output Low Voltage t(s c u d (s) Output High Voltage e t le mA 1 mA 6 mA 100 µA 100 µA –0.3 0.8 V 2 VCC + 1 V 0.4 V c u d o r P VPP = VCC so b O - IOL = 2.1mA IOH = –1mA mA 10 P e let (s) t c u 30 E > VCC – 0.2V, ASVPP ≥ VCC – 0.2V, Address Switching Program Current o r P 0V ≤VIN ≤VCC E = VIH, ASVPP = VIL, Address Stable IPP VOH Unit E = VIH, ASVPP = VIH, Address Switching Supply Current (Standby) CMOS ICC2 Max E = VIL, G = VIL, IOUT = 0mA, f = 5MHz Supply Current (Standby) TTL ICC1 Min ) s t( VCC – 0.8V V t c u 1. TA = 0 to 70 °C, –40 to 85 °C; –40 to 105 °C or –40 to 125 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC ete 2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. ol s b O d o r P e 3. Maximum DC voltage on Output is VCC +0.5V. Table 8. Symbol s b O t e l o Programming mode DC characteristics(1) (2) Parameter Test Condition Min VIL ≤VIN ≤VIH Max Unit ±10 µA 50 mA 50 mA ILI Input Leakage Current ICC Supply Current IPP Program Current VIL Input Low Voltage –0.3 0.8 V VIH Input High Voltage 2 VCC + 0.5 V VOL Output Low Voltage IOL = 2.1mA 0.4 V VOH Output High Voltage TTL IOH = –1mA VID A9 Voltage E = VIL VCC – 0.8 11.5 V 12.5 V 1. TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V 2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 13/22 DC and AC parameters Figure 7. A0-A14 M87C257 Read mode AC waveforms VALID tASLAX tAXQX tAVASL ASVPP tASHASL tASLGL tAVQV ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O E tGLQV tEHQZ G tELQV tGHQZ Hi-Z Q0-Q7 DATA OUT AI00931 14/22 M87C257 DC and AC parameters Read mode AC characteristics 1(1) (2) Table 9. M87C257 Symbol Alt Parameter Test Condition -45(3) -60 -70 -80 Unit Min Max Min Max Min Max Min Max Address Valid to Output Valid E = VIL, G = VIL tAVQV tACC tAVASL tAL Address Valid to Address Strobe Low tASHASL tLL Address Strobe High to Address Strobe Low 35 tASLAX tLA Address Strobe Low to Address Transition Address Strobe Low to Output Enable Low 45 7 60 7 70 80 ns 7 7 ns 35 35 35 ns 20 20 20 20 ns 20 20 20 20 ns ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O tASLGL tLOE tELQV tCE Chip Enable Low to Output Valid G = VIL 45 60 70 80 ns tGLQV tOE Output Enable Low to Output Valid E = VIL 25 30 35 40 ns tEHQZ(4) tDF Chip Enable High to Output Hi-Z G = VIL 0 25 0 30 0 30 0 40 ns tGHQZ(4) tDF Output Enable High to Output Hi-Z E = VIL 0 25 0 30 0 30 0 40 ns Address Transition to Output Transition E = VIL, G = VIL 0 tAXQX tOH 0 0 0 ns 1. TA = 0 to 70 °C, –40 to 85 °C; –40 to 105 °C or –40 to 125 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC 2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 3. Speed obtained with High Speed AC measurement conditions. 4. Sampled only, not 100% tested. 15/22 DC and AC parameters Table 10. M87C257 Read mode AC characteristics 2(1) (2) M87C257 Symbol Alt Parameter Test Condition -90 -10 -12 -15/-20 Unit Min Max Min Max Min Max Min Max tAVQV tACC tAVASL tAL Address Valid to Output Valid E = VIL, G = VIL 90 100 120 150 ns Address Valid to Address Strobe Low 7 tLL Address Strobe High to Address Strobe Low 35 35 35 35 ns tLA Address Strobe Low to Address Transition 20 20 20 20 ns tASLGL Address Strobe Low tLOE to Output Enable Low 20 20 20 20 ns tELQV tCE Chip Enable Low to Output Valid G = VIL 90 100 120 150 ns tGLQV tOE Output Enable Low to Output Valid E = VIL 40 40 50 60 ns tEHQZ(3) tDF Chip Enable High to Output Hi-Z G = VIL 0 40 0 30 0 40 0 40 ns tGHQZ(3) tDF Output Enable High to Output Hi-Z E = VIL 0 40 0 30 0 40 0 40 ns tAXQX tOH Address Transition to Output Transition E = VIL, G = VIL 0 7 7 7 ns ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O tASHASL tASLAX 0 0 0 1. TA = 0 to 70 °C, –40 to 85 °C; –40 to 105 °C or –40 to 125 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC 2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 3. Sampled only, not 100% tested. 16/22 ns M87C257 DC and AC parameters Figure 8. Programming and Verify modes AC waveforms VALID A0-A14 tAVEL Q0-Q7 DATA IN tQVEL DATA OUT tEHQX ASVPP tVPHEL tGHQZ tGLQV VCC ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O tVCHEL tGHAX E tELEH tQXGL G PROGRAM VERIFY AI00557 Table 11. Programming mode AC characteristics(1) (2) Parameter Test Condition Symbol Alt Min Max tAVEL tAS Address Valid to Chip Enable Low 2 µs tQVEL tDS Input Valid to Chip Enable Low 2 µs tVPHEL tVPS VPP High to Chip Enable Low 2 µs tVCHEL tVCS VCC High to Chip Enable Low 2 µs tELEH tPW Chip Enable Program Pulse Width 95 tEHQX tDH Chip Enable High to Input Transition 2 µs tQXGL tOES Input Transition to Output Enable Low 2 µs tGLQV tOE Output Enable Low to Output Valid tGHQZ tDFP Output Enable High to Output Hi-Z 0 tGHAX tAH Output Enable High to Address Transition 0 105 Unit µs 100 ns 130 ns ns 1. TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V 2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 17/22 Package mechanical 5 M87C257 Package mechanical Figure 9. FDIP28W - 28 pin Ceramic Frit-seal DIP, with window, package outline A2 A3 A1 B1 B A L α e eA D2 C eB D S ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O N ∅ E1 E 1 FDIPW-a 1. Drawing is not to scale. Table 12. FDIP28WB - 28 pin Ceramic Frit-seal DIP, with window (round 0.280"), package mechanical data millimeters inches Symbol Typ Min A Typ Min 5.72 Max 0.225 A1 0.51 1.40 0.020 0.055 A2 3.91 4.57 0.154 0.180 A3 3.89 4.50 0.153 0.177 B 0.41 0.56 0.016 0.022 – – – – C 0.23 0.30 0.009 0.012 D 36.50 37.34 1.437 1.470 B1 1.45 0.057 D2 33.02 – – 1.300 – – E 15.24 – – 0.600 – – 13.06 13.36 0.514 0.526 E1 e 2.54 – – 0.100 – – eA 14.99 – – 0.590 – – eB 16.18 18.03 0.637 0.710 L 3.18 4.10 0.125 0.161 α 4° 11° 4° 11° S 1.52 2.49 0.060 0.098 – – – – Ø N 18/22 Max 7.11 28 0.280 28 M87C257 Package mechanical Figure 10. PLCC32 - 32 pin Rectangular Plastic Leaded Chip Carrier, package outline D D1 A1 A2 1 N B1 E2 E3 e E1 E F B 0.51 (.020) E2 1.14 (.045) ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O A D3 R D2 CP D2 PLCC-A 1. Drawing is not to scale. Table 13. PLCC32 - 32 pin Rectangular Plastic Leaded Chip Carrier, package mechanical data millimeters inches Symbol Typ Min Max A 3.18 A1 Min Max 3.56 0.125 0.140 1.53 2.41 0.060 0.095 A2 0.38 – 0.015 – B 0.33 0.53 0.013 0.021 B1 0.66 0.81 0.026 0.032 CP Typ 0.10 0.004 D 12.32 12.57 0.485 0.495 D1 11.35 11.51 0.447 0.453 D2 4.78 5.66 0.188 0.223 – – – – E 14.86 15.11 0.585 0.595 E1 13.89 14.05 0.547 0.553 E2 6.05 6.93 0.238 0.273 D3 7.62 0.300 E3 10.16 – – 0.400 – – e 1.27 – – 0.050 – – 0.00 0.13 0.000 0.005 – – – – F R N 0.89 32 0.035 32 19/22 Part numbering 6 M87C257 Part numbering Table 14. Ordering information scheme Example: M87C257 -70 X C 1 X Device Type M87 Supply Voltage C = 5V ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Device Function 257 = 256 Kbit (32Kb x 8) Speed -45(1) = 45 ns -60 = 60ns -70 = 70 ns -80 = 80 ns -90 = 90 ns -10 = 100 ns -12 = 120 ns -15 = 150 ns -20 = 200 ns VCC Tolerance X = ± 5% blank = ± 10% Package F = FDIP28W C = PLCC32 Temperature Range 1 = 0 to 70 °C 3 = –40 to 125 °C 6 = –40 to 85 °C Options TR = Tape & Reel Packing 1. High Speed, see AC Characteristics section for further information. For a list of available options (Speed, Package, etc...) or for further information on any aspect of this device, please contact the STMicroelectronics Sales Office nearest to you. 20/22 M87C257 7 Revision history Revision history Table 15. Document revision history Date Revision 01-Jun-1996 1 Initial release. 2 Document converted to new template (sections added, information moved). Packages are ECOPACK® compliant. Package specifications updated (see Section 5: Package mechanical). X option removed from Table 15: Document revision history. 23-May-2006 Changes ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O 21/22 M87C257 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. 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