MLPF-WB55-01E3

MLPF-WB55-01E3 Datasheet 2.4 GHz low pass filter matched to STM32WB55Cx/Rx, STM32WB50Cx, STM32WB35Cx and STM32WB30Cx Features • Top view (pads down) OUT GND3 GND4 GND2 IN GND1 • • • • • • • • • Integrated impedance matching to STM32WB55Cx/Rx, STM32WB50Cx, STM32WB35Cx and STM32WB30Cx LGA footprint compatible 50 Ω nominal impedance on antenna side Deep rejection harmonics filter Low insertion loss Small footprint Low thickness ≤ 450 μm High RF performance RF BOM and area reduction ECOPACK2 compliant Applications Product status link MLPF-WB55-01E3 • • • • • Bluetooth 5 OpenThread Zigbee® IEEE 802.15.4 Optimized for STM32WB55Cx/Rx, STM32WB50Cx, STM32WB35Cx and STM32WB30Cx Description The MLPF-WB55-01E3 integrates an impedance matching network and harmonics filter. The matching impedance network has been tailored to maximize the RF performance of STM32WB. This device uses STMicroelectronics IPD technology on non-conductive glass substrate which optimizes RF performance. DS12804 - Rev 2 - September 2020 For further information contact your local STMicroelectronics sales office. www.st.com MLPF-WB55-01E3 Characteristics 1 Characteristics Table 1. Absolute ratings (Tamb = 25 °C) Symbol PIN VESD TOP Parameter Input power RFIN Value Unit 10 dBm ESD ratings human body model (JESD22-A114-C), all I/O one at a time while others connected to GND 2000 ESD ratings machine model, all I/O 200 Maximum operating temperature -40 to +105 V °C Table 2. Impedances(Tamb = 25 °C) Symbol Parameter Value Min. Typ. Max. Unit matched to STM32WB55Cx/Rx, ZIN STM32WB55xx single-ended impedance STM32WB50Cx, - STM32WB35Cx, - Ω - Ω and STM32WB30Cx ZOUT Antenna impedance - 50 Table 3. Electrical characteristics and RF performance (Tamb = 25 °C) Symbol f Frequency range IL Insertion loss lS21l RLIN RLOUT Att DS12804 - Rev 2 Parameter Value Min. Typ. 2400 0.90 Max. Unit 2500 MHz 1.1 dB Input return loss IS11I 14 22 dB Output return loss lS22l 16 24 dB Attenuation at 2fo 38 40 dB Attenuation at 3fo 43 45 dB Attenuation at 4fo 41 46 dB Attenuation at 5fo 35 42 dB Harmonic rejection levels IS21I page 2/13 MLPF-WB55-01E3 RF measurement 1.1 DS12804 - Rev 2 RF measurement Figure 1. Transmission (dB) Figure 2. Insertion loss (dB) Figure 3. Input return loss (dB) Figure 4. Output return loss (dB) Figure 5. Attenuation 2f0 (dB) Figure 6. Attenuation 3f0 (dB) page 3/13 MLPF-WB55-01E3 RF measurement Figure 7. Attenuation 4f0 (dB) DS12804 - Rev 2 Figure 8. Attenuation 5f0 (dB) page 4/13 MLPF-WB55-01E3 Package information 2 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 2.1 Bumpless CSP package information Figure 9. Bumpless CSP package outline BOTTOM VIEW (pads up) B1 X OUT SIDE VIEW T GND2 GND4 B Y B GND3 GND1 IN A A1 Coating 25µm B1 a a A1 Table 4. Bumpless CSP package mechanical data Parameter DS12804 - Rev 2 Description Min. Typ. Max. Unit X X dimension of the die 975 1000 1025 µm Y Y dimension of the die 1575 1600 1625 µm A X pitch 500 µm B Y pitch 587 µm A1 Distance from bump to edge of die on X axis 250 µm B1 Distance from pad to edge of die on Y axis 213 µm a Pad dimension 200 µm T Substrate thickness 375 400 425 µm page 5/13 MLPF-WB55-01E3 Bumpless CSP package information Figure 10. Marking Figure 11. Top view Top view (pads down) OUT GND3 GND4 GND2 IN GND1 More packing information is available in the application note: • AN2348 Flip-Chip: “Package description and recommendations for use Figure 12. Tape and reel outline P0 Pin 1 located according to EIA-481 Ø D0 A0 F W B0 K0 P1 P2 Ø D1 0.03 RAISED CROSS-BAR User direction of unreeling Note: DS12804 - Rev 2 Pocket dimensions are not on scale Pocket shape may vary depending on package page 6/13 MLPF-WB55-01E3 Bumpless CSP package information Table 5. Tape and reel mechanical data Dimensions Millimeters Ref Min Typ Max A0 1.04 1.09 1.14 B0 1.64 1.69 1.74 K0 0.47 0.52 0.57 P1 3.9 4.0 4.1 P0 3.9 4.0 4.1 Ø D0 1.4 1.5 1.6 Ø D1 0.35 0.40 0.45 F 3.45 3.50 3.55 P2 1.95 2.00 2.05 W 7.9 8.0 8.3 Table 6. Pad description top view (pads down) DS12804 - Rev 2 Pad ref Pad name Description A1 OUT Antenna A2 GND4 Ground A3 IN B1 GND3 Ground B2 GND2 Ground B3 GND1 Ground STM32WB55 RF out page 7/13 MLPF-WB55-01E3 Recommendation on PCB assembly 3 Recommendation on PCB assembly 3.1 Land pattern Figure 13. PCB land pattern recommendations 450µm 106.4µm 106.4µm OUT 300µm 300µm 150µm GND3 150µm Top_Layer Top_Solder _Mask 587µm GND4 200µm 200µm GND2 587µm 150µm 150µm IN 500µm GND1 200µm 104µm 104µm 1500µm Figure 14. PCB stack-up recommendations Solder resist Copper 48µm Core, FR4 1507µm Copper 48µm DS12804 - Rev 2 page 8/13 MLPF-WB55-01E3 Stencil opening design 3.2 Stencil opening design Figure 15. Stencil opening recommendations Top_Layer Stencil_Opening 587µm 200µm 200µm (Stencil opening aligned with footprint dimensions) 587µm 500µm 3.3 Solder paste 1. 2. 3. 4. 5. 3.4 Placement 1. 2. 3. 4. 5. 6. DS12804 - Rev 2 100 µm solder stencil thickness is recommended Halide-free flux qualification ROL0 according to ANSI/J-STD-004. “No clean” solder paste is recommended. Offers a high tack force to resist component movement during PCB movement. Solder paste with fine particles: powder particle size is 20-45 μm. Manual positioning is not recommended. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering Standard tolerance of ±0.05 mm is recommended. 1.0 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. page 9/13 MLPF-WB55-01E3 PCB design preference 3.5 PCB design preference 1. 2. DS12804 - Rev 2 To control the solder paste amount, the closed via is recommended instead of open vias. The position of tracks and open vias in the solder area should be well balanced. A symmetrical layout is recommended, to avoid any tilt phenomena caused by asymmetrical solder paste due to solder flow away. page 10/13 MLPF-WB55-01E3 Ordering information 4 Ordering information Figure 16. Ordering information scheme MLPF- WB55 - 01 E3 Matched low pass filter Impedance matched to STM32WB55 01: version E3: coated CSP on glass Table 7. Ordering information DS12804 - Rev 2 Order code Marking Package Weight Base qty. Delivery mode MLPF-WB55-01E3 TS Bumpless CSP 1.546 mg 5000 Tape and reel (7") page 11/13 MLPF-WB55-01E3 Revision history Table 8. Document revision history DS12804 - Rev 2 Date Version Changes 12-Dec-2018 1 Initial release. 10-Sep-2020 2 Inserted STM32WB50Cx, STM32WB35Cx and STM32WB30Cx product. page 12/13 MLPF-WB55-01E3 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2020 STMicroelectronics – All rights reserved DS12804 - Rev 2 page 13/13