MLPF-WB55-02E3
Datasheet
2.4 GHz low pass filter matched to STM32WB55Vx
Features
Top view (pads down)
OUT
•
•
•
•
•
•
•
•
•
•
Integrated impedance matching to STM32WB55Vx
LGA footprint compatible
50 Ω nominal impedance on antenna side
Deep rejection harmonics filter
Low insertion loss
Small footprint
Low thickness ≤ 450 μm
High RF performance
RF BOM and area reduction
ECOPACK2 compliant component
GND3
Applications
GND4
GND2
IN
GND1
•
•
•
•
•
Bluetooth 5
OpenThread
Zigbee®
IEEE 802.15.4
Optimized for STM32WB55Vx
Description
Product status link
MLPF-WB55-02E3
The MLPF-WB55-02E3 integrates an impedance matching network and harmonics
filter. The matching impedance network has been tailored to maximize the RF
performance of STM32WB55Vx. This device uses STMicroelectronics IPD
technology on non-conductive glass substrate which optimizes RF performance.
DS13176 - Rev 2 - January 2020
For further information contact your local STMicroelectronics sales office.
www.st.com
MLPF-WB55-02E3
Characteristics
1
Characteristics
Table 1. Absolute ratings (Tamb = 25 °C)
Symbol
PIN
VESD
TOP
Parameter
Input power RFIN
Value
Unit
10
dBm
ESD ratings human body model (JESD22-A114-C), all I/O one at a time while
others connected to GND
2000
ESD ratings machine model, all I/O
200
Maximum operating temperature
-40 to +105
V
°C
Table 2. Impedances(Tamb = 25 °C)
Symbol
ZIN
ZOUT
Parameter
Value
Unit
Min.
Typ.
Max.
STM32WB55xx single-ended
impedance
-
matched to
STM32WB55Vx
-
Ω
Antenna impedance
-
50
-
Ω
Table 3. Electrical characteristics and RF performance (Tamb = 25 °C)
Symbol
Parameter
f
Frequency range
IL
Insertion loss lS21l
RLIN
RLOUT
Typ.
1.0
Max.
Unit
2500
MHz
1.2
dB
Input return loss IS11I
13
17
dB
Output return loss lS22l
15
18
dB
43
45
dB
47
53
dB
41
56
dB
38
44
dB
(4800-5825) MHz
Attenuation at 3fo
Harmonic rejection
levels IS21I
(7200 – 7500) MHz
Attenuation at 4fo
(9600 – 10000) MHz
Attenuation at 5fo
(12000 – 12500) MHz
DS13176 - Rev 2
Min.
2400
Attenuation at 2fo
Att
Value
page 2/14
MLPF-WB55-02E3
RF measurement
1.1
RF measurement
Figure 2. Insertion loss (dB)
Figure 1. Transmission (dB)
S21(dB)
S21(dB)
0
-0.7
-10
-0.8
-20
-0.9
-30
-40
-1.0
-50
-1.1
-60
f(GHz)
-70
2
0
10
8
6
4
14
12
f(GHz)
-1.2
Figure 3. Input return loss (dB)
-10
-10
-15
-15
-20
-20
-25
-25
f(GHz)
-30
2.42
f(GHz)
2.42
2.40
Figure 5. Attenuation 2f0 (dB)
-30
2.50
S22(dB)
-30
2.50
2.48
2.46
2.44
2.48
2.46
2.44
Figure 4. Output return loss (dB)
S11(dB)
2.40
2.42
2.40
2.48
2.46
2.44
2.50
Figure 6. Attenuation 3f0 (dB)
S21(dB)
-30
-35
-35
-40
-40
-45
-45
-50
-50
-55
-55
-60
-60
-65
S21(dB)
-65
f(GHz)
-70
4.8
4.9
DS13176 - Rev 2
5.0
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
5.9
f(GHz)
-70
7.20
7.25
7.30
7.35
7.40
7.45
7.50
page 3/14
MLPF-WB55-02E3
RF measurement
Figure 7. Attenuation 4f0 (dB)
-30
Figure 8. Attenuation 5f0 (dB)
S21(dB)
-30
-35
-35
-40
-40
-45
-45
-50
-50
-55
-55
-60
-60
-65
f(GHz)
-70
9.60
S21(dB)
-65
f(GHz)
-70
9.65
DS13176 - Rev 2
9.70
9.75
9.80
9.85
9.90
9.95
10.00
12.00 12.05
12.10
12.15
12.20
12.25
12.30
12.35
12.40 12.45 12.50
page 4/14
MLPF-WB55-02E3
Package information
2
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.
2.1
Bumpless CSP package information
Figure 9. Bumpless CSP package outline
BOTTOM VIEW (pads up)
B1
X
OUT
SIDE VIEW
T
GND2
GND4
B
Y
B
GND3
GND1
A
A1
IN
Coating 25µm
B1
a
a
A1
Table 4. Bumpless CSP package mechanical data
Parameter
DS13176 - Rev 2
Description
Min.
Typ.
Max.
Unit
X
X dimension of the die
975
1000
1025
µm
Y
Y dimension of the die
1575
1600
1625
µm
A
X pitch
500
µm
B
Y pitch
587
µm
A1
Distance from bump to edge of die on X axis
250
µm
B1
Distance from pad to edge of die on Y axis
213
µm
a
Pad dimension
200
µm
T
Substrate thickness
375
400
425
µm
page 5/14
MLPF-WB55-02E3
Bumpless CSP package information
Figure 10. Marking
Figure 11. Top view
Top view (pads down)
OUT
GND3
GND4
GND2
IN
GND1
More packing information is available in the application note:
•
AN2348 Flip-Chip: “Package description and recommendations for use
Figure 12. Tape and reel outline
P0
Pin 1 located according to EIA-481
Ø D0
A0
F
W
B0
K0
P1
P2
Ø D1
0.03 RAISED CROSS-BAR
User direction of unreeling
Note:
DS13176 - Rev 2
Pocket dimensions are not on scale
Pocket shape may vary depending on package
page 6/14
MLPF-WB55-02E3
Bumpless CSP package information
Table 5. Tape and reel mechanical data
Dimensions
Ref
Millimeters
Min
Typ
Max
A0
1.04
1.09
1.14
B0
1.64
1.69
1.74
K0
0.47
0.52
0.57
P1
3.9
4.0
4.1
P0
3.9
4.0
4.1
Ø D0
1.4
1.5
1.6
Ø D1
0.35
0.40
0.45
F
3.45
3.50
3.55
P2
1.95
2.00
2.05
W
7.9
8.0
8.3
Table 6. Pad description top view (pads down)
DS13176 - Rev 2
Pad ref
Pad name
Description
A1
OUT
Antenna
A2
GND4
Ground
A3
IN
STM32WB55 RF out
B1
GND3
Ground
B2
GND2
Ground
B3
GND1
Ground
page 7/14
MLPF-WB55-02E3
Recommendation on PCB assembly
3
Recommendation on PCB assembly
3.1
Land pattern
Figure 13. PCB land pattern recommendations
DS13176 - Rev 2
page 8/14
MLPF-WB55-02E3
Land pattern
Figure 14. PCB stack-up recommendations
DS13176 - Rev 2
Material
Thickness
Copper1
62 µm
Dielectric1
82 µm
Copper2
41 µm
Dielectric2
1180 µm
Copper3
42 µm
Dielectric3
87 µm
Copper4
66 µm
Dielectric constant
3.69
3.69
3.69
page 9/14
MLPF-WB55-02E3
Stencil opening design
3.2
Stencil opening design
Figure 15. Stencil opening recommendations
3.3
Solder paste
1.
2.
3.
4.
5.
DS13176 - Rev 2
100 µm solder stencil thickness is recommended
Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
“No clean” solder paste is recommended.
Offers a high tack force to resist component movement during PCB movement.
Solder paste with fine particles: powder particle size is 20-45 μm.
page 10/14
MLPF-WB55-02E3
Placement
3.4
Placement
1.
2.
3.
4.
5.
6.
3.5
PCB design preference
1.
2.
DS13176 - Rev 2
Manual positioning is not recommended.
It is recommended to use the lead recognition capabilities of the placement system, not the outline centering
Standard tolerance of ±0.05 mm is recommended.
1.0 N placement force is recommended. Too much placement force can lead to squeezed out solder paste
and cause solder joints to short. Too low placement force can lead to insufficient contact between package
and solder paste that could cause open solder joints or badly centered packages.
To improve the package placement accuracy, a bottom side optical control should be performed with a high
resolution tool.
For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder
paste printing, pick and place and reflow soldering by using optimized tools.
To control the solder paste amount, the closed via is recommended instead of open vias.
The position of tracks and open vias in the solder area should be well balanced. A symmetrical layout is
recommended, to avoid any tilt phenomena caused by asymmetrical solder paste due to solder flow away.
page 11/14
MLPF-WB55-02E3
Ordering information
4
Ordering information
Figure 16. Ordering information scheme
MLPF- WB55 - 02 E3
Matched low pass filter
Impedance matched to STM32WB55
02: Version
E3: Coated CSP on glass
Table 7. Ordering information
DS13176 - Rev 2
Order code
Marking
Package
Weight
Base qty.
Delivery mode
MLPF-WB55-02E3
TT
CSP Bumpless
1.546 mg
5000
Tape and reel (7")
page 12/14
MLPF-WB55-02E3
Revision history
Table 8. Document revision history
DS13176 - Rev 2
Date
Version
Changes
28-Nov-2019
1
Initial release.
14-Jan-2020
2
Updated Section Cover image.
page 13/14
MLPF-WB55-02E3
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service
names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2020 STMicroelectronics – All rights reserved
DS13176 - Rev 2
page 14/14
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