OA1MPA, OA2MPA,
OA4MPA
High precision low-power CMOS op amp
Datasheet - production data
Energy saving
Single (OA1MPA)
Guaranteed operation on low-voltage battery
Quad (OA4MPA)
Applications
Wearable
SC70-5
Fitness and healthcare
QFN16 3x3
Medical instrumentation
Dual (OA2MPA)
DFN8 2x2
Description
The OA1MPA, OA2MPA, OA4MPA series of
single, dual, and quad operational amplifiers offer
low-voltage operation, rail-to-rail input and output,
and excellent precision (Vio lower than 200 µV at
25 °C).
MiniSO-8
These low power op amps benefit from
STMicroelectronics 5 V CMOS technology and
offer an excellent speed/power consumption ratio
(150 kHz typical gain bandwidth) while consuming
less than 14 µA at 5 V. The OA1MPA, OA2MPA,
OA4MPA series also feature an ultra-low input
bias current.
Features
Low offset voltage: 200 µV max.
Low power consumption: 10 µA at 5 V
Low supply voltage: 1.5 V to 5.5 V
Gain bandwidth product: 150 kHz typ.
Low input bias current: 1 pA typ.
The OA1MPA, OA2MPA, OA4MPA are
respectively the single, dual and quad operational
amplifier versions and are housed in the smallest
industrial package.
Rail-to-rail input and output
EMI hardened operational amplifiers
High tolerance to ESD: 4 kV HBM
Extended temperature range: -40 to +125 °C
The OA1MPA, OA2MPA, OA4MPA family is the
ideal choice for wearable, fitness and healthcare
applications.
Benefits
High precision without calibration
Table 1. Device summary
Order code
Temperature range
OA1MPA22C
Package
Packaging
SC70-5
OA2MPA22Q
K1W
DFN8 2x2
-40° C to +125° C
Marking
K1W
Tape and reel
OA2MPA34S
MiniSO8
V712
OA4MPA33Q
QFN16 3x3
K1W
February 2014
DocID025992 Rev 1
This is information on a product in full production.
1/28
www.st.com
Contents
OA1MPA, OA2MPA, OA4MPA
Contents
1
Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 4
3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5
6
2/28
4.1
Operating voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.2
Rail-to-rail input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.3
Rail-to-rail output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.4
Input offset voltage drift over temperature . . . . . . . . . . . . . . . . . . . . . . . . 16
4.5
Long-term input offset voltage drift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.6
Initialization time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.7
PCB layouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.8
Macromodel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.1
SC70-5 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.2
DFN8 2x2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.3
MiniSO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.4
QFN16 3x3 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
DocID025992 Rev 1
OA1MPA, OA2MPA, OA4MPA
Pin connections
Figure 1. Pin connections (top view)
Single
9&&
,1
9&&
,1
287
SC70-5 (OA1MPA)
Dual
287
9&&
287
9&&
,1
287
,1
287
,1
,1
,1
,1
9&&
,1
9&&
,1
DFN8 2x2 (OA2MPA)
MiniSO-8 (OA2MPA)
1&
,1
287
287
,1
1&
,1
9&&
287
287
,1
,1
Quad
,1
1
Pin connections
,1
9&&
1&
,1
QFN16 3x3 (OA4MPA)
1. The exposed pads of the QFN16 3x3 can be connected to VCC- or left floating.
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28
Absolute maximum ratings and operating conditions
2
OA1MPA, OA2MPA, OA4MPA
Absolute maximum ratings and operating conditions
Table 2. Absolute maximum ratings (AMR)
Symbol
VCC
Vid
Parameter
Value
Supply voltage(1)
6
(2)
Differential input voltage
Input voltage
Iin
Input current(4)
V
±VCC
(3)
Vin
Unit
VCC- - 0.2 to VCC++ 0.2
10
mA
-65 to +150
°C
°C/W
Tstg
Storage temperature
Rthja
Thermal resistance junction-to-ambient(5)(6)
SC70-5
DFN8 2x2
MiniSO8
QFN16 3x3
205
120
190
45
Rthjc
Thermal resistance junction-to-case DFN8 2x2
33
Maximum junction temperature
150
°C
4
kV
Tj
HBM: human body model
(7)
(8)
150
OA2MPA(8)
200
MM: machine model for OA1MPA
MM: machine model for
ESD
MM: machine model for OA4MPA(8)
300
CDM: charged device model except MiniSO8
CDM: charged device model for MiniSO8
V
(9)
(9)
Latch-up immunity
1.5
kV
1.3
200
mA
1. All voltage values, except the differential voltage are with respect to the network ground terminal.
2. The differential voltage is a non-inverting input terminal with respect to the inverting input terminal. The
OA2MPA and OA4MPA devices include an internal differential voltage limiter that clamps internal
differential voltage at 0.5 V.
3. VCC - Vin must not exceed 6 V, Vin must not exceed 6 V.
4. Input current must be limited by a resistor in series with the inputs.
5. Short-circuits can cause excessive heating and destructive dissipation.
6. Rth are typical values.
7. Human body model: 100 pF discharged through a 1.5 kresistor between two pins of the device, done for
all couples of pin combinations with other pins floating.
8. Machine model: a 200 pF cap is charged to the specified voltage, then discharged directly between two
pins of the device with no external series resistor (internal resistor < 5 ), done for all couples of pin
combinations with other pins floating.
9. Charged device model: all pins plus package are charged together to the specified voltage and then
discharged directly to ground.
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OA1MPA, OA2MPA, OA4MPA
Absolute maximum ratings and operating conditions
Table 3. Operating conditions
Symbol
Parameter
VCC
Supply voltage
Vicm
Common mode input voltage range
Toper
Operating free air temperature range
Value
Unit
1.5 to 5.5
V
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VCC- - 0.1 to VCC+ + 0.1
-40 to +125
°C
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Electrical characteristics
3
OA1MPA, OA2MPA, OA4MPA
Electrical characteristics
VCC+ = 1.8 V with VCC- = 0 V, Vicm = VCC/2, T = 25 °C, and RL = 10 k connected to VCC/2
(unless otherwise specified)
Table 4. Electrical characteristics
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
DC performance
Vio
Vio/T
Iio
Iib
Input offset voltage
(Vicm = 0 V)
T = 25 °C
200
-40 °C < T< 85 °C
850
-40 °C < T< 125 °C
1200
°C(1)
Input offset voltage drift
-40 °C < T< 125
Input offset current
(Vout = VCC/2)
T = 25 °C
1
10(2)
-40 °C < T< 125 °C
1
300(2)
T = 25 °C
1
10(2)
-40 °C < T< 125 °C
1
300(2)
Input bias current (Vout = VCC/2)
10
Common mode rejection ratio
20 log (Vicm/Vio)
Vicm = 0 V to VCC,
Vout = VCC/2, RL > 1 M
T = 25 °C
69
-40 °C < T< 125 °C
61
Large signal voltage gain
Vout = 0.5 V to (VCC - 0.5 V)
T = 25 °C
95
Avd
-40 °C < T< 125 °C
85
High level output voltage
(VOH = VCC - Vout)
T = 25 °C
75
VOH
-40 °C < T< 125 °C
80
T = 25 °C
40
-40 °C < T< 125 °C
60
CMR
V
V/°C
pA
88
dB
mV
VOL
Low level output voltage
Isink (Vout = VCC)
6
-40 °C < T< 125 °C
4
T = 25 °C
5
-40 °C < T< 125 °C
3
12
mA
Iout
Isource (Vout = 0 V)
ICC
T = 25 °C
Supply current (per channel,
Vout = VCC/2, RL > 1 M
T = 25 °C
7
9
14
µA
-40 °C < T< 125 °C
16
AC performance
GBP
100
Gain bandwidth product
120
kHz
6/28
Fu
Unity gain frequency
Fm
Phase margin
Gm
Gain margin
100
RL = 10 k, CL = 100 pF
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45
Degrees
19
dB
OA1MPA, OA2MPA, OA4MPA
Electrical characteristics
Table 4. Electrical characteristics (continued)
Symbol
Parameter
SR
Slew rate(3)
en
Equivalent input noise voltage
Conditions
Min.
RL = 10 k, CL = 100 pF,
Vout = 0.5 V to VCC - 0.5 V
0.04
f = 1 kHz
100
f = 10 kHz
tinit
Initialization time(4)
Typ.
Max.
Unit
V/s
nV
-----------Hz
96
T = 25 °C
5
-40 °C < T< 125 °C
60
ms
1. See Section 4.4: Input offset voltage drift over temperature.
2. Guaranteed by characterization.
3. Slew rate value is calculated as the average between positive and negative slew rates.
4. Initialization time is defined as the delay after power-up to guarantee operation within specified performances. Guaranteed
by design. See Section 4.6: Initialization time.
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28
Electrical characteristics
OA1MPA, OA2MPA, OA4MPA
VCC+ = 3.3 V with VCC- = 0 V, Vicm = VCC/2, T = 25 °C, and RL = 10 k connected to VCC/2
(unless otherwise specified)
Table 5. Electrical characteristics
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
DC performance
Vio
Input offset voltage
T = 25 °C
200
-40 °C < T< 85 °C
850
-40 °C < T< 125 °C
Vio/T
Vio
Iio
Iib
CMR
1200
(1)
Input offset voltage drift
-40 °C < T< 125 °C
Long-term input offset voltage
drift
T = 25 °C(2)
Input offset current
(Vout = VCC/2)
T = 25 °C
1
10(3)
-40 °C < T< 125 °C
1
300(3)
T = 25 °C
1
10(3)
-40 °C < T< 125 °C
1
300(3)
Input bias current (Vout = VCC/2)
Common mode rejection ratio
T = 25 °C
20 log (Vicm/Vio)
Vicm = 0 V to VCC, Vout = VCC/2, -40 °C < T< 125 °C
RL > 1 M
V
10
V
---------------------------
0.3
80
V/°C
month
pA
100
69
dB
Large signal voltage gain
Vout = 0.5 V to (VCC - 0.5 V)
T = 25 °C
95
Avd
-40 °C < T< 125 °C
85
High level output voltage
(VOH = VCC - Vout)
T = 25 °C
75
VOH
-40 °C < T< 125 °C
80
T = 25 °C
40
-40 °C < T< 125 °C
60
mV
VOL
Low level output voltage
Isink (Vout = VCC)
20
-40 °C < T< 125 °C
15
T = 25 °C
20
-40 °C < T< 125 °C
15
34
mA
Iout
Isource (Vout = 0 V)
ICC
T = 25 °C
Supply current (per channel,
Vout = VCC/2, RL > 1 M)
T = 25 °C
26
9
14
µA
-40 °C < T< 125 °C
16
AC performance
GBP
Gain bandwidth product
100
120
kHz
8/28
Fu
Unity gain frequency
Fm
Phase margin
Gm
Gain margin
SR
Slew rate(4)
100
RL = 10 k, CL = 100 pF
RL = 10 k, CL = 100 pF,
Vout = 0.5 V to VCC - 0.5 V
DocID025992 Rev 1
45
Degrees
19
dB
0.05
V/s
OA1MPA, OA2MPA, OA4MPA
Electrical characteristics
Table 5. Electrical characteristics (continued)
Symbol
Parameter
Conditions
Min.
f = 1 kHz
en
Max.
Initialization time(5)
Unit
100
nV
-----------Hz
Equivalent input noise voltage
f = 10 kHz
tinit
Typ.
96
T = 25 °C
5
-40 °C < T< 125 °C
50
ms
1. See Section 4.4: Input offset voltage drift over temperature.
2. Typical value is based on the Vio drift observed after 1000h at 125 °C extrapolated to 25 °C using the Arrhenius law and
assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration. See Section 4.5:
Long-term input offset voltage drift.
3. Guaranteed by characterization.
4. Slew rate value is calculated as the average between positive and negative slew rates.
5. Initialization time is defined as the delay after power-up which guarantees operation within specified performances.
Guaranteed by design. See Section 4.6: Initialization time.
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Electrical characteristics
OA1MPA, OA2MPA, OA4MPA
VCC+ = 5 V with VCC- = 0 V, Vicm = VCC/2, T = 25 °C, and RL = 10 k connected to VCC/2
(unless otherwise specified)
Table 6. Electrical characteristics
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
DC performance
Vio
Input offset voltage
T = 25 °C
200
-40 °C < T< 85 °C
850
-40 °C < T< 125 °C
Vio/T
Vio
Input offset voltage drift
-40 °C < T< 125 °C
Long-term input offset voltage
drift
T = 25 °C(2)
Iio
Input offset current
(Vout = VCC/2)
Iib
Input bias current
(Vout = VCC/2)
CMR
SVR
Avd
EMIRR
VOH
1200
(1)
10
1
-40 °C < T< 125 °C
1
300(3)
T = 25 °C
1
10(3)
-40 °C < T< 125 °C
1
300(3)
pA
94
73
Supply voltage rejection ratio
20 log (VCC/Vio)
VCC = 1.5 to 5.5 V, Vic = 0 V,
RL > 1 M
T = 25 °C
71
-40 °C < T< 125 °C
71
Large signal voltage gain
Vout = 0.5 V to (VCC - 0.5 V)
T = 25 °C
95
-40 °C < T< 125 °C
85
High level output voltage
(VOH = VCC - Vout)
month
T = 25 °C
74
V/°C
V
---------------------------
0.7
10(3)
Common mode rejection ratio T = 25 °C
20 log (Vicm/Vio)
Vicm = 0 V to VCC,
-40 °C < T< 125 °C
Vout = VCC/2, RL > 1 M
EMI rejection ratio
EMIRR = 20 log
(VRFpeak/Vio)
V
90
dB
VRF = 100 mVRFpeak, f = 400 MHz
38(4)
VRF = 100 mVRFpeak, f = 900 MHz
50(4)
VRF = 100 mVRFpeak, f = 1800 MHz
60(4)
VRF = 100 mVRFpeak, f = 2400 MHz
63(4)
T = 25 °C
75
-40 °C < T< 125 °C
80
T = 25 °C
40
-40 °C < T< 125 °C
60
mV
VOL
Low level output voltage
Isink (Vout = VCC)
Iout
35
-40 °C < T< 125 °C
20
T = 25 °C
35
-40 °C < T< 125 °C
20
56
mA
Isource (Vout = 0 V)
10/28
T = 25 °C
DocID025992 Rev 1
45
OA1MPA, OA2MPA, OA4MPA
Electrical characteristics
Table 6. Electrical characteristics (continued)
Symbol
ICC
Parameter
Supply current (per channel,
Vout = VCC/2, RL > 1 M)
Conditions
Min.
T = 25 °C
Typ.
Max.
10
14
Unit
µA
-40 °C < T< 125 °C
16
AC performance
GBP
110
Gain bandwidth product
150
kHz
Fu
Unity gain frequency
Fm
Phase margin
Gm
Gain margin
SR
Slew rate(5)
en
Low-frequency peak-to-peak
input noise
en
Equivalent input noise voltage
THD+N
tinit
Total harmonic distortion +
noise
Initialization time(6)
120
RL = 10 k, CL = 100 pF
45
Degrees
19
dB
RL = 10 k, CL = 100 pF,
Vout = 0.5 V to VCC - 0.5 V
0.06
V/s
Bandwidth: f = 0.1 to 10 Hz
10
µVpp
f = 1 kHz
100
f = 10 kHz
96
fin = 1 kHz, ACL = 1,
RL = 100 k, Vicm = (VCC - 1 V)/2,
BW = 22 kHz, Vout = 0.5 Vpp
nV
-----------Hz
0.008
%
T = 25 °C
5
-40 °C < T< 125 °C
50
ms
1. See Section 4.4: Input offset voltage drift over temperature.
2. Typical value is based on the Vio drift observed after 1000h at 125 °C extrapolated to 25 °C using the Arrhenius law and
assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration. See Section 4.5:
Long-term input offset voltage drift.
3. Guaranteed by characterization.
4. Tested on SC70-5 package.
5. Slew rate value is calculated as the average between positive and negative slew rates.
6. Initialization time is defined as the delay after power-up to guarantee operation within specified performances. Guaranteed
by design. See Section 4.6: Initialization time.
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Electrical characteristics
OA1MPA, OA2MPA, OA4MPA
Figure 2. Supply current vs. supply voltage at
Vicm = VCC/2
Figure 3. Input offset voltage distribution at
VCC = 5 V, Vicm = VCC/2
Figure 4. Input offset voltage distribution at
VCC = 3.3 V, Vicm = VCC/2
Figure 5. Input offset voltage temperature
coefficient distribution
30
Population (%)
25
VCC = 3.3 V
Vicm = 1.65 V
T = 25 ˚C
20
15
10
5
0
-250
-200
-150
-100
-50
0
50
100
150
200
250
Input offset voltage (µV)
Figure 7. Input offset voltage vs. temperature
Figure 6. Input offset voltage vs. input common
mode voltage
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OA1MPA, OA2MPA, OA4MPA
Electrical characteristics
Figure 9. Output current vs. output voltage at
VCC = 5 V
Figure 8. Output current vs. output voltage at
VCC = 1.5 V
Figure 11. Bode diagram at VCC = 1.5 V
Figure 10. Output current vs. supply voltage
Figure 13. Closed-loop gain diagram vs.
capacitive load
Figure 12. Bode diagram at VCC = 5 V
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Electrical characteristics
OA1MPA, OA2MPA, OA4MPA
Figure 15. Negative slew rate
Figure 14. Positive slew rate
Figure 17. Noise vs. frequency
Figure 16. Slew rate vs. supply voltage
Figure 19. THD+N vs. frequency
Figure 18. 0.1 Hz to 10 Hz noise
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OA1MPA, OA2MPA, OA4MPA
Electrical characteristics
Figure 21. Output impedance vs. frequency in
closed-loop configuration
Figure 20. THD+N vs. output voltage
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Application information
OA1MPA, OA2MPA, OA4MPA
4
Application information
4.1
Operating voltages
The OA1MPA, OA2MPA, and OA4MPA series of devices can operate from 1.5 V to 5.5 V.
The parameters are fully specified for 1.8 V, 3.3 V, and 5 V power supplies. However, they
are very stable in the full VCC range and several characterization curves show OA1MPA,
OA2MPA, and OA4MPA device characteristics at 1.5 V. In addition, the main specifications
are guaranteed in the extended temperature range from -40 °C to +125 °C.
4.2
Rail-to-rail input
The OA1MPA, OA2MPA, and OA4MPA devices have a rail-to-rail input, and the input
common mode range is extended from VCC-- 0.1 V to VCC+ + 0.1 V.
4.3
Rail-to-rail output
The output levels of the OA1MPA, OA2MPA, and OA4MPA operational amplifiers can go
close to the rails: to a maximum of 40 mV below the upper rail and to a maximum of 75 mV
above the lower rail when a 10 k resistive load is connected to VCC/2.
4.4
Input offset voltage drift over temperature
The maximum input voltage drift over the temperature variation is defined as the offset
variation related to offset value measured at 25 °C. The operational amplifier is one of the
main circuits of the signal conditioning chain, and the amplifier input offset is a major
contributor to the chain accuracy. The signal chain accuracy at 25 °C can be compensated
during production at application level. The maximum input voltage drift over temperature
enables the system designer to anticipate the effect of temperature variations.
The maximum input voltage drift over temperature is computed using Equation 1.
Equation 1
V io
V io T – V io 25C
------------ = max ------------------------------------------------T
T – 25C
with T = -40 °C and 125 °C.
The datasheet maximum value is guaranteed by a measurement on a representative
sample size ensuring a Cpk (process capability index) greater than 1.33.
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OA1MPA, OA2MPA, OA4MPA
4.5
Application information
Long-term input offset voltage drift
To evaluate product reliability, two types of stress acceleration are used:
Voltage acceleration, by changing the applied voltage
Temperature acceleration, by changing the die temperature (below the maximum
junction temperature allowed by the technology) with the ambient temperature.
The voltage acceleration has been defined based on JEDEC results, and is defined using
Equation 2.
Equation 2
A FV = e
VS – VU
Where:
AFV is the voltage acceleration factor
is the voltage acceleration constant in 1/V, constant technology parameter ( = 1)
VS is the stress voltage used for the accelerated test
VU is the voltage used for the application
The temperature acceleration is driven by the Arrhenius model, and is defined in Equation 3.
Equation 3
A FT = e
Ea 1
1
------ ------ – ------
k T U T S
Where:
AFT is the temperature acceleration factor
Ea is the activation energy of the technology based on the failure rate
k is the Boltzmann constant (8.6173 x 10-5 eV.K-1)
TU is the temperature of the die when VU is used (K)
TS is the temperature of the die under temperature stress (K)
The final acceleration factor, AF, is the multiplication of the voltage acceleration factor and
the temperature acceleration factor (Equation 4).
Equation 4
A F = A FT A FV
AF is calculated using the temperature and voltage defined in the mission profile of the
product. The AF value can then be used in Equation 5 to calculate the number of months of
use equivalent to 1000 hours of reliable stress duration.
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Application information
OA1MPA, OA2MPA, OA4MPA
Equation 5
Months = A F 1000 h 12 months 24 h 365.25 days
To evaluate the op amp reliability, a follower stress condition is used where VCC is defined
as a function of the maximum operating voltage and the absolute maximum rating (as
recommended by JEDEC rules).
The Vio drift (in µV) of the product after 1000 h of stress is tracked with parameters at
different measurement conditions (see Equation 6).
Equation 6
V CC = maxV op with V icm = V CC 2
The long term drift parameter (Vio), estimating the reliability performance of the product, is
obtained using the ratio of the Vio (input offset voltage value) drift over the square root of the
calculated number of months (Equation 7).
Equation 7
V io drift
V io = ----------------------------- months
where Vio drift is the measured drift value in the specified test conditions after 1000 h stress
duration.
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OA1MPA, OA2MPA, OA4MPA
4.6
Application information
Initialization time
The OA1MPA, OA2MPA, and OA4MPA series of devices use a proprietary trimming
topology that is initiated at each device power-up and allows excellent Vio performance to be
achieved. The initialization time is defined as the delay after power-up which guarantees
operation within specified performances. During this period, the current consumption (ICC)
and the input offset voltage (Vio) can be different to the typical ones.
Figure 22. Initialization phase
The initialization time is VCC and temperature dependent. Table 7 sums up the
measurement results for different supply voltages and for temperatures varying from -40 °C
to 125 °C.
Table 7. Initialization time measurement results
Temperature: -40 °C
Temperature: 25 °C
Temperature: 125 °C
VCC (V)
4.7
Tinit (ms)
ICC phase 1 (mA)
Tinit (ms)
ICC phase 1 (mA)
Tinit (ms)
ICC phase 1 (mA)
1.8
37
0.33
3.2
0.40
0.35
0.46
3.3
2.9
1.4
0.95
1.3
0.34
1.2
5
2.4
3.2
0.85
2.4
0.31
2.9
PCB layouts
For correct operation, it is advised to add a 10 nF decoupling capacitors as close as
possible to the power supply pins.
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Application information
4.8
OA1MPA, OA2MPA, OA4MPA
Macromodel
Accurate macromodels of the OA1MPA, OA2MPA, and OA4MPA devices are available on
the STMicroelectronics’ website at www.st.com. These model are a trade-off between
accuracy and complexity (that is, time simulation) of the OA1MPA, OA2MPA, and OA4MPA
op amp. They emulate the nominal performance of a typical device within the specified
operating conditions mentioned in the datasheet. They also help to validate a design
approach and to select the right op amp, but they do not replace on-board measurements.
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OA1MPA, OA2MPA, OA4MPA
5
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
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Package information
5.1
OA1MPA, OA2MPA, OA4MPA
SC70-5 package information
Figure 23. SC70-5 package mechanical drawing
SIDE VIEW
DIMENSIONS IN MM
GAUGE PLANE
COPLANAR LEADS
SEATING PLANE
TOP VIEW
Table 8. SC70-5 package mechanical data
Dimensions
Symbol
Millimeters
Min.
22/28
Typ.
Inches
Max.
Min.
0.032
A
0.80
1.10
A1
0
0.10
A2
0.80
b
0.90
Typ.
Max.
0.043
0.004
1.00
0.032
0.035
0.15
0.30
0.006
0.012
c
0.10
0.22
0.004
0.009
D
1.80
2.00
2.20
0.071
0.079
0.087
E
1.80
2.10
2.40
0.071
0.083
0.094
E1
1.15
1.25
1.35
0.045
0.049
0.053
e
0.65
0.025
e1
1.30
0.051
L
0.26
<
0°
0.36
0.46
0.010
8°
0°
DocID025992 Rev 1
0.014
0.039
0.018
8°
OA1MPA, OA2MPA, OA4MPA
DFN8 2x2 package information
Figure 24. DFN8 2x2 package mechanical drawing
'
$
%
& [
(
3,1,1'(;$5($
& [
7239,(:
$
&
$
&
6($7,1*
3/$1(
6,'(9,(:
&
H
E SOFV
3,1,1'(;$5($
& $ %
3LQ,'
/
5.2
Package information
%277209,(:
*$06&%
Table 9. DFN8 2x2 package mechanical data
Dimensions
Ref.
Millimeters
Inches
Min.
Typ.
Max.
Min.
Typ.
Max.
A
0.70
0.75
0.80
0.028
0.030
0.031
A1
0.00
0.02
0.05
0.000
0.001
0.002
b
0.15
0.20
0.25
0.006
0.008
0.010
D
2.00
0.079
E
2.00
0.079
e
0.50
0.020
L
N
0.045
0.55
0.65
8
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0.018
0.022
0.026
8
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Package information
5.3
OA1MPA, OA2MPA, OA4MPA
MiniSO-8 package information
Figure 25. MiniSO-8 package mechanical drawing
Table 10. MiniSO-8 package mechanical data
Dimensions
Ref.
Millimeters
Min.
Typ.
A
Max.
Min.
Typ.
1.1
A1
0
A2
0.75
b
Max.
0.043
0.15
0
0.95
0.030
0.22
0.40
0.009
0.016
c
0.08
0.23
0.003
0.009
D
2.80
3.00
3.20
0.11
0.118
0.126
E
4.65
4.90
5.15
0.183
0.193
0.203
E1
2.80
3.00
3.10
0.11
0.118
0.122
e
L
0.85
0.65
0.40
0.60
0.006
0.033
0.80
0.016
0.024
0.95
0.037
L2
0.25
0.010
ccc
0°
0.037
0.026
L1
k
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Inches
8°
0.10
DocID025992 Rev 1
0°
0.031
8°
0.004
OA1MPA, OA2MPA, OA4MPA
5.4
Package information
QFN16 3x3 package information
Figure 26. QFN16 3x3 package mechanical drawing
4)1B[B9B B&
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Package information
OA1MPA, OA2MPA, OA4MPA
Table 11. QFN16 3x3 mm package mechanical data (pitch 0.5 mm)
Dimensions
Ref.
Millimeters
Inches
Min.
Typ.
Max.
Min.
Typ.
Max.
A
0.80
0.90
1.00
0.031
0.035
0.039
A1
0
0.05
0
A3
0.20
b
0.18
D
2.90
D2
1.50
E
2.90
E2
1.50
e
L
3.00
3.00
0.008
0.30
0.007
3.10
0.114
1.80
0.059
3.10
0.114
1.80
0.059
0.50
0.30
0.002
0.012
0.118
0.071
0.118
0.122
0.071
0.020
0.50
0.012
Figure 27. QFN16 3x3 footprint recommendation
4)1B[B9BIRRWSULQWB B&
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0.122
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0.020
OA1MPA, OA2MPA, OA4MPA
6
Revision history
Revision history
Table 12. Document revision history
Date
Revision
28-Feb-2014
1
Changes
Initial release
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OA1MPA, OA2MPA, OA4MPA
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