SA555D

NE555 SA555 - SE555 General-purpose single bipolar timers Features ■ Low turn-off time ■ Maximum operating frequency greater than 500 kHz ■ Timing from microseconds to hours ■ Operates in both astable and monostable modes ■ Output can source or sink up to 200 mA ■ Adjustable duty cycle ■ TTL compatible ■ Temperature stability of 0.005% per °C N DIP8 (Plastic package) D SO8 (Plastic micropackage) Description The NE555, SA555, and SE555 monolithic timing circuits are highly stable controllers capable of producing accurate time delays or oscillation. In the time delay mode of operation, the time is precisely controlled by one external resistor and capacitor. For a stable operation as an oscillator, the free running frequency and the duty cycle are both accurately controlled with two external resistors and one capacitor. The circuit may be triggered and reset on falling waveforms, and the output structure can source or sink up to 200 mA. Pin connections (top view) 1 8 2 7 3 6 4 5 1 - GND 2 - Trigger 3 - Output 4 - Reset January 2012 Doc ID 2182 Rev 6 5 - Control voltage 6 - Threshold 7 - Discharge 8 - VCC 1/20 www.st.com 20 Schematic diagrams 1 NE555 - SA555 - SE555 Schematic diagrams Figure 1. Block diagram VCC+ 5kΩ COMP THRESHOLD CONTROL VOLTAGE DISCHARGE R FLIP-FLOP Q 5kΩ COMP OUT TRIGGER S INHIBIT/ RESET 5kΩ RESET Figure 2. 2/20 Schematic diagram Doc ID 2182 Rev 6 S NE555 - SA555 - SE555 2 Absolute maximum ratings and operating conditions Absolute maximum ratings and operating conditions Table 1. Absolute maximum ratings Symbol Parameter VCC Supply voltage IOUT Output current (sink & source) Rthja Thermal resistance junction to ambient DIP8 SO-8 Rthjc Thermal resistance junction to case(1) DIP8 SO-8 (3) Machine model (MM) Charged device model TLEAD Tj (CDM)(4) 18 V ±225 mA 85 125 °C/W 41 40 °C/W 1000 100 V 1500 Latch-up immunity 200 mA Lead temperature (soldering 10 seconds) 260 °C Junction temperature 150 °C -65 to 150 °C Storage temperature range Tstg Unit (1) Human body model (HBM)(2) ESD Value 1. Short-circuits can cause excessive heating. These values are typical. 2. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating. 3. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of connected pin combinations while the other pins are floating. 4. Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly to the ground through only one pin. This is done for all pins. Table 2. Operating conditions Symbol Value Unit 4.5 to 16 4.5 to 16 4.5 to 18 V Maximum input voltage VCC V IOUT Output current (sink and source) ±200 mA Toper Operating free air temperature range NE555 SA555 SE555 VCC Vth, Vtrig, Vcl, Vreset Parameter Supply voltage NE555 SA555 SE555 Doc ID 2182 Rev 6 0 to 70 -40 to 105 -55 to 125 °C 3/20 Electrical characteristics NE555 - SA555 - SE555 3 Electrical characteristics Table 3. Tamb = +25° C, VCC = +5 V to +15 V (unless otherwise specified) SE555 Symbol Unit Min. ICC NE555 - SA555 Parameter Typ. Max. 3 10 2 Timing error (monostable) (RA = 2 kΩ to 100 kΩ, C = 0.1 μF) Initial accuracy (1) Drift with temperature Drift with supply voltage 0.5 30 0.05 Timing error (astable) (RA, RB = 1 kΩ to 100 kΩ, C = 0.1 μF, VCC= +15 V) Initial accuracy (1) Drift with temperature Drift with supply voltage 1.5 90 0.15 Supply current (RL = ∝) Low state VCC = +5 V VCC = +15 V High state VCC = +5 V Min. Typ. Max. 5 12 3 10 2 6 15 2 100 0.2 1 50 0.1 3 0.5 2.25 150 0.3 mA % ppm/°C %/V % ppm/°C %/V VCL Control voltage level VCC = +15 V VCC = +5 V 9.6 2.9 10 3.33 10.4 3.8 9 2.6 10 3.33 11 4 V Vth Threshold voltage VCC = +15 V VCC = +5 V 9.4 2.7 10 3.33 10.6 4 8.8 2.4 10 3.33 11.2 4.2 V Ith Threshold current (2) 0.1 0.25 0.1 0.25 µA 5 1.67 5.2 1.9 5 1.67 5.6 2.2 V 0.5 0.9 0.5 2.0 µA 0.7 1 0.7 1 V mA Vtrig Trigger voltage VCC = +15 V VCC = +5 V Itrig Trigger current (Vtrig = 0 V) (3) 4.8 1.45 Vreset Reset voltage Ireset Reset current Vreset = +0.4 V Vreset = 0 V 0.1 0.4 0.4 1 0.1 0.4 0.4 1.5 VOL Low level output voltage VCC = +15 VIO(sink) = 10 mA IO(sink) = 50 mA IO(sink) = 100 mA IO(sink) = 200 mA VCC = +5 V IO(sink) = 8 mA IO(sink) = 5 mA 0.1 0.4 2 2.5 0.1 0.05 0.15 0.5 2.2 0.1 0.4 2 2.5 0.3 0.25 0.25 0.75 2.5 4/20 0.4 4.5 1.1 Doc ID 2182 Rev 6 0.25 0.2 0.4 0.4 0.35 V NE555 - SA555 - SE555 Table 3. Electrical characteristics Tamb = +25° C, VCC = +5 V to +15 V (unless otherwise specified) (continued) SE555 Symbol VOH Idis(off) High level output voltage VCC = +15 VIO(sink) = 200 mA IO(sink) = 100 mA VCC = +5 V IO(sink) = 100 mA Unit Min. Typ. 13 3 12.5 13.3 3.3 Discharge pin leakage current (output high) Vdis = 10 V toff Max. Min. 12.7 5 2.75 Typ. Max. 12.5 13.3 3.3 V 20 100 20 100 180 80 480 200 180 80 480 200 Output rise time Output fall time 100 100 200 200 100 100 300 300 Turn off time (5) (Vreset = VCC) 0.5 Discharge pin saturation voltage (output low) (4) Vdis(sat) VCC = +15V, Idis = 15 mA VCC = +5V, Idis = 4.5 mA tr tf NE555 - SA555 Parameter nA mV 0.5 ns µs 1. Tested at VCC = +5 V and VCC = +15 V. 2. This will determine the maximum value of RA + RB for 15 V operation. The maximum total (RA + RB) is 20 MΩ for +15 V operation and 3.5 MΩ for +5 V operation. 3. Specified with trigger input high. 4. No protection against excessive pin 7 current is necessary, providing the package dissipation rating is not exceeded. 5. Time measured from a positive pulse (from 0 V to 0.8 x VCC) on the threshold pin to the transition from high to low on the output pin. Trigger is tied to threshold. Doc ID 2182 Rev 6 5/20 Electrical characteristics NE555 - SA555 - SE555 Figure 3. Minimum pulse width required for triggering Figure 4. Supply current versus supply voltage Figure 5. Delay time versus temperature Figure 6. Low output voltage versus output sink current Figure 7. Low output voltage versus output sink current Figure 8. Low output voltage versus output sink current 6/20 Doc ID 2182 Rev 6 NE555 - SA555 - SE555 Figure 9. Electrical characteristics High output voltage drop versus output Figure 10. Delay time versus supply voltage Figure 11. Propagation delay versus voltage level of trigger value Doc ID 2182 Rev 6 7/20 Application information NE555 - SA555 - SE555 4 Application information 4.1 Monostable operation In the monostable mode, the timer generates a single pulse. As shown in Figure 12, the external capacitor is initially held discharged by a transistor inside the timer. Figure 12. Typical schematics in monostable operation VCC = 5 to 15V Reset R1 8 4 Trigger 7 2 NE555 Output 6 5 3 1 C1 Control Voltage 0.01μF The circuit triggers on a negative-going input signal when the level reaches 1/3 VCC. Once triggered, the circuit remains in this state until the set time has elapsed, even if it is triggered again during this interval. The duration of the output HIGH state is given by t = 1.1 R1C1 and is easily determined by Figure 14. Note that because the charge rate and the threshold level of the comparator are both directly proportional to supply voltage, the timing interval is independent of supply. Applying a negative pulse simultaneously to the reset terminal (pin 4) and the trigger terminal (pin 2) during the timing cycle discharges the external capacitor and causes the cycle to start over. The timing cycle now starts on the positive edge of the reset pulse. During the time the reset pulse is applied, the output is driven to its LOW state. When a negative trigger pulse is applied to pin 2, the flip-flop is set, releasing the shortcircuit across the external capacitor and driving the output HIGH. The voltage across the capacitor increases exponentially with the time constant t = R1C1. When the voltage across the capacitor equals 2/3 VCC, the comparator resets the flip-flop which then discharges the capacitor rapidly and drives the output to its LOW state. Figure 13 shows the actual waveforms generated in this mode of operation. When Reset is not used, it should be tied high to avoid any possibility of unwanted triggering. 8/20 Doc ID 2182 Rev 6 NE555 - SA555 - SE555 Application information Figure 13. Waveforms in monostable operation t = 0.1 ms / div INPUT = 2.0V/div OUTPUT VOLTAGE = 5.0V/div CAPACITOR VOLTAGE = 2.0V/div R1 = 9.1kΩ, C1 = 0.01μF, RL = 1kΩ Figure 14. Pulse duration versus R1C1 0.01 0.001 10 μs 4.2 Ω 10 M 0.1 10 k R 1= 1.0 Ω 10 0k Ω 1M Ω 1k Ω C (μF) 10 100 μs 1.0 ms 10 ms 100 ms 10 s (t d ) Astable operation When the circuit is connected as shown in Figure 15 (pins 2 and 6 connected) it triggers itself and free runs as a multi-vibrator. The external capacitor charges through R1 and R2 and discharges through R2 only. Thus the duty cycle can be set accurately by adjusting the ratio of these two resistors. In the astable mode of operation, C1 charges and discharges between 1/3 VCC and 2/3 VCC. As in the triggered mode, the charge and discharge times and, therefore, frequency are independent of the supply voltage. Doc ID 2182 Rev 6 9/20 Application information NE555 - SA555 - SE555 Figure 15. Typical schematics in astable operation VCC = 5 to 15V R1 8 4 Output 3 7 NE555 Control Voltage R2 6 5 0.01μF 1 2 C1 Figure 16 shows the actual waveforms generated in this mode of operation. The charge time (output HIGH) is given by: t1 = 0.693 (R1 + R2) C1 and the discharge time (output LOW) by: t2 = 0.693 (R2) C1 Thus the total period T is given by: T = t1 + t2 = 0.693 (R1 + 2R2) C1 The frequency of oscillation is then: 1 1.44 f = --- = -------------------------------------T ( R1 + 2R2 )C1 It can easily be found from Figure 17. The duty cycle is given by: R2 t1 ( R1 + R2 ) - = 1 – ---------------------------------------------= ----------------------------------( R1 + R2 ) ( t1 + t2 ) ( R1 + 2 • R2 ) 10/20 Doc ID 2182 Rev 6 NE555 - SA555 - SE555 Application information Figure 16. Waveforms in astable operation t = 0.5 ms / div OUTPUT VOLTAGE = 5.0V/div CAPACITOR VOLTAGE = 1.0V/div R1 = R2 = 4.8kΩ, C1= 0.1μF, RL = 1kΩ Figure 17. Free running frequency versus R1, R2 and C1 C (μF) 10 1.0 R 1 1k Ω 10 kΩ + 0.1 0.01 0.001 0.1 1 R2 1M = 10 M 10 10 0k Ω Ω Ω 100 Doc ID 2182 Rev 6 1k 10k f o (Hz) 11/20 Application information 4.3 NE555 - SA555 - SE555 Pulse width modulator When the timer is connected in the monostable mode and triggered with a continuous pulse train, the output pulse width can be modulated by a signal applied to pin 5. Figure 18 shows the circuit. Figure 18. Pulse width modulator VCC RA 8 4 Trigger 7 2 NE555 6 Modulation Input 5 3 Output C 1 4.4 Linear ramp When the pull-up resistor, RA, in the monostable circuit is replaced by a constant current source, a linear ramp is generated. Figure 19 shows a circuit configuration that will perform this function. Figure 19. Linear ramp VCC RE Trigger R1 8 4 7 2 NE555 2N4250 or equiv. 6 C Output 5 3 1 12/20 Doc ID 2182 Rev 6 0.01μF R2 NE555 - SA555 - SE555 Application information Figure 20 shows the waveforms generator by the linear ramp. The time interval is given by: (2/3 Vcc RE (R1+R2) C T = ---------------------------------------------------------------- VBE = 0.6V R1 Vcc - VBE (R1+R2) Figure 20. Linear ramp VCC = 5 V Time: 20 µs/DIV R1 + 47 kΩ R2 = 100 kΩ RE = 2.7 kΩ C = 0.01 µF 4.5 Top trace: input 3 V/DIV Middle trace: output 5 V/DIV Bottom trace: output 5 V/DIV Bottom trace: capacitor voltage 1 V/DIV 50% duty cycle oscillator For a 50% duty cycle, the resistors RA and RB can be connected as in Figure 21. The time period for the output high is the same as for astable operation (see Section 4.2 on page 9): t1 = 0.693 RA C For the output low it is RB – 2RA t 2 = [(R. RB)/(RA+RB)].C.Ln --------------------------2RB – RA Thus the frequency of oscillation is: 1 f = ---------------t1 + t2 Doc ID 2182 Rev 6 13/20 Application information Figure 21. NE555 - SA555 - SE555 50% duty cycle oscillator VCC VCC RA 51kΩ 4 8 RB 7 2 22kΩ NE555 Out 6 5 3 1 0.01μF C 0.01μF Note that this circuit will not oscillate if RB is greater than 1/2 RA because the junction of RA and RB cannot bring pin 2 down to 1/3 VCC and trigger the lower comparator. 4.6 Additional information Adequate power supply bypassing is necessary to protect associated circuitry. The minimum recommended is 0.1 µF in parallel with 1 µF electrolytic. 14/20 Doc ID 2182 Rev 6 NE555 - SA555 - SE555 5 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Doc ID 2182 Rev 6 15/20 Package information 5.1 NE555 - SA555 - SE555 DIP8 package information Figure 22. DIP8 package mechanical drawing Table 4. DIP8 package mechanical data Dimensions Ref. Millimeters Min. Typ. A Max. Min. Typ. 5.33 Max. 0.210 A1 0.38 0.015 A2 2.92 3.30 4.95 0.115 0.130 0.195 b 0.36 0.46 0.56 0.014 0.018 0.022 b2 1.14 1.52 1.78 0.045 0.060 0.070 c 0.20 0.25 0.36 0.008 0.010 0.014 D 9.02 9.27 10.16 0.355 0.365 0.400 E 7.62 7.87 8.26 0.300 0.310 0.325 E1 6.10 6.35 7.11 0.240 0.250 0.280 e 2.54 0.100 eA 7.62 0.300 eB L 16/20 Inches 10.92 2.92 3.30 3.81 Doc ID 2182 Rev 6 0.430 0.115 0.130 0.150 NE555 - SA555 - SE555 5.2 Package information SO-8 package information Figure 23. SO-8 package mechanical drawing Table 5. SO-8 package mechanical data Dimensions Ref. Millimeters Min. Typ. A Inches Max. Min. Typ. 1.75 0.069 A1 0.10 A2 1.25 b 0.28 0.48 0.011 0.019 c 0.17 0.23 0.007 0.010 D 4.80 4.90 5.00 0.189 0.193 0.197 E 5.80 6.00 6.20 0.228 0.236 0.244 E1 3.80 3.90 4.00 0.150 0.154 0.157 e 0.25 Max. 0.004 0.010 0.049 1.27 0.050 h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 L1 k ccc 1.04 0 0.040 8° 0.10 Doc ID 2182 Rev 6 1° 8° 0.004 17/20 Ordering information 6 NE555 - SA555 - SE555 Ordering information Table 6. Order codes Part number Temperature range NE555N (1) SO-8 SA555N Marking Tube NE555N (1) Tube NE555 Tube SA555N SO-8 Tube(1) or tape & reel SA555 Tube SE555N DIP8 -55 °C, + 125 °C SO-8 Tube(1) 1. Not recommended for new design. Contact local ST sales office for availability. 18/20 or tape & reel DIP8 -40 °C, +105 °C SE555N SE555D(1)/DT Packing DIP8 0 °C, +70 °C NE555D /DT SA555D(1)/DT Package Doc ID 2182 Rev 6 or tape & reel SE555 NE555 - SA555 - SE555 7 Revision history Revision history Table 7. Document revision history Date Revision 01-Jun-2003 1 2004-2006 2-3 15-Mar-2007 4 Expanded order code table. Template update. 5 Added IOUT value in Table 1: Absolute maximum ratings and Table 2: Operating conditions. Added ESD tolerance, latch-up tolerance, Rthja and Rthjcin Table 1: Absolute maximum ratings. 6 Modified duty cycle equation in Section 4.2: Astable operation. Updated ECOPACK® text in Section 5: Package information. Added footnote 1 to Table 6: Order codes as shipping method in tubes is not recommended for new design. 06-Nov-2008 04-Jan-2012 Changes Initial release. Internal revisions Doc ID 2182 Rev 6 19/20 NE555 - SA555 - SE555 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. 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