SD2941-10
HF/VHF/UHF RF power N-channel MOSFETs
Datasheet - production data
Features
• Gold metallization
• Excellent thermal stability
• Common source configuration
• POUT = 175 W min. with 15 dB gain @ 175
MHz, 50 V
• POUT = 135 W typ. with 14 dB gain @ 123 MHz,
28 V
M174 Epoxy sealed
• Low RDS(on)
• Thermally enhanced packaging for lower
junction temperatures
• In compliance with the 2002/95/EC1 European
directive
Figure 1. Pin connection
1. Drain
4
1
2. Source
3. Gate
4. Source
3
2
Description
The SD2941-10 is a gold metalized N-channel
MOS field-effect RF power transistor, intended for
use in 28 V to 50 V dc large signal applications up
to 230 MHz. It offers 25% lower RDS(on) than the
industry standard, with 20% higher PSAT than
ST's SD2931-10 device. The SD2941-10 is
housed in the low thermal M174 non-pedestal
package, offering 25% lower thermal resistance
than the industry standard, thus rendering it the
"best-in-class" transistor for ISM applications,
where reliability and ruggedness are critical
factor.
Table 1. Device summary
Order code
Marking
Base qty.
Package
Packaging(1)
SD2941-10W
SD2941-10(1)
25 pcs
M174
Plastic tray
1. For more details please refer to Chapter 7: Marking, packing and shipping specifications.
August 2015
This is information on a product in full production.
DocID11815 Rev 6
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www.st.com
Contents
SD2941-10
Contents
1
Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4
Typical performance
5
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
6
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7
Marking, packing and shipping specifications . . . . . . . . . . . . . . . . . . . 15
8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2/17
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SD2941-10
Electrical data
1
Electrical data
1.1
Maximum rating
(TCASE = 25 °C)
Table 2. Absolute maximum rating
Symbol
V(BR)DSS(1)
VDGR
(1)
VGS
ID
PDISS
TJ
TSTG
Parameter
Value
Unit
Drain source voltage
130
V
Drain-gate voltage (RGS = 1MΩ)
130
V
Gate-source voltage
±40
V
Drain current
20
A
Power dissipation
389
W
Max. operating junction temperature
200
°C
-65 to +150
°C
Value
Unit
0.45
°C/W
Storage temperature
1. TJ = 150 °C
Table 3. Thermal data
Symbol
RthJC
Parameter
Junction to case thermal resistance
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Electrical characteristics
2
SD2941-10
Electrical characteristics
(TCASE = 25 °C)
Table 4. Static
Symbol
Test conditions
Min.
Typ.
Max.
Unit
V(BR)DSS(1)
VGS = 0 V
IDS = 100 mA
IDSS
VGS = 0 V
VDS = 50 V
50
mA
VGS = 20 V
VDS = 0 V
250
nA
VDS = 10 V
ID = 250 mA
VDS(ON)
VGS = 10 V
ID = 10 A
GFS
VDS = 10 V
ID = 5 A
CISS
VGS = 0 V
VDS = 50 V
COSS
VGS = 0 V
CRSS
VGS = 0 V
IGSS
VGS(Q)
(2)
130
V
V
2.0
5
V
6
mho
f = 1 MHz
415
pF
VDS = 50 V
f = 1 MHz
236
pF
VDS = 50 V
f = 1 MHz
17
pF
1. TJ = 150°C
2. VGS(Q) sorted with alpha/numeric code marked on unit.
Table 5. Dynamic
Symbol
POUT
GPS
hD
Test conditions
VDD = 28 V IDQ = 250 mA f = 123 MHz
VDD = 50 V IDQ = 250 mA f = 175 MHz
VDD = 50 V IDQ = 250 mA POUT = 175 W f = 175 MHz
175
Max.
14
15.8
65
VDD = 50 V IDQ = 250 mA POUT = 175 W f = 175MHz
55
VDD = 50 V IDQ = 250 mA POUT = 175 W f = 175MHz
All phase angles
10:1
65
Unit
W
200
14
VDD = 28 V IDQ = 250 mA POUT = 135 W f = 123 MHz
DocID11815 Rev 6
Typ.
135
VDD = 28 V IDQ = 250 mA POUT = 135 W f = 123 MHz
Load
Mismatch V = 28 V I = 250 mA P
DD
DQ
OUT = 135 W f = 123 MHz
All phase angles
4/17
Min.
dB
%
VSWR
25:1
SD2941-10
Electrical characteristics
Table 6. VGS sorts
Symbol
Value
Symbol
Value
Symbol
Value
AA
1.5 - 1.6
E
2.4 - 2.5
P
3.3 - 3.4
BB
1.6 - 1.7
F
2.5 - 2.6
Q
3.4 - 3.5
CC
1.7 - 1.8
G
2.6 - 2.7
R
3.5 - 3.6
DD
1.8 - 1.9
H
2.7 - 2.8
S
3.6 - 3.7
EE
1.9 - 2.0
J
2.8 - 2.9
T
3.7 - 3.8
A
2.0 - 2.1
K
2.9 - 3.0
U
3.8 - 3.9
B
2.1 - 2.2
L
3.0 - 3.1
V
3.9 - 4.0
C
2.2 - 2.3
M
3.1 - 3.2
D
2.3 - 2.4
N
3.2 - 3.3
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Impedance
3
SD2941-10
Impedance
Figure 2. Impedance data schematic
D
ZDL
Typical Input
Impedance
Typical Drain
Load Impedance
G
Zin
S
Table 7. Impedance data @ 28 V
f
ZIN (Ω)
ZDL (100W) (Ω)
ZDL (140W) (Ω)
123 MHz
1.2 - j 3.3
2.0 + j 1.4
2.0 + j 0.73
Table 8. Impedance data @ 50 V
6/17
f
ZIN (Ω)
ZDL (Ω)
30 MHz
1.7 - j 5.7
6.8 + j 0.9
175 MHz
1.2 - j 2.0
2.0 + j 2.4
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4
Typical performance
Typical performance
Figure 3. Capacitance vs drain voltage
Figure 4. Drain current vs gate voltage
10000
20
ID, DRAIN CURRENT (A)
C, CAPACITANCE (pF)
Tc=-20 °C
f =1MHz
1000
Ciss
Coss
100
Crss
10
0
10
20
30
40
Tc=+25 °C
15
10
Tc=+80 °C
VDS = 10 V
5
0
50
2
VDS, DRAIN-SOURCE VOLTAGE (V)
2.5
Figure 5. Maximum thermal resistance vs case
temperature
3.5
4
4.5
5
5.5
6
Figure 6. Safe operating area
0.6
100
0.56
0.52
Ids(A)
RTH(j-c) (°C/W)
3
VGS, GATE-SOURCE VOLTAGE (V)
10
(1)
0.48
0.44
25
35
45
55
65
Tc, CASE TEMPERATURE (°C)
75
85
1
1
10
100
1000
Vds(V)
(1) Current in this area may be limited by Rds(on)
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Typical performance
SD2941-10
Figure 7. Power gain vs output power
Figure 8. Efficiency vs output power
80
22
21
70
175 MHz
20
60
100 MHz
50
18
Nd (%)
Gain (dB)
19
17
16
100 MHz
40
30
15
175 MHz
20
14
10
Vdd = 50V
Idq = 250mA
13
12
Vdd = 50V
Idq = 250mA
0
0
25
50
75
100
125
150
175
200
225
250
275
0
25
50
75
100
Pout (W )
125
150
175
200
225
250
275
Pout (W )
Figure 9. Input return loss vs output power
Figure 10. Gain and efficiency vs output power
@ 28V and 100W load line
24
20
100
18
90
16
80
14
70
12
60
10
50
8
40
175 MHz
Gain (dB)
RTL (dB)
16
12
100 MHz
8
30
6
Gain
4
Vdd = 50V
Idq = 250mA
20
Freq = 123 MHz
Idq = 250mA
2
0
10
0
0
25
50
75
100
125
150
175
200
225
250
275
0
20
40
60
80
100
120
Output Power (W)
Pout (W )
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Efficiency
4
DocID11815 Rev 6
140
0
160
Efficiency (%)
20
SD2941-10
Typical performance
20
100
18
90
16
80
14
70
12
60
10
50
8
40
Efficiency (%)
Gain (dB)
Figure 11. Gain and efficiency vs output power
@ 28V and 140W load line
30
6
Gain
Efficiency
20
4
Freq = 123 MHz
Idq = 250mA
2
10
0
0
20
40
60
80
100
120
140
0
160
Output Power (W)
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Test circuit
5
SD2941-10
Test circuit
Figure 12. 30 MHz test circuit schematic (engineering test circuit)
Note:
All dimension are in inches.
Table 9. 30 MHz test circuit component part list
Symbol
T2
FB1
FB2, FB3
FB4
L1
PCB
R1, R3
10/17
Description
1:4 transformer, 25 Ω semi-rigid coax.141 OD 6” Long
Toroid X 2, 0.5” OD.312” ID 850µ 2 turns
VK200
Shield bead, 1” OD 0.5” ID 850µ 3 Turns
1/4 Wave Choke, 50W Semi-rigid coax.141 OD 12” Long
0.62” woven fiberglass, 1 oz. copper, 2 sides, εr = 2.55
470 Ω 1 W chip resistor
R2
360 Ω 1/2 W resistor
R4
20 KΩ 10 turn potentiometer
R5
560 Ω 1 W resistor
C1, C11
470 pF ATC chip cap
C2
43 pF ATC chip cap
C3, C8, C9
Arco 404, 12-65 pF
C4
Arco 423, 16-100 pF
C5
120 pF ATC chip cap
C6
0.01 μF ATC chip cap
C7
30 pF ATC chip cap
DocID11815 Rev 6
SD2941-10
Test circuit
Table 9. 30 MHz test circuit component part list (continued)
Symbol
C10
C12, C15
Description
91 pF ATC chip cap
1200 pF ATC chip cap
C13, C14,C16, C17 0.01 mF / 500 V chip cap
10 mF 63 V electrolytic capacitor
Figure 13. 175 MHz test circuit photomaster
4 inches
C18
6.4 inches
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Test circuit
SD2941-10
Figure 14. 175 MHz test circuit
12/17
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SD2941-10
6
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Figure 15. M174 package dimensions
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Package information
SD2941-10
Table 10. M174 (.500 DIA 4/L N/HERM W/FLG)
mm.
inch
DIM.
min.
A
5.56
B
max
min.
5.584
0.219
3.18
typ.
max
0.230
0.125
C
6.22
6.48
0.245
0.255
D
18.28
18.54
0.720
0.730
E
3.18
0.125
F
24.64
24.89
0.970
0.980
G
12.57
12.83
0.495
0.505
H
0.08
0.18
0.003
0.007
I
2.11
3.00
0.083
0.118
J
3.81
4.45
0.150
0.175
K
14/17
typ.
7.11
0.280
L
25.53
26.67
1.005
1.050
M
3.05
3.30
0.120
0.130
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SD2941-10
7
Marking, packing and shipping specifications
Marking, packing and shipping specifications
Table 11. Packing and shipping specifications
Order code
Packaging
Pcs per
tray
Dry pack
humidity
VGS code
Lot code
SD2941-10W
Plastic tray
25
< 10%
Not mixed
Not mixed
Figure 16. Marking layout
SD2941-10
Table 12. Marking specifications
Symbol
Description
W
Wafer process code
X
VGS sort
CZ
Assembly plant
xxx
Last 3 digit of diffusion lot
VY
Diffusion plant
MAR
Country of origin
CZ
Test and finishing plant
y
Assembly year
yy
Assembly week
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Revision history
8
SD2941-10
Revision history
Table 13. Document revision history
16/17
Date
Revision
Changes
15-Nov-2005
1
Initial release
06-Apr-2006
2
Complete version
13-Apr-2006
3
VDS(ON) updated
19-Oct-2011
4
Inserted Section 7: Marking, packing and shipping specifications.
Minor text changes in the title and description on the coverpage.
04-Aug-2014
5
Added performances at 28 V.
14-Aug-2015
6
Updated Table 2.: Absolute maximum rating.
Minor text changes.
DocID11815 Rev 6
SD2941-10
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