ST25DV16KC-IE6S3

ST25DV04KC ST25DV16KC ST25DV64KC Datasheet Dynamic NFC/RFID tag IC with 4-Kbit, 16-Kbit or 64-Kbit EEPROM, fast transfer mode capability and optimized I2C Features Includes ST state-of-the-art patented technology SO8 TSSOP8 I²C interface • • • • WLCSP10 Contactless interface • • • UFDFPN8 Two-wire I²C serial interface supports 1MHz protocol Single supply voltage: 1.8 V to 5.5 V Multiple byte write programming (up to 256 bytes) Configurable I²C slave address UFDFPN12 • • • • Based on ISO/IEC 15693 NFC Forum Type 5 tag certified by the NFC Forum Supports all ISO/IEC 15693 modulations, coding, subcarrier modes and data rates Custom fast read access up to 53 kbit/s Single and multiple blocks read (same for Extended commands) Single and multiple blocks write (up to four) (same for Extended commands) Internal tuning capacitance: 28.5 pF Memory Product status link ST25DV04KC ST25DV16KC • • • • ST25DV64KC • • Up to 64 Kbit of EEPROM (depending on version) I²C interface accesses bytes RF interface accesses blocks of 4 bytes Write time: – From I²C: typical 5 ms for 1 up to 16 bytes – From RF: typical 5 ms for one block Data retention: 40 years Write cycles endurance: – 1 million write cycles at 25 °C – 600k write cycles at 85 °C – 500k write cycles at 105 °C – 400k write cycles at 125 °C Fast transfer mode • • Fast data transfer between I²C and RF interfaces Half-duplex 256 bytes dedicated buffer Energy harvesting • Analog output pin to power external components Data protection • User memory: one to four configurable areas, protectable in read and/or write by three 64-bit passwords in RF and one 64‑bit password in I²C DS13519 - Rev 4 - July 2022 For further information contact your local STMicroelectronics sales office. www.st.com ST25DV04KC ST25DV16KC ST25DV64KC • System configuration: protected in write by a 64-bit password in RF and a 64-bit password in I²C GPO • • Interruption pin configurable on multiple RF events (field change, memory write, activity, fast transfer end, user set/reset/pulse), and I²C events (memory write completed, RF switch off) Open drain or CMOS output (depending on version) Low power mode (10-ball and 12-pin package only) • Input pin to trigger low power mode RF management • • RF command interpreter enabled/disabled from I²C host controller I²C priority: immediate RF switch off from I²C Temperature range • • Range 6: – From -40 °C to 85 °C Range 8: – From -40 °C to 85 °C (UDFPN8 and UFDFPN12 only) – From -40 °C to 125 °C (SO8N and TSSOP8 only, 105 °C max on RF interface) Package • • DS13519 - Rev 4 8-pin, 10-ball, and 12-pin packages ECOPACK2 (RoHS compliant) page 2/203 ST25DV04KC ST25DV16KC ST25DV64KC Description 1 Description The ST25DV04KC, ST25DV16KC and ST25DV64KC devices are NFC RFID tags offering respectively 4‑Kbit, 16‑Kbit, and 64‑Kbit of electrically erasable programmable memory (EEPROM). The ST25DV04KC, ST25DV16KC and ST25DV64KC offer two interfaces. The first one is an I2C serial link and can be operated from a DC power supply. The second one is an RF link activated when the ST25DV04KC, ST25DV16KC and ST25DV64KC act as a contactless memory powered by the received carrier electromagnetic wave. In I2C mode, the ST25DV04KC, ST25DV16KC and ST25DV64KC user memories contain up to 512 bytes, 2048 bytes and 8192 bytes, which could be split in 4 flexible and protectable areas. In RF mode, following ISO/IEC 15693 or NFC forum type 5 recommendations, the ST25DV04KC, ST25DV16KC and ST25DV64KC user memory contains respectively up to 128 blocks, 512 blocks and 2048 blocks of 4 bytes which could be split in 4 flexible and protectable areas. The ST25DV04KC, ST25DV16KC and ST25DV64KC offer a fast transfer mode between the RF and contact worlds, thanks to a 256 byte volatile buffer (also called Mailbox). In addition, the GPO pin of the ST25DV04KC, ST25DV16KC and ST25DV64KC provides data informing the contact world about incoming events, like RF field detection, RF activity in progress or mailbox message availability. An energy harvesting feature is also proposed when external conditions make it possible. Herein after all concerned devices (ST25DV04KC, ST25DV16KC and ST25DV64KC) are mentioned as ST25DVxxKC. 1.1 ST25DVxxKC block diagram Figure 1. ST25DVxxKC block diagram LPD1 ANALOG FRONT END V_EH AC0 AC1 DIGITAL UNIT CONTROL 1.8V VOLTAGE REGULATOR ENERGY HARVESTING CONTROL ENERGY HARVESTING RF INTERFACE 28.5pF tuning capacitance ISO/IEC 15693 PROTOCOL AND CONTROL VDCG1 FAST TRANSFER CONTROL 256 Bytes BUFFER MEMORY CONTROL I2C CONTROL Vcc Dynamic registers 1. DS13519 - Rev 4 Vss SDA EEPROM Up to 64Kbits User memory GPO System registers I2C INTERFACE SCL VDCG and LPD are included in the 10-ball and 12-pin package only. page 3/203 ST25DV04KC ST25DV16KC ST25DV64KC ST25DVxxKC packaging 1.2 ST25DVxxKC packaging ST25DVxxKC is provided in 8-pin, 10-ball, and 12-pin packages: • SO8N, TSSOP8, or UDFPN8 8-pin packages for the open drain version of interrupt output • 10 balls (WLCSP) and 12 pins (UFDFPN12) for the CMOS version of interrupt output. These packages include an additional element that minimizes the standby consumption Table 1. 8-pin packages signal names Signal name Function Direction V_EH Energy harvesting Power output GPO Interrupt output Output SDA Serial data I/O SCL Serial clock Input AC0, AC1 Antenna coils - VCC Supply voltage Power VSS Ground - Exposed pad Must be left floating EP (1) 1. Available only on UFDPN8 packages. Figure 2. ST25DVxxKC 8-pin SO8N package connections V_EH 1 8 VCC AC0 2 7 AC1 3 6 SCL VSS 4 5 SDA GPO (Open drain) SO8N Figure 3. ST25DVxxKC 8-pin TSSOP8 package connections V_EH 1 8 AC0 2 7 AC1 3 6 SCL VSS 4 5 SDA VCC GPO (Open drain) TSSOP8 DS13519 - Rev 4 page 4/203 ST25DV04KC ST25DV16KC ST25DV64KC ST25DVxxKC packaging Figure 4. ST25DVxxKC 8-pin UFDFN8 package connections V_EH 1 8 VCC AC0 2 7 GPO (Open drain) AC1 3 6 SCL VSS 4 5 SDA EP UFDFN8 Table 2. 10-pin packages signal names Signal name Function Direction V_EH Energy harvesting Power output GPO Interrupt output Output SDA Serial data I/O SCL Serial clock Input AC0, AC1 Antenna coils - VCC Supply voltage Power VSS Ground - LPD Low power down mode Input VDCG Supply voltage for GPO driver Power Figure 5. 10-ball WLCSP package connections 1 A VCC B C 3 SCL 2 AC0 1 VCC AC1 VDCG C D SCL VSS A B GPO LPD AC1 VSS 3 V_EH AC0 Marking side (top view) DS13519 - Rev 4 4 LPD VDCG SDA 4 V_EH GPO D E 2 SDA E Bump side (bottom view) page 5/203 ST25DV04KC ST25DV16KC ST25DV64KC ST25DVxxKC packaging Table 3. 12-pin packages signal names Signal name Function Direction V_EH Energy harvesting Power output GPO Interrupt output Output SDA Serial data I/O SCL Serial clock Input AC0, AC1 Antenna coils - VCC Supply voltage Power VSS Ground - LPD Low power down mode Input VDCG Supply voltage for GPO driver Power NC Not connected Must be left floating EP Exposed pad Must be left floating Figure 6. ST25DVxxKC 12-pin UFDFPN12 package connections LPD 1 12 VCC NC 2 11 GPO (CMOS) V_EH 3 10 VDCG AC0 4 9 NC AC1 5 8 SCL VSS 6 7 SDA EP UFDFPN12 DS13519 - Rev 4 page 6/203 ST25DV04KC ST25DV16KC ST25DV64KC Signal descriptions 2 Signal descriptions 2.1 Serial link (SCL, SDA) 2.1.1 Serial clock (SCL) This input signal is used to strobe all data in and out of the ST25DVxxKC. In applications where this signal is used by slave devices to synchronize the bus to a slower clock, the bus master must have an open drain output, and a pull-up resistor must be connected from serial clock (SCL) to VCC. See Section 9.2 I²C DC and AC parameters to know how to calculate the value of this pull-up resistor. 2.1.2 Serial data (SDA) This bidirectional signal is used to transfer data in or out of the ST25DVxxKC. It is an open drain output that may be wire-OR’ed with other open drain or open collector signals on the bus. A pull-up resistor must be connected from serial data (SDA) to VCC. (Figure 82. I2C Fast mode (fC = 1 MHz): maximum Rbus value versus bus parasitic capacitance (Cbus) indicates how the value of the pull-up resistor can be calculated). 2.2 2.2.1 Power control (VCC, LPD, VSS) Supply voltage (VCC) This pin can be connected to an external DC supply voltage. Note: An internal voltage regulator allows the external voltage applied on VCC to supply the ST25DVxxKC, while preventing the internal power supply (rectified RF waveforms) to output a DC voltage on the VCC pin. 2.2.2 Low power down (LPD) This input signal is used to control an internal 1.8 V regulator delivering the ST25DVxxKC internal supply. When LPD is high, this regulator is shut off and its consumption is reduced below 1 µA. This regulator has a turn on time in the range of 100 µs to be added to the boot duration, before the device becomes fully operational. The impedance on LDP pin when set high should not exceed 5 kΩ. The LPD pin is internally pulled down. This feature is only available on the 10-ball and 12-pin ST25DVxxKC packages. 2.2.3 Ground (VSS) VSS is the reference for the VCC and VDCG supply voltages and V_EH analogic output voltage. DS13519 - Rev 4 page 7/203 ST25DV04KC ST25DV16KC ST25DV64KC RF link (AC0 AC1) 2.3 2.3.1 RF link (AC0 AC1) Antenna coil (AC0, AC1) These inputs are used to connect the ST25DVxxKC device to an external coil exclusively. It is advised not to connect any other DC or AC path to AC0 or AC1. When correctly tuned, the coil is used to power and access the device using the ISO/IEC 15693 and ISO 18000-3 mode 1 protocols. 2.4 Process control (GPO, VDCG) 2.4.1 Driver supply voltage (VDCG) This pin, available only with 10-ball and 12-pin ST25DVxxKC packages, can be connected to an external DC supply voltage. It only supplies the GPO (CMOS) driver block. ST25DVxxKC cannot be powered by VDCG. If VDCG is left floating, there is not any information available on the GPO (CMOS) pin. 2.4.2 General purpose output (GPO) The ST25DVxxKC features a configurable output GPO pin used to provide RF and I²C activity information to an external device. Depending on the ST25DVxxKC package version, there are two types of GPO output: • 8-pin ST25DVxxKC packages offer an open drain GPO output. This GPO pin must be connected to an external pull‑up resistor (> 4.7 kΩ) to operate. • 10-ball and 12-pin ST25DVxxKC packages offer a CMOS GPO output, which requires to connect VDCG pin to an external power supply. The interrupt consists of setting the state to a high level, or outputting a positive pulse on the GPO pin. GPO pin is a configurable output signal, and can mix several interruption modes. By default, the GPO register sets the interruption mode as an RF field change detector. It is able to raise various events like RF activity, Memory write completion, or fast transfer actions. It can authorize the RF side to directly drive the GPO pin using the Manage GPO command, to set the output state, or emit a single pulse (for example, to wake up an application.). See Section 5.4 GPO for details. 2.5 Energy harvesting analog output (V_EH) This analog output pin is used to deliver the analog voltage V_EH available when the Energy harvesting mode is enabled and if the RF field strength is sufficient. When the Energy harvesting mode is disabled or the RF field strength is not sufficient, V_EH pin is in High-Z state (See Section 5.5 Energy harvesting (EH) for details). Energy harvesting voltage output is not regulated. DS13519 - Rev 4 page 8/203 ST25DV04KC ST25DV16KC ST25DV64KC Power management 3 Power management 3.1 Wired interface Operating supply voltage VCC In contact mode, prior to selecting the memory and issuing instructions to it, a valid and stable VCC voltage within the specified [VCC(min), VCC(max)] range must be applied (see Table 246. I²C operating conditions). To maintain a stable DC supply voltage, it is recommended to decouple the VCC line with a suitable capacitor (usually of the order of 10 nF and 100 nF) close to the VCC/VSS package pins. This voltage must remain stable and valid until the end of the transmission of the instruction and, for a Write instruction, until the completion of the internal I²C write cycle (tW). Instructions are not taken into account until completion of ST25DVxxKC's boot sequence (see the figure below). Figure 7. ST25DVxxKC power-up sequence (No RF field, LPD pin tied to VSS or package without LPD pin) I2C interface ready VCC Pin Power-up by VCC (No VCC) Vint_supply None Access allowed RF or I2C I2C Start I2C Stop RF access not allowed * When RF Field is present before VCC set up, tboot is performed after RF field rising. tboot* * If the LPD pin follows VCC before going low , tboot starts only when LPD reaches the low level. MS68573 Power-up conditions When the power supply is turned on, VCC rises from VSS to VCC. The VCC rise time must not vary faster than 1 V/µs. Device reset in I2C mode In order to prevent inadvertent write operations during power-up, a power-on reset (POR) circuit is included. At power-up (continuous rise of VCC), the ST25DVxxKC does not respond to any I2C instruction until VCC has reached the power-on reset threshold voltage (this threshold is lower than the minimum VCC operating voltage defined in Table 246. I²C operating conditions). When VCC passes over the POR threshold, the device is reset and enters the Standby power mode. However, the device must not be accessed until VCC has reached a valid and stable VCC voltage within the specified [VCC(min), VCC(max)] range and tboot time necessary to ST25DVxxKC set-up has passed. In the version supporting LPD pin, the tboot takes place only when LPD goes low. In a similar way, during power-down (continuous decrease in VCC), as soon as VCC drops below the power-on reset threshold voltage, the device stops responding to any instruction sent to it, and I2C address counter is reset. Power-down mode During power-down (continuous decay of VCC), the device must be in Standby power mode (mode reached after decoding a Stop condition, assuming that there is no internal write cycle in progress). DS13519 - Rev 4 page 9/203 ST25DV04KC ST25DV16KC ST25DV64KC Contactless interface 3.2 Contactless interface Device set in RF mode To ensure a proper boot of the RF circuitry, the RF field must be turned ON without any modulation for a minimum period of time tRF_ON. Before this time, ST25DVxxKC ignores all received RF commands. (See Figure 8. ST25DVxxKC RF power-up sequence (No DC supply)). Device reset in RF mode To ensure a proper reset of the RF circuitry, the RF field must be turned off (100% modulation) for a minimum tRF_OFF period of time. The RF access can be temporarily or indefinitely disabled by setting the appropriate value in the RF disable register. Figure 8. ST25DVxxKC RF power-up sequence (No DC supply) RF interface ready RFfield None access allowed RF or I2C RF REQUEST RF ANSWER tboot Power-up by RF (No VCC; Pull-up on GPO) Vint_supply tminCD GPO = RF_ACTIVITY REQ EOF GPO open drain version ANS EOF IT duration GPO = FIELD CHANGE GPO = FIELD CHANGE AND RF_ACTIVITY No answer to RF request if any DS13519 - Rev 4 page 10/203 ST25DV04KC ST25DV16KC ST25DV64KC Memory management 4 Memory management 4.1 Memory organization overview The ST25DVxxKC memory is divided in four main memory areas: • User memory • Dynamic registers • Fast transfer mode buffer • System configuration area The ST25DVxxKC user memory can be divided into 4 flexible user areas. Each area can be individually read and/or - write-protected with one out of three specific 64-bit password. The ST25DVxxKC dynamic registers are accessible by RF or I2C host and provide dynamic activity status or allow temporary activation or deactivation of some ST25DVxxKC features. The ST25DVxxKC also provides a 256-byte fast transfer mode buffer, acting as a mailbox between RF and I2C interface, allowing fast data transfer between contact and contactless worlds. Finally, the ST25DVxxKC system configuration area contains static registers to configure all ST25DVxxKC features, which can be tuned by the user. Its access is protected by a 64-bit configuration password. This system configuration area also includes read only device information such as IC reference, memory size or IC revision, as well as a 64-bit block that is used to store the 64-bit unique identifier (UID), and the AFI (default 00h) and DSFID (default 00h) registers. The UID is compliant with the ISO 15693 description, and its value is used during the anticollision sequence (Inventory). The UID value is written by ST on the production line. The AFI register stores the application family identifier. The DSFID register stores the data storage family identifier used in the anticollision algorithm. The system configuration area includes five additional 64-bit blocks that store an I2C password plus three RF user area access passwords and an RF configuration password. DS13519 - Rev 4 page 11/203 ST25DV04KC ST25DV16KC ST25DV64KC User memory Figure 9. Memory organization CC File Area 1 Always readable User memory (EEPROM up to 64-Kbits) Password protected Area 2 Area 3 Area 4 Dynamic configuration and activity status Dynamic registers Fast Transfer Mode mailbox Fast Transfer Mode 256 Bytes buffer System configuration (EEPROM) Password protected 4.2 Static configuration registers Device information UID, AFI, DSFID Passwords User memory User memory is accessible from both RF contactless interface and I2C wired interface. From RF interface, user memory is addressed as Blocks of 4 bytes, starting at address 0. RF extended read and write commands can be used to address all ST25DVxxKC memory blocks. Other read and write commands can only address up to block FFh. From I2C interface, user memory is addressed as Bytes, starting at address 0. Device select must set E2 = 0. User memory can be read in continuity. Unlike the RF interface, there is no roll-over when the requested address reaches the end of the memory capacity. Table 4. User memory as seen by RF and by I2C shows how memory is seen from RF interface and from I2C interface. DS13519 - Rev 4 page 12/203 ST25DV04KC ST25DV16KC ST25DV64KC User memory Table 4. User memory as seen by RF and by I2C RF command I2C command User memory (block addressing) (byte addressing) RF block (00)00h I2C byte 0003h Fast Read Single Block I2C byte 0007h Fast Read Multiple Blocks Write Single Block Write Multiple Blocks Ext Read Single Block byte 0002h I2C byte I2C byte 0001h 0000h RF block (00)01h Read Single Block Read Multiple Blocks I2C I2C byte 0006h I2C byte I2C byte 0005h 0004h RF block (00)02h I2C byte 000Bh I2C byte 000Ah I2C byte I2C byte 0009h 0008h .... Ext Read Multiple Blocks RF block (00)7Fh (1) Fast Ext Read Single Block Fast Ext Read Multi. Blocks I2C byte I2C byte I2C byte I2C byte Ext Write Single Block 01FFh 01FEh 01FDh 01FCh .... Ext Write Multiple Blocks I2C Read command I2C Write command RF block (00)FFh (2) I2C byte I2C byte I2C byte I2C byte 03FFh 03FEh 03FDh 03FCh Device select E2 = 0 RF block 0100h I2C byte 0403h I2C byte 0402h Ext Read Single Block Fast Ext Read Multi. Blocks Ext Write Single Block I2C byte 0401h 0400h .... Ext Read Multiple Blocks Fast Ext Read Single Block I2C byte RF block 01FFh (3) I2C byte I2C byte I2C byte I2C byte 07FFh 07FEh 07FDh 07FCh .... Ext Write Multiple Blocks RF block 07FFh (4) I2C byte I2C byte I2C byte I2C byte 1FFFh 1FFEh 1FFDh 1FFCh 1. Last block of user memory in ST25DV04KC. 2. Last block accessible with Read Single Block, Read Multiple Blocks, Fast Read Single Block, Fast Read Multiple Blocks, Write Single Block and Write Multiple Blocks RF commands. 3. Last block of user memory in ST25DV04KC. 4. Last block of user memory in ST25DV64KC. Note: DS13519 - Rev 4 In the factory all blocks of user memory are initialized to 00h. page 13/203 ST25DV04KC ST25DV16KC ST25DV64KC User memory 4.2.1 User memory areas The user memory can be split into different areas, each one with a distinct access privilege. RF and I2C write commands are legal only within a same area: • In RF, Write Multiple Blocks and Extended Write Multiple Blocks command are not executed and return the error 0Fh if addresses cross an area border. • In I2C, a sequential write is not executed and all bytes with addresses crossing the area border are not acknowledged if addresses cross an area border. RF and I2C read commands are allowed over multiple areas: • In RF, Read Multiple Blocks and Extended read multiple Blocks (and related Fast commands) are executed and return all readable blocks until reaching a non readable block (address read protected or non available), even if addresses cross area borders. • In I2C, sequential read returns all readable bytes until reaching a non readable byte (address read protected or non available) even if addresses cross area borders. Non readable bytes return value FFh. Each user memory area is defined by its ending address ENDAi. The starting address is implicitly defined by the end of the preceding area. There are three ENDAi registers in the configuration system memory, used to define the end addresses of Area 1, Area 2 and Area 3. The end of Area 4 is always the last block/byte of memory and is not configurable. Figure 10. ST25DVxxKC user memory areas ST25DV user memory Areas limit registers Block/Byte 0000h Area1 (8 Blocks/32 Bytes minimum) ENDA1 Area2 ENDA2 Area3 ENDA3 Area4 Last Block/Byte of user memory On factory delivery all ENDAi are set to maximum value, only Area1 exists and includes the full user memory. A granularity of 8 blocks (32 bytes) is offered to code area ending points. An area’s end limit is coded as followed in ENDAi registers: DS13519 - Rev 4 • Last RF block address of area = 8 x ENDAi + 7 => ENDAi = int(Last Areai RF block address / 8) • Last I2C byte address of area = 32 * ENDAi + 31 => ENDAi = int(Last Areai I2C byte address / 32) • As a consequence, ENDA1 = 0 minimum size of Area 1 is 8 blocks (32 bytes). page 14/203 ST25DV04KC ST25DV16KC ST25DV64KC User memory Table 5. Maximum user memory block and byte addresses and ENDAi value Device Last user memory block address seen by RF Last user memory byte address seen by I2C Maximum ENDAi value ST25DV04KC 007Fh 01FFh 0Fh ST25DV16KC 01FFh 07FFh 3Fh ST25DV64KC 07FFh 1FFFh FFh Table 6. Areas and limit calculation from ENDAi registers Area Area 1 Area 2 Area 3 Area 4 Seen from RF interface Seen from I2C interface Block 0000h Byte 0000h … … Block (ENDA1*8)+7 Byte (ENDA1*32)+31 Block (ENDA1+1)*8 Byte (ENDA1+1)*32 … … Block (ENDA2*8)+7 Byte (ENDA2*32)+31 Block (ENDA2+1)*8 Byte (ENDA2+1)*32 … … Block (ENDA3*8)+7 Byte (ENDA3*32)+31 Block (ENDA3+1)*8 Byte (ENDA3+1)*32 … … Last memory Block Last memory Byte Organization of user memory in areas have the following characteristics: • At least one area exists (Area1), starting at Block/Byte address 0000h and finishing at ENDA1, with ENDA1 = ENDA2 = ENDA3 = End of user memory (factory setting). • Two Areas could be defined by setting ENDA1 < ENDA2 = ENDA3 = End of user memory. • Three Areas may be defined by setting ENDA1 < ENDA2 < ENDA3 = End of user memory. • A maximum of four areas may be defined by setting ENDA1 < ENDA2 < ENDA3 < End of user memory. • Area 1 specificities – Start of Area1 is always Block/Byte address 0000h. – Area1 minimum size is 8 blocks (32 bytes) when ENDA1 = 00h. – Area1 is always readable. • The last area always finishes on the last user memory Block/Byte address (ENDA4 doesn't exist). • All areas are contiguous: end of Area(n) + one Block/Byte address is always start of Area(n+1). Area size programming RF user must first open the RF configuration security session to write ENDAi registers. I2C host must first open I2C security session to write ENDAi registers. When programming an ENDAi register, the following rule must be respected: • ENDAi-1 < ENDAi ≤ ENDAi+1 = End of memory. This means that prior to programming any ENDAi register, its successor (ENDAi+1) must first be programmed to the last Block/Byte of memory: • Successful ENDA3 programming condition: ENDA2 < ENDA3 ≤ End of user memory • Successful ENDA2 programming condition: ENDA1 < ENDA2 ≤ ENDA3 = End of user memory • Successful ENDA1 programming condition: ENDA1 ≤ ENDA2 = ENDA 3 = End of user memory DS13519 - Rev 4 page 15/203 ST25DV04KC ST25DV16KC ST25DV64KC User memory If this rule is not respected, an error 0Fh is returned in RF, NoAck is returned in I2C, and programming is not done. In order to respect this rule, the following procedure is recommended when programming Areas size (even for changing only one Area size): 1. Ends of Areas 3 and 2 must first be set to the end of memory while respecting the following order: a. If ENDA3 ≠ end of user memory, then set ENDA3 = end of memory; else, do not write ENDA3. b. If ENDA2 ≠ end of user memory, then set ENDA2 = end of memory; else, do not write ENDA2. 2. Then, desired area limits can be set respecting the following order: a. Set new ENDA1 value. b. Set new ENDA2 value, with ENDA2 > ENDA1 c. Set new ENDA3 value, with ENDA3 > ENDA2 Example of successive user memory area setting (for a ST25DV64KC): 1. Initial state, 2 Areas are defined: a. ENDA1 = 10h (Last block of Area 1: (10h x 8) + 7 = 0087h) b. ENDA2 = FFh (Last block of Area 2: (FFh x 8) + 7 = 07FFh) c. ENDA3 = FFh (No Area 3) ◦ Area 1 from Block 0000h to 0087h (136 Blocks) ◦ Area 2 from Block 0088h to 07FFh (1912 Blocks) ◦ There is no Area 3 ◦ There is no Area 4 2. Split of user memory in four areas: a. ENDA3 is not updated as it is already set to end of memory b. ENDA2 is not updated as it is already set to end of memory c. Set ENDA1 = 3Fh (Last block of Area 1: (3Fh x 8) + 7 = 01FFh) d. Set ENDA2 = 5Fh (Last block of Area 1: (5Fh x 8) + 7 = 02FFh) e. Set ENDA3 = BFh (Last block of Area 1: (BFh x 8) + 7 = 05FFh) ◦ Area1 from Block 0000h to 01FFh (512 Blocks) ◦ Area2 from Block 0200h to 02FFh (256 Blocks) ◦ Area3 from Block 0300h to 05FFh (768 Blocks) ◦ Area4 from Block 0600h to 07FFh (512 Blocks). 3. Return to a split in two equal areas: a. Set ENDA3 = FFh b. Set ENDA2 = FFh c. Set ENDA1 = 7Fh (Last block of Area 1: (7Fh x 8) + 7 = 03FFh) ◦ Area1 from Block 0000h to 03FFh (1024 Blocks) ◦ Area2 from Block 0400h to 07FFh (1024 Blocks) ◦ There is no Area3 ◦ There is no Area 4 Programming ENDA3 to FFh in step 2.a would have resulted in into an error, since rule ENDAi-1 < ENDAi would not been respected (ENDA2 = ENDA3 in that case). DS13519 - Rev 4 page 16/203 ST25DV04KC ST25DV16KC ST25DV64KC User memory Registers for user memory area configuration Table 7. ENDA1 access I2C RF Command Type Read Configuration (cmd code A0h) @05h Write Configuration (cmd code A1h) @05h Address R always, W if RF configuration security E2=1, E1=1, session is open and configuration not locked 0005h Type R always, W if I2C security session is open Table 8. ENDA1 Bit Name b7-b0 ENDA1 Note: Function Factory Value ST25DV04KC: 0Fh End Area 1 = 8*ENDA1+7 when expressed in blocks (RF) End Area 1 = 32*ENDA1+31 when expressed in bytes (I2C) ST25DV16KC: 3Fh ST25DV64KC: FFh Refer to Table 13. System configuration memory map for ENDA1 register. Table 9. ENDA2 access I2C RF Command Type Read Configuration (cmd code A0h) @07h Write Configuration (cmd code A1h) @07h Address R always, W if RF configuration security E2=1, E1=1, session is open and configuration not locked 0007h Type R always, W if I2C security session is open Table 10. ENDA2 Bit b7-b0 Note: Name ENDA2 Function Factory Value End Area 2 = 8 x ENDA2 + 7 when expressed in blocks (RF) End Area 2 = 32*ENDA2 + 31 when expressed in bytes (I2C) ST25DV04KC: 0Fh ST25DV16KC: 3Fh ST25DV64KC: FFh Refer to Table 13. System configuration memory map for ENDA2 register. Table 11. ENDA3 access I2C RF Command Read Configuration (cmd code A0h) @09h Write Configuration (cmd code A1h) @09h DS13519 - Rev 4 Type Address R always, W if RF configuration security E2=1, E1=1, session is open and configuration not locked 0009h Type R always, W if I2C security session is open page 17/203 ST25DV04KC ST25DV16KC ST25DV64KC System configuration area Table 12. ENDA3 Bit Name Function b7-b0 ENDA3 Factory Value ST25DV04KC: 0Fh End Area 3 = 8 x ENDA3 + 7 when expressed in blocks (RF) ST25DV16KC: 3Fh End Area 3 = 32 x ENDA3 + 31 when expressed in bytes (I2C) Note: Refer to Table 13. System configuration memory map for ENDA3 register. 4.3 System configuration area ST25DV64KC: FFh In addition to EEPROM user memory, ST25DVxxKC includes a set of static registers located in the system configuration area memory (EEPROM nonvolatile registers). Those registers are set during device configuration (that is: area extension), or by the application (that is: area protection). Static registers content is read during the boot sequence and define basic ST25DVxxKC behaviour. In RF, the static registers located in the system configuration area can be accessed via dedicated Read Configuration and Write Configuration commands, with a pointer acting as the register address. The RF configuration security session must first be open, by presenting a valid RF configuration password, to grant write access to system configuration registers. The system configuration area write access by RF can also be deactivated by I2C host. In I2C static registers located in the system configuration area can be accessed with I2C read and write commands with device select E2=1, E1=1. Readable system areas could be read in continuity. I2C security session must first be open, by presenting a valid I2C password, to grant write access to system configuration registers. The following table shows the complete map of the system configuration area, as seen by RF and I2C interface. Table 13. System configuration memory map RF access Address I2C access Static Register Type Name Device select Address Type Enable/disable GPO output and GPO ITs for RF events E2=1, E1=1 0000h RW (2) Enable/disable GPO ITs for I2C events and set Interruption pulse duration E2=1, E1=1 0001h RW(2) EH_MODE Energy Harvesting default strategy after Power ON E2=1, E1=1 0002h RW(2) RW(1) RF_MNGT RF interface state after Power ON E2=1, E1=1 0003h RW(2) 04h RW(1) RFA1SS Area1 RF access protection E2=1, E1=1 0004h RW(2) 05h RW(1) ENDA1 Area 1 ending point E2=1, E1=1 0005h RW(2) 06h RW(1) RFA2SS Area2 RF access protection E2=1, E1=1 0006h RW(2) 07h RW(1) ENDA2 Area 2 ending point E2=1, E1=1 0007h RW(2) 08h RW(1) RFA3SS Area3 RF access protection E2=1, E1=1 0008h RW(2) 09h RW(1) ENDA3 Area 3 ending point E2=1, E1=1 0009h RW(2) 0Ah RW(1) RFA4SS Area4 RF access protection E2=1, E1=1 000Ah RW(2) Area 1 to 4 I2C access protection E2=1, E1=1 000Bh RW(2) E2=1, E1=1 000Ch RW(2) 00h RW (1) GPO1 01h RW(1) GPO2 02h RW(1) 03h No access N/A 0Dh I2CSS Function RW (3) (4) LOCK_CCFILE Blocks 0 and 1 RF Write protection RW(1) No access DS13519 - Rev 4 FTM Fast transfer mode authorization and watchdog setting. E2=1, E1=1 000Dh RW(2) I2C_CFG I2C slave address configuration and enable/disable RF switch off from I2C. E2=1, E1=1 000Eh RW(2) page 18/203 ST25DV04KC ST25DV16KC ST25DV64KC System configuration area RF access I2C access Static Register Address Type Name 0Fh RW(1) LOCK_CFG N/A WO (5) LOCK_DSFID NA WO (6) LOCK_AFI N/A RW(5) DSFID N/A RW(6) AFI Device select Address Type Protect RF Write to system configuration registers E2=1, E1=1 000Fh RW(2) DSFID lock status E2=1, E1=1 0010h RO AFI lock status E2=1, E1=1 0011h RO DSFID value E2=1, E1=1 0012h RO AFI value E2=1, E1=1 0013h RO RO MEM_SIZE Memory size value in blocks, 2 bytes E2=1, E1=1 0014h to 0015h RO RO BLK_SIZE Block size value in bytes E2=1, E1=1 0016h RO N/A RO IC_REF IC reference value E2=1, E1=1 0017h RO NA RO UID Unique identifier, 8 bytes E2=1, E1=1 0018h to 001Fh RO IC revision E2=1, E1=1 0020h RO - ST Reserved E2=1, E1=1 0021h RO - ST Reserved E2=1, E1=1 0022h RO - ST Reserved E2=1, E1=1 0023h RO I2C security session password, 8 bytes E2=1, E1=1 N/A IC_REV No access I2C_PWD Function N/A WO (9) RF_PWD_0 RF configuration security session password, 8 bytes N/A WO(9) RF_PWD_1 RF user security session password 1, 8 bytes N/A WO(9) RF_PWD_2 RF user security session password 2, 8 bytes N/A WO(9) RF_PWD_3 RF user security session password 3, 8 bytes 0900h to 0907h R/W (7) (8) No access 1. Write access is granted if RF configuration security session is open and configuration is not locked (LOCK_CFG register equals to 0). 2. Write access if I2C security session is open. 3. Write access to bit 0 if Block 00h is not already locked and to bit 1 if Block 01h is not already locked. 4. LOCK_CCFILE content is only readable through reading the Block Security Status of blocks 00h and 001h (see Section 5.6.3 User memory protection) 5. Write access if DSFID is not locked 6. Write access if AFI is not locked. 7. Write access with I2C Write Password command, only after presenting a correct I2C password. 8. Read access is granted if I2C security session is open. 9. Write access only if corresponding RF security session is open. DS13519 - Rev 4 page 19/203 ST25DV04KC ST25DV16KC ST25DV64KC Dynamic configuration 4.4 Dynamic configuration ST25DVxxKC has a set of dynamic registers that allow temporary modification of its behavior or report on its activity. Dynamic registers are volatile and not restored to their previous values after POR. Some static registers have an image in dynamic registers: dynamic register value is initialized with the static register value and may be updated by the application to modify the device behavior temporarily (i.e.: set reset of Energy Harvesting). When a valid change occurs in a static register, in RF or I2C, the corresponding dynamic register is automatically updated. Other, dynamic registers, automatically updated, contain indication on ST25DVxxKC activity. (for instance: IT_STS_Dyn gives the interruption’s status or MB_CTRL_Dyn gives the fast transfer mode mailbox control). In RF, dynamic registers can be accessed via dedicated (Fast) Read Dynamic Configuration and (Fast) Write Dynamic Configuration commands, with a pointer acting as the register address. No password is needed to access dynamic registers. In I2C, dynamic registers can be accessed with I2C read and write commands with device select E2=0, E1=1. Dynamic registers can be read in continuity. Dynamic registers and fast transfer mode mailbox can be read in continuity, but not written in continuity. No password is needed to access dynamic registers. The table below shows the complete map of dynamic registers, as seen by RF interface and by I2C interface. Table 14. Dynamic registers memory map RF access Address Type Name 00h RO GPO_CTRL_Dyn GPO control - No access 02h R/W No access I2C access Dynamic Registers Device Address Type E2=0, E1=1 2000h R/W ST Reserved E2=0, E1=1 2001h RO EH_CTRL_Dyn Energy Harvesting management & usage status E2=0, E1=1 2002h R/W RF_MNGT_Dyn RF interface usage management E2=0, E1=1 2003h R/W I2C security session status E2=0, E1=1 2004h RO Interruptions Status E2=0, E1=1 2005h RO I2C_SSO_Dyn IT_STS_Dyn Function select 0Dh R/W MB_CTRL_Dyn Fast transfer mode control and status E2=0, E1=1 2006h R/W NA RO MB_LEN_Dyn Length of fast transfer mode message E2=0, E1=1 2007h RO DS13519 - Rev 4 page 20/203 ST25DV04KC ST25DV16KC ST25DV64KC Fast transfer mode mailbox 4.5 Fast transfer mode mailbox ST25DVxxKC fast transfer mode uses a dedicated mailbox buffer for transferring messages between RF and I2C worlds. This mailbox contains up to 256 Bytes of data which are filled from the first byte. Fast transfer mode mailbox is accessed in bytes from both RF and I2C. In RF, mailbox is read via a dedicated (Fast) Read Message command. Read can start from any address value inside the mailbox, between 00h and FFh. Writing in the mailbox is done via the (Fast) Write Message command in one shot, always starting at mailbox address 00h. No password is needed to access mailbox from RF, but fast transfer mode must be enabled. In I2C, mailbox read can start from any address value between 2008h and 2107h. Write mailbox MUST start from address 2008h to a max of 2107h. No password is needed to access mailbox from I2C, but fast transfer mode must be enabled. The table below shows the map of fast transfer mode mailbox, as seen by RF interface and by I2C interface. Table 15. Fast transfer mode mailbox memory map RF access Address Type Name 00h R/W MB_Dyn Byte 0 01h R/W MB_Dyn Byte 1 … … … FEh R/W FFh R/W DS13519 - Rev 4 I2C access Fast transfer mode buffer Function Device Address Type E2=0, E1=1 2008h R/W E2=0, E1=1 2009h R/W E2=0, E1=1 ... ... MB_Dyn Byte 254 E2=0, E1=1 2106h R/W MB_Dyn Byte 255 E2=0, E1=1 2107h R/W Fast transfer mode buffer (256-Bytes) select page 21/203 ST25DV04KC ST25DV16KC ST25DV64KC ST25DVxxKC specific features 5 ST25DVxxKC specific features ST25DVxxKC offers the following features: • A fast transfer mode (FTM), to achieve a fast link between RF and contact worlds, via a 256 byte buffer called Mailbox. This mailbox dynamic buffer of 256 byte can be filled or emptied via either RF or I2C. • A GPO pin, which indicates incoming events to the contact side, like RF events (RF field changes, Rf activity, Rf writing completion or mailbox message availability) or I2C events (I2C write completion, RF switch off from I2C). • An Energy Harvesting element to deliver µW of power when external conditions make it possible. • RF management, which allows ST25DVxxKC to ignore RF requests. All these features can be programmed by setting static and/or dynamic registers of the ST25DVxxKC. ST25DVxxKC can be partially customized using configuration registers located in the system area. These registers are: • dedicated to Data Memory organization and protection ENDAi, I2CSS, RFAiSS, LOCK_CCFILE. • • • • dedicated to fast transfer mode FTM dedicated to observation, GPO, IT_TIME dedicated to RF , RF_MNGT, EH_MODE dedicated the device’s structure LOCK_CFG • dedicated to I2C configuration, I2C_CFG A set of additional registers allows to identify and customize the product (DSFID, AFI, IC_REF, etc.). In I2C Read accesses to the static configuration register is always allowed, except for passwords. For dedicated registers, write access is granted after prior successful presentation of the I2C password. Configuration register are located from address 0000h to 00FFh in the system area. In RF Dedicated commands Read Configuration and Write Configuration must be used to access the static configuration registers. Update is only possible when the access right was granted by presenting the RF configuration password (RF_PWD_0), and if the system configuration was not previously locked by the I2C host (LOCK_CFG=1), which acts as security master. After any valid write access to the static configuration registers, the new configuration is immediately applied. Some of the static registers have a dynamic image (notice _Dyn) preset with the static register value: GPO_CTRL_Dyn, EH_CTRL_Dyn, RF_MNGT_Dyn and MB_CTRL_Dyn. When it exists, ST25DVxxKC uses the dynamic configuration register to manage its processes. A dynamic configuration register updated by the application recovers its default static value after a Power On Reset (POR). Other dynamic registers are dedicated to process monitoring: • I2C_SSO_Dyn is dedicated to data memory protection • MB_LEN_Dyn, MB_CTRL_Dyn are dedicated to fast transfer mode • IT_STS_Dyn is dedicated to interrupt In I2C, read and write of the Dynamic registers is done using usual I2C read & write command at dedicated address (E2=0 and E1=1 in device select). In RF read or write accesses to the Dynamic registers are associated to the dedicated commands, Read Dynamic Configuration, Write Dynamic Configuration and Read Message Length. DS13519 - Rev 4 page 22/203 ST25DV04KC ST25DV16KC ST25DV64KC Fast transfer mode (FTM) 5.1 Fast transfer mode (FTM) 5.1.1 Fast transfer mode registers Static Registers Table 16. FTM access I2C RF Command Type R always, W if RF configuration security session is open and configuration not locked Read Configuration (cmd code A0h) @0Dh Write Configuration (cmd code A1h) @0Dh Address Type E2=1, E1=1, 000Dh R always, W if I2C security session is open Table 17. FTM Bit Name b0 MB_MODE b3-b1 MB_WDG Function Factory value 0: Enabling fast transfer mode is forbidden. 0b 1: Enabling fast transfer mode is authorized. Watchdog duration =2MB_WDG − 1 × 30ms ± 6 000b If MD_WDG = 0, then watchdog duration is infinite b7-b4 Note: RFU - 0000b Refer to Table 13. System configuration memory map for the FTM register. Dynamic Registers Table 18. MB_CTRL_Dyn access I2C RF Command Type Address Type Read Dynamic Configuration (cmd code ADh) @0Dh Fast Read Dynamic Configuration (cmd code CDh) @0Dh b0: R always, W always Write Dynamic Configuration (cmd code AEh) @0Dh b7-b1: RO E2=0, E1=1, 2006h b0: R always, W always b7-b1: RO Fast Write Dynamic Configuration (cmd code CEh) @0Dh DS13519 - Rev 4 page 23/203 ST25DV04KC ST25DV16KC ST25DV64KC Fast transfer mode (FTM) Table 19. MB_CTRL_Dyn Bit Name Function b0 MB_EN (1) b1 HOST_PUT_MSG b2 RF_PUT_MSG b3 RFU b4 HOST_MISS_MSG b5 RF_MISS_MSG b6 HOST_CURRENT_MSG b7 RF_CURRENT_MSG Factory value 0: Disable FTM, FTM mailbox is empty 0b 1: Enable FTM 0: No I2C message in FTM mailbox 0b 1: I2C has Put a message in FTM mailbox 0: No RF message in FTM mailbox 0b 1: RF has Put message in FTM mailbox - 0b 0: No message missed by I2C 0b 1: I2C did not read RF message before watchdog time out 0: No message missed by RF 0b 1: RF did not read message before watchdog time out 0: No message or message not coming from I2C 0b 1: Current Message in FTM mailbox comes from I2C 0: No message or message not coming from RF 0b 1: Current Message in FTM mailbox comes from RF 1. MB_EN bit is automatically reset to 0 if MB_MODE bit in FTM register is reset to 0. Note: Refer to Table 14. Dynamic registers memory map for the MB_CTRL_Dyn register. Table 20. MB_LEN_Dyn access I2C RF Command Read Message Length (cmd code ABh) Fast Read Message Length (cmd code CBh) Type Address RO Type E2=0, E1=1, 2007h RO Table 21. MB_LEN_Dyn Bit Name b7-b0 MB_LEN Function Size in byte, minus 1 byte, of message contained in FTM mailbox (automatically set by ST25DVxxKC) Note: Refer to Table 14. Dynamic registers memory map for the MB_LEN_Dyn register. 5.1.2 Fast transfer mode usage Factory value 0h ST25DVxxKC acts as mailbox between RF (reader, smartphone, ...) and an I2C host (microcontroller...). Each interface can send a message containing up to 256 bytes of data to the other interface through that mailbox. To send data from RF reader to I2C host, fast transfer mode must be enabled, the mailbox must be free, VCC power must be present, and the RF user must first writes the message containing data in the mailbox. I2C host is then informed (by interruption on GPO output or polling on MB_CTRL_Dyn register) that a message from RF is present in the mailbox. Once the complete message has been read by I2C, mailbox is considered free again and is available for receiving a new message (data is not cleared). The RF user is informed that the message has been read by the I2C host by polling on MB_CTRL_Dyn register. DS13519 - Rev 4 page 24/203 ST25DV04KC ST25DV16KC ST25DV64KC Fast transfer mode (FTM) Figure 11. RF to I2C fast transfer mode operation ST25DV Dynamic registers MB_LEN_Dyn MB_CRTL_Dyn 1Mb/s I2C host RF message 26.5kb/s Fast Transfer Mode mailbox (256 Bytes) I2C GPO/RF_PUT_MSG ISO/IEC 15693 reader Static register FTM To send data from the I2C host to the RF reader, fast transfer mode must be enabled, the mailbox must be free, VCC power must be present, and the I2C host must first write the message containing data in the mailbox. The RF user must poll on MB_CTRL_Dyn register to check for the presence of a message from I2C in the mailbox. Once the complete message has been read by RF user, mailbox is considered free again and is available for receiving a new message (data is not cleared). The I2C host is informed that message has been read by RF user through a GPO interruption or by polling on the MB_CTRL_Dyn register. Figure 12. I2C to RF fast transfer mode operation ST25DV Dynamic registers MB_LEN_Dyn MB_CRTL_Dyn I2C host I2C Fast Transfer Mode mailbox (256 Bytes) ISO/IEC 15693 reader Host message 1Mb/s GPO/RF_GET_MSG Static register FTM Up to 53kb/s VCC supply source is mandatory to activate this feature. No precedence rule is applied: the first request is served first. DS13519 - Rev 4 page 25/203 ST25DV04KC ST25DV16KC ST25DV64KC Fast transfer mode (FTM) Adding a message is only possible when fast transfer mode is enabled (MB_EN=1) and mailbox is free (HOST_PUT_MSG and RF_PUT_MSG cleared, which is the case after POR or after complete reading of I2C message by RF, and complete reading of RF message by I2C). A watchdog limits the message availability in time: when a time-out occurs, the mailbox is considered free, and the HOST_MISS_MSG or RF_MISS_MSG bits is set into MB_CTRL_Dyn register. The data contained in the mailbox is not cleared after a read or after the watchdog has been triggered: message data is still available for read and until fast transfer mode is disabled. HOST_CURRENT_MSG and RF_CURRENT_MSG bits are indicating the source of the current data. The message is stored in a buffer (256 Bytes), and the write operation is done immediately. . Caution: The data written in user memory (EEPROM), either from I2C or from RF, transits via the 256-Byte buffer. Consequently fast transfer mode must be deactivated (MB_EN=0) before starting any write operation in user memory, otherwise the command is NotACK for I2C or get an answer 0Fh for RF and programming is not done. I2C access to mailbox The access by I2C can be done by dedicated address mapping to mailbox (2008h to 2107h) with device select E2=0, E1=1. I2C reading operation does not support rollover. Therefore data out is set to FFh when the counter reaches the message end. The RF_PUT_MSG is cleared after reaching the STOP consecutive to reading the last message byte, and the mailbox is considered free (but the message is not cleared and it is still present in the mailbox) until a new message is written or mail ox is deactivated. A I2C reading operation never deletes the HOST_PUT_MSG, and the message remains available for RF. An I2C read can start at any address inside the mailbox (between address 2008h and 2107h). A I2C write operation must start from the first mailbox location, at address 2008h. After reaching the Mailbox border at address 2107h all bytes are NACK and the command is not executed (no rollover). At the end of a successful I2C message write, the message length is automatically set into MB_LEN_Dyn register, and HOST_PUT_MSG bit is set into MB_CTRL_Dyn register, and the write access to the mailbox is not possible until the mailbox has been released again. MB_LEN_Dyn contains the size of the message in byte, minus 1. RF access to mailbox The RF Control & Access to mailbox is possible using dedicated custom commands: • Read Dynamic Configuration and Fast Read Dynamic Configuration to check availability of mailbox. • Write Dynamic Configuration and Fast Write Dynamic configuration to enable or disable fast transfer mode. • Read Message Length and Fast Read Message Length to get the length of the contained message, • Read Message and Fast Read Message to download the content of the mailbox, • Write Message and Fast Write Message to put a new message in mailbox. (New length is automatically updated after completion of a successful Write Message or Fast Write Message command). HOST_PUT_MSG is cleared following a valid reading of the last message byte, and mailbox is considered free (but message is not cleared and is still present in the mailbox) until a new message is written or mailbox is deactivated. An RF read can start at any address of inside the message, but return an error 0Fh if trying to read after the last byte of the message. An RF reading operation never deletes the RF_PUT_MSG and the message remains available for I2C. At the end of a successful RF message write, the message length is automatically set in MB_LEN_Dyn register, and RF_PUT_MSG bit is set in MB_CTRL_Dyn register. and write access to the mailbox is not possible until mailbox has been freed again. The presence of a DC supply is mandatory to get RF access to the mailbox. VCC_ON can be checked reading the dynamic register EH_CTRL_Dyn. To get more details about sequences to prepare and initiate a Fast Transfer, to detect progress of a fast transfer or to control and execute a fast transfer, please refer to AN4910. How to exchange data between wired (I2C) and wireless world (RF ISO15693) using fast transfer mode supported by ST25DVxxKC). DS13519 - Rev 4 page 26/203 ST25DV04KC ST25DV16KC ST25DV64KC Fast transfer mode (FTM) Figure 13. Fast transfer mode mailbox access management. MB_EN=00h or VCC OFF FTM disabled MB_CTRL_Dyn=00h No access I2C write msg FTM enabled I2C Message MB_CTRL_Dyn=43h Read access RF FTM enabled Mailbox empty MB_CTRL_Dyn=01h R/W access ull ms g RF write msg FTM enabled Mailbox free MB_CTRL_Dyn=41/81h R/W access RF read MB_CTRL_Dyn Watchdog trig DS13519 - Rev 4 RF read msg FTM enabled RF Message MB_CTRL_Dyn=85h Read access Mailbox free rea df Note: VCC ON and MB_EN=01h MB_EN=00h or VCC OFF I2C read msg MB_EN=00h or VCC OFF I2C rea ull df g ms I2C read MB_CTRL_Dyn FTM enabled Mailbox free MB_CTRL_Dyn=61/91h R/W access Watchdog trig Assuming MB_MODE=1b Assuming no error occurred page 27/203 ST25DV04KC ST25DV16KC ST25DV64KC RF management feature 5.2 RF management feature 5.2.1 RF management registers Table 22. RF_MNGT access I2C RF Command Type R always, W if RF configuration security session is open and configuration not locked Read Configuration (cmd code A0h) @03h Write Configuration (cmd code A1h) @03h Address Type E2=1, E1=1, 0003h R always, W if I2C security session is open Table 23. RF_MNGT Bit Name b0 RF_DISABLE b1 RF_SLEEP b7-b2 RFU Note: Function Factory value 0: RF commands executed 0b 1: RF commands not executed (error 0Fh returned) 0: RF communication enabled 0b 1: RF communication disabled (ST25DV remains silent) - 000000b Refer to Table 13. System configuration memory map for the RF_MNGT register. Table 24. RF_MNGT_Dyn access I2C RF Command Type Address No access E2=0, E1=1, 2003h Type R always, W always Table 25. RF_MNGT_Dyn Bit Name b0 RF_DISABLE b1 RF_SLEEP Function 0: RF mode is defined by RF_OFF and RF_SLEEP bits 1: RF commands not executed (error 0Fh returned) 0: RF mode is defined by RF_OFF and RF_DISABLE bits 1: RF communication disabled (ST25DVxxKC remains silent) Factory value 0b 0b 0: RF mode is defined by RF_SLEEP and RF_DISABLE bits b2 RF_OFF b7-b3 RFU Note: DS13519 - Rev 4 1: RF is reset, and communication disabled (RF security sessions and ISO15693 state are reset and ST25DVxxKC remains silent) - 0b 0000000b Refer to Table 14. Dynamic registers memory map for the RF_MNGT_Dyn register. The RF_OFF bit access is defined as followed: • read only with user memory I2C slave address, followed by memory address of RF_MNGT_Dyn register. • write to 1 only with I2C "RFSwitchOff" command. • write to 0 only with I2C "RFSwitchOn" command. • cannot be accessed by any other I2C slave address or by RF. page 28/203 ST25DV04KC ST25DV16KC ST25DV64KC RF management feature The RF_DISABLE and RF_SLEEP bits are accessible in Read and Write with the user memory I2C salve address, followed by memory address of RF_MNGT_Dyn register. 5.2.2 RF management feature description RF communication capabilities between ST25DVxxKC and an RF reader can be controlled by configuring the RF mode. ST25DVxxKC offers four RF modes: • RF normal mode (default mode) • RF disable mode • RF sleep mode • RF off mode The RF_MNGT and RF_MNGT_Dyn registers are used to configure and control the RF mode. At boot time, and each time the RF_MNGT register is updated, content of RF_MNGT_Dyn register is copied from RF_MNGT register. The content of the dynamic register RF_MNGT_Dyn can be updated on the fly, to temporarily modify the behaviour of ST25DVxxKC without affecting the static value of RF_MNGT register which is recovered at next POR. RF normal mode: In normal usage, and if I2C interface is not busy (see Section 5.3 Interface arbitration) , the ST25DVxxKC processes the RF request and respond accordingly. In this mode, all bits of RF_MNGT_Dyn are set to 0. RF disable mode: In disable mode, RF commands are interpreted but not executed. In case of a valid command, the ST25DVxxKC responds after t1 with the error 0Fh, and stay mute to the Inventory command. ISO15693 state and RF security sessions status are unchanged. In this mode, bit 0 of RF_MNGT_Dyn, RF_DISABLE, is set to 1 and all other bits are set to 0 RF sleep mode: In sleep mode, all RF communication are disabled and RF interface doesn't interpret any RF commands. ISO15693 state and RF security sessions status are unchanged. In this mode, bit 1 of RF_MNGT_Dyn, RF_SLEEP, is set to 1 and bit 2, RF_OFF, is set to 0 (bit 0, RF_DISABLE is don't care). RF off mode: In off mode, all RF communication are disabled and RF interface doesn't interpret any RF commands. ISO15693 state is reset and RF security sessions are closed. In this mode, bit 2 of RF_MNGT_Dyn, RF_OFF, is set to 1 and other bits are don't care. RF sleep and RF disable modes are controlled through writing in RF_SLEEP and RF_DISABLE bits in RF_MNGT register from RF or I2C and RF_MNGT_Dyn register from I2C. RF off mode is controlled exclusively from I2C. An I2C “RFSwitchOff” command allows to switch off the RF and an I2C “RFSwitchOn” command allows to switch on the RF. Entering RF off mode set the RF_MNGT_Dyn bit 2, RF_OFF, to 1 (see Section 5.3 Interface arbitration for details on the I2C “RFSwitchOff” and I2C “RFSwitchOn” commands). Different RF modes have priority levels: RF off mode has priority over RF sleep mode, which has priority over RF disable mode. Effect of updating RF_MNGT or RF_MNGT_Dyn registers is immediate. Effect of I2C “RFSwtichOff” command can be immediate or be effective at the end of a write in progress in EEPROM memory, to avoid any data corruption. A pulse can be generated on GPO pin to indicate to the I2C host exactly when the ST25DVxxKC enters in RF off mode following a valid I2C “RFSwitchOff” command. DS13519 - Rev 4 page 29/203 ST25DV04KC ST25DV16KC ST25DV64KC RF management feature RF off mode can be exited with the I2C “RFSwitchOn” command, or by removing the VCC power supply. Exiting RF off mode reset the bit 2, RF_OFF, of RF_MNGT_Dyn register. When exiting RF off mode, ST25DVxxKC state machine is set to Reset to Ready state, and all RF security sessions are closed. Table 26. RF modes summary RF mode Run Disable RF requests treatment Executed normally Not executed. Error 0Fh returned when possible ISO15693 state RF security sessions Changed by relevant RF requests Changed by relevant RF requests Unchanged Unchanged Sleep Not processed, not answered Unchanged Unchanged Off Not processed, not answered Reset (back to reset to ready state) Reset (all sessions closed) Following table is summarizing the effect of RF_OFF, RF_SLEEP and RF_DISABLE bits, as well as I2C busy state on any RF request: Table 27. RF modes configuration bits and effect on RF requests DS13519 - Rev 4 RF_OFF RF_SLEEP RF_DISABLE I2C busy 0 0 0 0 Processed 0 0 0 1 Not processed and answered with error 0Fh when possible 0 0 1 x Not processed and answered with error 0Fh when possible 0 1 x x No processed, not answered 1 0 x x No processed, not answered 1 1 x x No processed, not answered Effect on RF request page 30/203 ST25DV04KC ST25DV16KC ST25DV64KC Interface arbitration 5.3 Interface arbitration ST25DVxxKC automatically arbitrates the exclusive usage of RF and I2C interfaces. Arbitration scheme obeys to “first talk first served” basic law. (see Figure 14. ST25DVxxKC, Arbitration between RF and I2C). Figure 14. ST25DVxxKC, Arbitration between RF and I2C Power OFF VCC ON or RF field ON Boot RF mute I2C mute Boot done RF request SOF RF busy (I2C commamds are NoAck) I2C start ST25DV standby RF free I2C free RF transaction terminated I2C busy (0Fh or no response to RF requests) I2C transition terminated RF transaction is terminated: • • • at response EOF if answer. at request EOF is no answer. at RF field OFF. I2C transaction is terminated: • at the end of EEPROM programming time after the stop condition of a successful write into EEPROM (user memory or system configuration). See Section 6.4 I²C Write operations for write time calculation • • at stop condition for any other I2C transaction at VCC power off • at any I2C error (terminated before stop condition) • at I2C timeout if it occurs When RF is busy, I2C interface answers by NoAck on any I2C command. When I2C is busy, RF commands receive no response (Inventory, Stay quiet, addressed commands) or error code 0Fh for any other command. DS13519 - Rev 4 page 31/203 ST25DV04KC ST25DV16KC ST25DV64KC Interface arbitration 5.3.1 I²C priority When RF is in sleep mode or in off mode, RF commands are not interpreted, and RF cannot by busy. I²C is then free to access the ST25DVxxKC exclusively. Entering in RF sleep mode implies that I²C host writes into the RF_MNGT_Dyn register, which may not be possible immediately if RF is busy. In case I²C host needs to get exclusive and immediate access to the ST25DVxxKC, an immediate (or as soon as possible) switch off (and on) of the RF interface is available. A specific I²C “RFSwitchOff” command allows the I²C master to switch off RF immediately, or at the end of an RF write in progress in EEPROM, even if an RF command is ongoing. A specific I²C RFSwitchOn command allows the I²C master to switch on the RF immediately (RF returns to RF mode defined by RF_MNGT_Dyn register). Bit 5 of the I2C_CFG static register (I2C_RF_SWITCHOFF_EN) allows to enable or disable the RF switch off and switch on from I²C. The I²C “RFSwitchOff” command is defined as follows: • START condition, followed by the I²C “RFSwitchOff” salve address (1 Byte), followed by the acknowledge bit from the ST25DVxxKC, followed by STOP condition. • See Section 6.3 Device addressing for I²C RFSwitchOff slave address value explanation. • I²C “RFSwitchOff“ salve address is not acknowledged only if I2C_CFG register bit 5 (I2C_RF_SWITCHOFF_EN) is set to 0 and is always acknowledged otherwise (even if RF is busy). Figure 15. I²C “RFSwitchOff” command ACK R/W Stop 1 0 E0 Start I2C DEVICE CODE MS67299 The I²C RFSwitchOn command is defined as follows: • START condition, followed by I²C “RFSwitchOn” salve address (1 Byte), followed by acknowledge bit from ST25DVxxKC, followed by STOP condition. • See Section 6.3 Device addressing for I²C RFSwitchOn slave address value explanation. • I²C “RFSwitchOn” salve address is not acknowledged only if I2C_CFG register bit 5 (I2C_RF_SWITCHOFF_EN) is set to 0 and is always acknowledged otherwise (even if RF is busy). Figure 16. I²C “RFSwitchOn” command ACK 0 0 E0 R/W Stop Start I2C DEVICE CODE When ST25DVxxKC receives the I²C “RFSwitchOff” command outside of any RF command processing, ST25DVxxKC is immediately setting the RF in off mode (see Section 5.2.2 RF management feature description). If GPO interruption RF_OFF is enabled, a pulse is emitted on the GPO pin after the stop condition of the I²C “RFSwitchOff” command. When ST25DVxxKC receives the I²C “RFSwitchOff” command concurrently to an RF command, two possible cases can happen: DS13519 - Rev 4 page 32/203 ST25DV04KC ST25DV16KC ST25DV64KC GPO • • If there is a write in progress in EEPROM memory, following an RF write command execution, the RF is set in off mode at the completion of the write in memory. ST25DVxxKC does not answer to the RF request, but data is written into memory. If GPO interruption RF_OFF is enabled, a pulse is emitted on GPO pin at end of all write programming cycles. If there is no write in progress in EEPROM memory, the RF is set in RF off mode immediately. ST25DVxxKC does not answer to the RF request. If GPO interruption RF_OFF is enabled, a pulse is emitted on GPO pin after stop condition of the I²C “RFSwitchOff” command. Once in RF off mode, I2C host get exclusive access to the ST25DVxxKC, whatever incoming RF requests (which are ignored). 5.4 GPO GPO signal is used to alert the I2C host of external RF events or ST25DVxxKC processes activity and also if some specific I2C events. Several causes could be used to request a host interruption. RF user can also directly drive GPO pin level using a dedicated RF command. 5.4.1 ST25DVxxKC interrupt capabilities on RF events ST25DVxxx supports multi interruption mode and can report several events occurring through RF interface. In this section, all drawings are referring to the open drain version of GPO output (8-pin packages). The reader can retrieve the behaviour of CMOS version (12-pin package) by inverting the GPO curve polarity and replace the word “released” or “high-Z” by “pull to ground”. Supported RF events is listed hereafter: DS13519 - Rev 4 page 33/203 ST25DV04KC ST25DV16KC ST25DV64KC GPO RF_USER: • • • GPO output level is controlled by Manage GPO command (set or reset) When RF_USER is activated, GPO level is changed after EOF of ST25DVxxKC response to a Manage GPO set or reset command (see Section 7.6.30 Manage GPO). RF_USER is prevalent over all other GPO events when set by Manage GPO command (other interrupts are still visible in IT_STS_Dyn status register, but do not change GPO output level). Figure 17. RF_USER chronogram 1) VCD sends a ManageGPO command with value 00h (set GPO) and ST25DVxxKC replies. GPO/RF_USER is tied low after ST25DVxxKC response. S O F ManageGPO 00h command E O F t1 S ST25DVxxKC E O O reply F F GPO/RF_USER 2) VCD sends a ManageGPO command with value 01h (reset GPO) and ST25DVxxKC replies. GPO/RF_USER is set high-Z low after ST25DVxxKC response. S O F ManageGPO 01h command E O F t1 S ST25DVxxKC E O O reply F F GPO/RF_USER 3) VCD sends a ManageGPO command (any value) and ST25DVxxKC replies with error. GPO/RF_USER remains high-Z. S O F ManageGPO command E O F t1 S ST25DVxxKC E O O reply F F GPO/RF_USER 4) VCD sends a ManageGPO command (any value) and ST25DVxxKC stays quiet (command not for this VICC, or quiet state). GPO/RF_USER remains high-Z. S O F ManageGPO command E O F GPO/RF_USER 5) VCD sends any command other than ManageGPO command and ST25DVxxKC replies. GPO/RF_USER remains high-Z. S O F Any other command E O F t1/Wt S ST25DVxxKC E O O reply F F GPO/RF_USER DS13519 - Rev 4 page 34/203 ST25DV04KC ST25DV16KC ST25DV64KC GPO RF_ACTIVITY: • GPO output level reflects the RF activity. • When RF_ACTIVITY is activated, a GPO output level change from RF command EOF to ST25DVxxKC response EOF. Figure 18. RF_ACTIVITY chronogram 1) VCD sends a command and ST25DVxxKC replies. GPO/RF_ACTIVITY is released after ST25DVxxKC response. S O F VCD command E O F S ST25DVxxKC E O O reply F F t1 GPO/RF_ACTIVITY 2) VCD sends a write command and ST25DVxxKC replies after write completed. GPO/RF_ACTIVITY is released after ST25DVxxKC response. S O F Write command E O F (m*)Wt S ST25DVxxKC E O O reply F F GPO/RF_ACTIVITY 3) VCD sends a write command with option flag set to 1, and ST25DVxxKC replies after receiving EOF. GPO/RF_ACTIVITY is released after ST25DVxxKC response. S O F Write command E O F >(m*)Wt E O F t1 S ST25DVxxKC E O O reply F F GPO/RF_ACTIVITY 4) VCD sends an Inventory 16 slots command, and ST25DVxxKC replies in its slot. GPO/ RF_ACTIVITY is released after ST25DVxxKC response. S O F Inventory command E O F E O F E O F Slot 1 Slot n t1 S ST25DVxxKC E O O reply F F GPO/RF_ACTIVITY 5) VCD sends a command and ST25DVxxKC stays quiet (Stay Quiet command, command not for this VICC, or quiet state). GPO/RF_ACTIVITY remains high-Z. S O F VCD Command E O F GPO/RF_ACTIVITY DS13519 - Rev 4 page 35/203 ST25DV04KC ST25DV16KC ST25DV64KC GPO RF_INTERRUPT: • • A pulse is emitted on GPO by Manage GPO command (interrupt). When RF_INTERRUPT is activated, a pulse of duration IT_TIME is emitted after EOF of ST25DVxxKC response to a Manage GPO interrupt command (see Section 7.6.30 Manage GPO). Figure 19. RF_INTERRUPT chronogram 1) VCD sends a ManageGPO command with value 80h (GPO emit pulse) and ST25DVxxKC replies. GPO/RF_INTERRUPT generates a pulse of duration IT_TIME after ST25DVxxKC response. S O F ManageGPO 80h command E O F t1 S ST25DVxxKC E O O reply F F GPO/RF_INTERRUPT 2) VCD sends a ManageGPO command (any value) and ST25DVxxKC replies with error. GPO/RF_INTERRUPT remains high-Z. S O F ManageGPO command E O F t1 S ST25DVxxKC E O O reply F F GPO/RF_INTERRUPT 3) VCD sends a ManageGPO command (any value) and ST25DVxxKC stays quiet (command not for this VICC, or quiet state). GPO/RF_INTERRUPT remains high-Z. S O F ManageGPO command E O F GPO/RF_INTERRUPT 4) VCD sends any command other than ManageGPO command and ST25DVxxKC replies. GPO/RF_INTERRUPT remains high-Z. S O F Any other command E O F t1/Wt S ST25DVxxKC E O O reply F F GPO/RF_INTERRUPT DS13519 - Rev 4 page 36/203 ST25DV04KC ST25DV16KC ST25DV64KC GPO FIELD_CHANGE: • • • • A pulse is emitted on GPO to signal a change in RF field state. When FIELD_CHANGE is activated, and when RF field appear or disappear, GPO emits a pulse of duration IT_TIME. In case of RF field disappear, the pulse is emitted only if VCC power supply is present. If RF is configured in RF_SLEEP mode or is in RF_OFF state, field change are not reported on GPO, even if FIELD_CHANGE event is activated, as shown in Table 28. Table 28. FIELD_CHANGE when RF is disabled or in sleep of off mode RF_DISABLE RF_SLEEP RF_OFF 0 0 0 A pulse is emitted on GPO if RF field appears or disappears (1) 1 0 0 IT_STS_Dyn register is updated. X 1 X GPO remains High-Z (open drain version) or is tied to ground (CMOS version). 1 IT_STS_Dyn register is not updated. X X GPO behaviour when FIELD_CHANGE is enabled 1. assuming that GPO output is enabled (GPO_EN = 1). Figure 20. FIELD_CHANGE chronogram 1) RF field appears. GPO/FIELD_CHANGE generates a pulse during IT_TIME. RF field S O F First VCD command E O F t1 S ST25DVxxKC E O O reply F F GPO/FIELD_CHANGE 2) RF field disappears and ST25DVxxKC is powered through VCC. GPO/FIELD_CHANGE generates a pulse during IT_TIME. RF field S O F VCD command E O F t1 S ST25DVxxKC E O O reply F F GPO/FIELD_CHANGE 3) RF field disappears and ST25DVxxKC is not powered through VCC. GPO/FIELD_CHANGE doesn’t generates any pulse. RF field S O F VCD command E O F t1 S ST25DVxxKC E O O reply F F GPO/FIELD_CHANGE DS13519 - Rev 4 page 37/203 ST25DV04KC ST25DV16KC ST25DV64KC GPO RF_PUT_MSG: • • A pulse is emitted on GPO when a message is successfully written by RF in fast transfer mode mailbox. When RF_PUT_MSG is activated, a pulse of duration IT_TIME is emitted on GPO at completion of valid Write Message or Fast Write Message commands (after EOF of ST25DVxxKC response). Figure 21. RF_PUT_MSG chronogram 1) VCD sends a Write Message or Fast Write Message command and ST25DVxxKC replies with no error. GPO/RF_PUT_MSG generates a pulse during IT_TIME after ST25DVxxKC response. S O F Write Msg command E O F t1 S ST25DVxxKC E O O reply F F GPO/RF_PUT_MSG 2) VCD sends a Write Message or Fast Write Message command and ST25DVxxKC replies with error. GPO/RF_PUT_MSG remains high-Z. S O F Write Msg command E O F t1 S ST25DVxxKC E O O reply F F GPO/RF_PUT_MSG 3) VCD sends Write Message or Fast Write Message command and ST25DVxxKC stays quiet (command not for this VICC, or quiet state). GPO/RF_PUT_MSG stays high-Z. S O F Write Msg Command E O F GPO/RF_PUT_MSG 4) VCD sends a any other command than Write Message or Fast Write Message commands and ST25DVxxKC replies. GPO/RF_PUT_MSG remains high-Z. S O F Any other command E O F t1 S ST25DVxxKC E O O reply F F GPO/RF_PUT_MSG DS13519 - Rev 4 page 38/203 ST25DV04KC ST25DV16KC ST25DV64KC GPO RF_GET_MSG: • • A pulse is emitted on GPO when RF has successfully read a message, up to its last byte, in fast transfer mode mailbox. When RF_GET_MSG is activated, a pulse of duration IT_TIME is emitted on GPO at completion of valid Read Message or Fast Read Message commands (after EOF of ST25DVxxKC response), and end of message has been reached. Figure 22. RF_GET_MSG chronogram 1) VCD sends a Read Message or Fast Read Message command and ST25DVxxKC replies with no error. GPO/RF_GET_MSG generates a pulse during IT_TIME after ST25DVxxKC response. S O F Read Msg E O command F t1 S ST25DVxxKC E O O reply F F GPO/RF_GET_MSG 2) VCD sends a Read Message or Fast Read Message command and ST25DVxxKC replies with error. GPO/RF_GET_MSG remains high-Z. S O F Read Msg E O command F t1 S ST25DVxxKC E O O reply F F GPO/RF_GET_MSG 3) VCD sends Read Message or Fast Read Message command and ST25DVxxKC stays quiet (command not for this VICC, or quiet state). GPO/RF_GET_MSG stays high-Z. S O F Read Msg Command E O F GPO/RF_GET_MSG 4) VCD sends any other command than Read Message or Fast Read Message commands and ST25DV replies. GPO/RF_GET_MSG remains high-Z. S O F Any other command E O F t1 S ST25DVxxKC E O O reply F F GPO/RF_GET_MSG DS13519 - Rev 4 page 39/203 ST25DV04KC ST25DV16KC ST25DV64KC GPO RF_WRITE: • • • When RF_WRITE is activated, a pulse of duration IT_TIME is emitted at completion of a valid RF write operation in EEPROM (after EOF of ST25DVxxKC response). Following commands trigger the RF_WRITE interrupt after a valid write operation in EEPROM: – Write Single Block – Extended Write Single Block – Write Multiple Block – Extended Write Multiple Block – Lock Block – Extended Lock Block – Write AFI – Lock AFI – Write DSFID – Lock DSFID – Write Configuration – Write Password Note that writing in dynamic registers or fast transfer mode mailbox does not trigger RF_WRITE interrupt (no write operation in EEPROM). Figure 23. RF_WRITE chronogram 1) VCD sends a write command and ST25DVxxKC replies after write completed. GPO/RF_WRITE generates a pulse during IT_TIME after ST25DVxxKC response. S O F Write command E O F (m*)Wt S ST25DVxxKC E O O reply F F GPO/RF_WRITE 2) VCD sends a write command with option flag set to 1, and ST25DVxxKC replies after receiving EOF. GPO/RF_WRITE generates a pulse during IT_TIME after ST25DV response. S O F Write command E O F >(m*)Wt E O F t1 S ST25DVxxKC E O O reply F F GPO/RF_WRITE 3) VCD sends a write command and ST25DV GPO/RF_ replies with error. GPO/RF_WRITE remains high-Z. S O F Write command E O F t1 S ST25DVxxKC E O O reply F F GPO/RF_WRITE 4) VCD sends any other command than a write command. GPO/RF_WRITE remains high-Z. S O F Any other command E O F t1 S ST25DVxxKC E O O reply F F GPO/RF_WRITE 5) VCD sends any command and ST25DV GPO/RF_ stays quiet (command not for this VICC, or quiet state). RF_ACTIVITY remains high-Z. S O F E VCD Command O F GPO/RF_WRITE (OD) DS13519 - Rev 4 page 40/203 ST25DV04KC ST25DV16KC ST25DV64KC GPO 5.4.2 ST25DVxxKC interrupt capabilities on I2C events On top of RF events, the ST25DVxxKC provides two additional I2C events that can trigger an interrupt on the GPO pin. In this section, all drawings are referring to the open drain version of GPO output (8-pin packages). The reader can retrieve the behaviour of CMOS version (12-pin package) by inverting the GPO curve polarity and replace the word “released” or “high-Z” by “pull to ground”. Supported I2C events is listed hereafter: I2C_WRITE: • • • When I2C_WRITE is activated, a pulse of duration IT_TIME is emitted at completion of a valid I2C write operation in EEPROM (after I2C STOP condition). Note that writing in dynamic registers or fast transfer mode mailbox does not trigger I2C_WRITE interrupt (no write operation in EEPROM). The purpose of this GPO interrupt is to inform the I2C host when the I2C write programming cycle in EEPROM is completed, meaning the I2C bus and RF interface are free for new operation. Figure 24. GPO/I2C_WRITE chronogram 1) I2C host sends a valid write command to EEPROM. ST25DVxxKC program the data into EEPROM. GPO/I2C_WRITE generates a pulse during IT_TIME after programming cycle completion. S I2C Write A P m * Wt GPO/I2C_WRITE 2) I2C host sends an invalid write command to EEPROM. ST25DVxxKC does not program the data into EEPROM. GPO/I2C_WRITE remains High-Z. S I2C Write N P GPO/I2C_WRITE 3) I2C host sends a valid write command to Dynamic register or Mailbox. ST25DVxxKC program the data with no programming cycle. GPO/I2C_WRITE remains high-Z. S I2C Write GPO/I2C_WRITE DS13519 - Rev 4 A P MS69215 page 41/203 ST25DV04KC ST25DV16KC ST25DV64KC GPO I2C_RF_OFF: • • When I2C_RF_OFF is activated, a pulse of duration IT_TIME is emitted: – after the I2C STOP condition of a successful I2C “RFSwitchOff” command if no RF write to EEPROM is ongoing. – after the end of all blocks programming if the STOP condition of a successful I2C “RFSwitchOff” command happens during an RF write to EEPROM. The purpose of this GPO interrupt is to inform the I2C master when the I2C RFSwitchOff command has switched off the RF (RF is in off mode), as the timing action of the I2C RFSwitchOff can vary if an EEPROM write from RF is ongoing. Figure 25. GPO/I2C_RF_OFF chronogram 1) I2C host sends a valid I2C RFSwithcOff command and there is no write in progress to EEPROM memory from RF. RF is swithced off immediately and GPO/I2C_RF_OFF generates a pulse during IT_TIME after I2C STOP condition. S I2C RFSwitchOff A P GPO/I2C_RF_OFF 2) I2C host sends a valid I2C RFSwitchOff command and there is a write in progress to EEPROM memory from RF. RF is switched off and GPO/I2C_RF_OFF generates a pulse during IT_TIME at end of EEPROM programming. Wt(RF) S I2C RFSwitchOff A P GPO/I2C_RF_OFF 3) I2C host sends a valid I2C RFSwitchOff command and I2C_RF_SWITCHOFF_EN = 0. RF is not swithced off and the GPO/I2C_RF_OFF remains high-Z. S I2C RFSwitchOff GPO/I2C_RF_OFF 5.4.3 A P MS69216 GPO and power supply When at the same time RF field is present and VCC is ON, GPO is acting as configured in GPO1, GPO2 and GPO_CTRL_Dyn registers and both RF events ans I2C events are reflected to the GPO pin. When VCC is ON and no RF field is present, GPO is acting as configured in GPO2 and GPO_CTRL_Dyn registers, Only I2C events are reflected on the GPO pin. IT_STS_Dyn register is maintained unchanged until next I2C read of VCC power off. When RF field is present and VCC is OFF, GPO is acting as configured in GPO1 (and GPO2 for IT_TIME configuration only) and GPO_CTRL_Dyn registers. Only RF events are reflected on the GPO pin (assuming pull-up resistor is supplied with correct voltage for open drain version, or VDCG voltage is supplied for CMOS version). Exception is FIELD_CHANGE when RF field is falling, which can’t be reported on GPO output if VCC is off (no power supply on ST25DVxxKC). DS13519 - Rev 4 page 42/203 ST25DV04KC ST25DV16KC ST25DV64KC GPO Table 29. GPO interrupt capabilities in function of RF field and VCC VCC RF field LPD GPIO pin OFF OFF Don't care Remains High-Z (open drain version) or is tied to ground (CMOS version) ON OFF Don't care State is function of RF events(1)(2) OFF ON High Remains High-Z (open drain version) or is tied to ground (CMOS version) ON ON High State is function of RF events(1)(2) OFF ON Low/unconnected State function of I2C events ON ON Low/unconnected State is function of both RF and I2C event(1) 1. If pull-up resistor is powered (open drain) or VDCG is powered (CMOS) 2. Except FIELD_CHANGE in case of RF field falling 5.4.4 GPO registers Four registers are dedicated to this feature: • Two static registers in system configuration • Two dynamic registers Table 30. GPO1 access I2C RF Command Read Configuration (cmd code A0h) @00h Write Configuration (cmd code A1h) @00h DS13519 - Rev 4 Type R always, W if RF configuration security session is open and configuration not locked Address Type E2=1, E1=1, 0000h R always, W if I2C security session is open page 43/203 ST25DV04KC ST25DV16KC ST25DV64KC GPO Table 31. GPO1 Bit Name b0 GPO_EN Function Factory value 0: GPO output is disabled. GPO is High-Z (open drain version) or is tied to ground (CMOS version). 1b 1: GPO output is enabled. GPO outputs enabled interrupts. b1 RF_USER_EN b2 RF_ACTIVITY_EN b3 RF_INTERRUPT_EN b4 FIELD_CHANGE_EN b5 RF_PUT_MSG_EN b6 RF_GET_MSG_EN b7 RF_WRITE_EN 0: disabled 0b 1: GPO output level is controlled by Manage GPO Command (set/reset). 0: disabled 0b 1: GPO output level changes from RF command EOF to response EOF. 0: disabled 0b 1: GPO output level is controlled by Manage GPO Command (pulse). 0: disabled 1b 1: A pulse is emitted on GPO, when RF field appears or disappears. 0: disabled 0b 1: A pulse is emitted on GPO at completion of valid RF Write Message command. 0: disabled 0b 1: A pulse is emitted on GPO at completion of valid RF Read Message command if end of message has been reached. 0: disabled Note: 0b 1: A pulse is emitted on GPO at completion of valid RF write operation in EEPROM. Refer to Table 13. System configuration memory map for the GPO1 register: • Enables the interruption source, and enable GPO output. • Several interruption sources can be enabled simultaneously. • The updated value is valid for the next command (except for the RF_WRITE interrupt, which is valid right after EOF of the Write Configuration command if enabled through RF). • The GPO_EN bit (b0) is used to disable GPO output. The interruptions are still reported in STS_Dyn register. • RF configuration security session (present RF password 0) or I2C security session (present I2C password) must be open in order to write the GPO1 register. Table 32. GPO2 access I2C RF Command Read Configuration (cmd code A0h) @01h Write Configuration (cmd code A1h) @01h DS13519 - Rev 4 Type R always, W if RF configuration security session is open and configuration not locked Address Type E2=1, E1=1, 0001h R always, W if I2C security session is open page 44/203 ST25DV04KC ST25DV16KC ST25DV64KC GPO Table 33. GPO2 Bit Name Function b7-b5 RFU b4-b2 IT_TIME b1 I2C_RF_OFF_EN b0 I2C_WRITE_EN Note: Factory value - 000b Pulse duration = 301 us - IT_TIME x 37.65 us ± 2 us 011b 0: disabled 1: A pulse is emitted on GPO when I2C host has successfully switched the RF off. 0b 0: disabled 1: A pulse is emitted on GPO at completion of valid I2C write operation in EEPROM 0b Refer to Table 13. System configuration memory map for the GPO2 register. • • Defines interrupt pulse duration on GPO pin for the flowing events: RF_INTERRUPT, FIELD_CHANGE, RF_PUT_MSG, RF_GET_MSG, RF_WRITE , I2C_RF_OFF_EN and I2C_WRITE_EN. See Eq. (1) for interrupt duration calculation. Table 34. GPO_CTRL_Dyn access I2C RF Command Type Read Dynamic Configuration (cmd code ADh) @00h RO Fast Read Dynamic Configuration (cmd code CDh) @00h Address Type E2=0, E1=1, 2000h b7-b1: RO b0 : R always, W always Table 35. GPO_CTRL_Dyn Bit Name Function Factory value b7-b1 RFU - 0000000b b0 GPO_EN 0: GPO output is disabled. GPO is High-Z (open drain version) or is tied to ground (CMOS version). 1b 1: GPO output is enabled. GPO outputs enabled interrupts. Note: Refer to Table 14. Dynamic registers memory map for the GPO_CTRL_Dyn register. • • • • Allows I2C host to dynamically enable or disable GPO output by writing in GPO_EN bit (b0). GPO_EN bit of GPO_CTRL_Dyn register is prevalent over GPO_EN bit of GPO register. At power up, and each time GPO register is updated, GPO_EN bit content is copied from GPO register. GPO_CTRL_Dyn is a volatile register. Value is maintained only if at least one of the two power sources is present (RF field or VCC). • GPO_CTRL_Dyn bit 0 (GPO_EN) can be written even if I2C security session is closed (I2C password not presented) but is read only for RF user. Modifying GPO_CTRL_Dyn bit 0 (GPO_EN), does not affect the value of GPO register bit 0 GPO_EN • Table 36. IT_STS_Dyn access I2C RF Command Type No access DS13519 - Rev 4 Address E2=0, E1=1, 2005h Type RO page 45/203 ST25DV04KC ST25DV16KC ST25DV64KC GPO Table 37. IT_STS_Dyn Bit Name b0 RF_USER b1 RF_ACTIVITY b2 RF_INTERRUPT b3 FIELD_FALLING b4 FIELD_RISING b5 RF_PUT_MSG b6 RF_GET_MSG b7 RF_WRITE Function 0: Manage GPO reset GPO 1: Manage GPO set GPO 0: No RF access 1: RF access 0: No Manage GPO interrupt request 1: Manage GPO interrupt request 0: No RF field falling 1: RF Field falling 0: No RF field rising 1: RF field rising 0: No message put by RF in FTM mailbox 1: Message put by RF in FTM mailbox Factory value 0b 0b 0b 0b 0b 0b 0: No message read by RF from FTM mailbox Note: 0: No write in EEPROM 1: Write in EEPROM 0b 0b Refer to Table 14. Dynamic registers memory map for the IT_STS_Dyn register. • • • • • DS13519 - Rev 4 1: Message read by RF from FTM mailbox, and 'end of message' reached Cumulates all events which generate interruptions. It should be checked by I2C host to know which event triggered an interrupt on GPO pin. When enabled, RF events are reported in IT_STS_Dyn register even if GPO output is disabled though the GPO_EN bit. Once read the ITSTS_Dyn register is cleared (set to 00h). At power up, IT_STS_Dyn content is cleared (set to 00h). IT_STS_Dyn is a volatile register. Value is maintained only if at least one of the two power sources is present (RF field or VCC). page 46/203 ST25DV04KC ST25DV16KC ST25DV64KC GPO 5.4.5 Configuring GPO GPO and interruption pulse duration can be configured by RF user or by I2C host. One or more interrupts can be enabled at same time. RF user can use Read Configuration and Write Configuration commands to set accordingly the GPO1 and GPO2 registers, after presenting a valid RF configuration password to open RF configuration security session. I2C host can write GPO1 and GPO2 registers, after presenting a valid I2C password to open I2C security session. Enabling or disabling GPO output: • RF user and I2C host can disable or enable GPO output at power up time by writing in GPO_EN bit 0 of GPO1 register (if write access is granted). • I2C host can temporarily enable or disable GPO output at any time by toggling GPO_EN bit 0 of GPO_CTRL_Dyn register. No password is required to write into GPO_CTRL_Dyn register. Disabling GPO output by writing in GPO_EN bit (either in GPO1 or in GPO_CTRL_Dyn registers) does not disable interruption report in IT_STS_Dyn status register. • Table 38. Enabling or disabling GPO interruptions GPO1 bit 0: GPO_CTRL_Dyn bit 0: GPO_EN GPO_EN 0 0 GPO remains High-Z (open drain version) or is tied to ground (CMOS version). 1 0 GPO remains High-Z (open drain version) or is tied to ground (CMOS version). 0 1 Activated RF and I2C events are reported on GPO output.(1) 1 1 Activated RF and I2C events are reported on GPO output. (1) GPO output 1. If pull-up resistor is powered (open drain version) or VDCG is powered (CMOS version). Interruption pulse duration configuration: • Interrupt pulse duration is configured by writing pulse duration value in bits 4 to 2 (IT_TIME) of GPO2 register • Pulse duration is calculated with the following equation IT pulse duration equation: ITpulse duration = 301μs − IT_TIME × 37.65μs ± 2μs DS13519 - Rev 4 (1) page 47/203 ST25DV04KC ST25DV16KC ST25DV64KC Energy harvesting (EH) 5.5 Energy harvesting (EH) 5.5.1 Energy harvesting registers Table 39. EH_MODE access I2C RF Command Type Read Configuration (cmd code A0h) @02h R always, W if RF configuration security session is open and configuration not locked Write Configuration (cmd code A1h) @02h Address Type E2=1, E1=1, 0002h R always, W if I2C security session is open Table 40. EH_MODE Bit Name b0 EH_MODE b7-b1 RFU Note: Function Factory value 0: EH forced after boot 1b 1: EH on demand only - 0000000b Refer to Table 13. System configuration memory map for the EH_MODE register. Table 41. EH_CTRL_Dyn access I2C RF Command Type Address Type E2=0, E1=1, 2002h b0: R always, W always Read Dynamic Configuration (cmd code ADh) @02h Fast Read Dynamic Configuration (cmd code CDh) @02h b0: R always, W always Write Dynamic Configuration (cmd code AEh) @02h b1 - b7: RO b1-b7 : RO Fast Write Dynamic Configuration (cmd code CEh) @02h Table 42. EH_CTRL_Dyn Bit Name b0 EH_EN b1 EH_ON b2 FIELD_ON b3 VCC_ON b7-b4 RFU Note: DS13519 - Rev 4 Function 0: Disable EH feature 1: Enable EH feature 0: EH feature is disabled 1: EH feature is enabled 0: RF field is not detected 1: RF field is present and ST25DVxxKC may communicate in RF 0: No DC supply detected on VCC pin or Low Power Down mode is forced (LPD is high) 1: VCC supply is present and Low Power Down mode is not forced (LPD is low) - Factory value 0b 0b Depending of power source Depending of power source 0b Refer to Table 14. Dynamic registers memory map for the EH_CTRL_Dyn register. page 48/203 ST25DV04KC ST25DV16KC ST25DV64KC Energy harvesting (EH) 5.5.2 Energy harvesting feature description The usage of Energy Harvesting element can be defined in configuration register EH_MODE. When the Energy harvesting mode is disabled or the RF field strength is not sufficient, the energy harvesting analog voltage output V_EH is in High-Z state. EH_MODE Static Register is used to define the Energy Harvesting default strategy after boot. At boot EH_EN (in EH_CTRL_Dyn register) is set depending EH_MODE value as shown in table below: Table 43. Energy harvesting at power-up EH_MODE EH_EN (at boot) 0 1 1 0 Energy harvesting at power-up EH enabled after boot (when possible) EH disabled initially, EH delivered on demand (when possible) Writing 0 in EH_MODE at any time after boot automatically sets EH_EN bit to 1, and thus activate energy harvesting. Writing 1 in EH_MODE at any time after boot does not modify EH_EN bit (until next reboot) and thus does not modify energy harvesting current state. EH_CTRL_Dyn allows to activate or deactivate on the fly the Energy harvesting (EH_EN) and bring information on actual state of EH and state of power supplies : • EH_ON set reflects the EH_EN bit value • FIELD_ON is set in presence of an RF field • VCC_ON is set when Host power supply is on, and low power-down mode is not forced. During boot, EH is not delivered to avoid alteration in device configuration. Caution: DS13519 - Rev 4 Communication is not guaranteed during EH delivery. Refer to the application note AN4913 (Energy harvesting delivery impact on ST25DVxxKC behaviour during RF communication). Energy harvesting can be set even if ST25DVxxKC is in RF disabled or RF Sleep mode, or in Low power mode. In all these cases, ST25DVxxKC delivers power on V_EH pin if RF field is present. Energy harvesting voltage output is not regulated. page 49/203 ST25DV04KC ST25DV16KC ST25DV64KC Energy harvesting (EH) 5.5.3 EH delivery state diagram Figure 26. EH delivery state diagram No EH requested ield Vc cO No EH requested Vc cO FF N c O =0 Vc ODE _M EH FF cO Vc RF Field OFF Vcc ON RF Fie ld RF Fie ld OF F ld Fie F R Power OFF RF Field OFF Vcc OFF RF Field ON Vcc OFF F OF ON ld =1 e i F DE RF _MO EH RF EH Fie _M ld O OD N E= 0 RF Fie ld OF F EH delivered c Vc EH delivered RF Field ON Vcc OFF N cO Vc OF F RF Write EH_CTRL_Dyn=1 or RF Write EH_MODE=0 I2C Write EH_CTRL_Dyn=1 or I2C Write EH_MODE=0 Write EH_CTRL_Dyn=1 or Write EH_MODE=0 EH Vcc _M ON OD E= 1 EH requested not delivered N Write EH_CTRL_Dyn=0 RF Field OFF Vcc ON I2C Write EH_CTRL_Dyn=0 FF ON F RF No EH requested Vc cO RF Write EH_CTRL_Dyn=0 R iel FF RF Field ON Vcc ON FF dO F OF RF Field ON Vcc ON Note: DS13519 - Rev 4 Power is delivered on V_EH only if harvested energy is sufficient to supply ST25DVxxKC and leave over power. Grey color indicates the states where power is delivered on V_EH pin. page 50/203 ST25DV04KC ST25DV16KC ST25DV64KC Data protection 5.5.4 EH delivery sequence Figure 27. ST25DVxxKC Energy Harvesting Delivery Sequence No Boot Boot Vcc No Boot Boot No Boot RF Field(1) With EH_MODE=0 : Reset EH_EN EH_EN EH_ON Set EH_EN Reset EH_EN Set EH_EN Reset EH_EN V_EH(2) With EH_MODE=1 : EH_EN EH_ON Set EH_EN Reset EH_EN Set EH_EN Reset EH_EN Set EH_EN Set EH_EN V_EH(2) 1. 2. 5.6 We suppose that the captured RF power is sufficient to trig EH delivery. V_EH = 1 means some µW are available on V_EH pin. V_EH = 0 means V_EH pin is in high-Z. Data protection ST25DVxxKC provides a special data protection mechanism based on passwords that unlock security sessions. User memory can be protected for read and/or write access and system configuration can be protected from write access, both from RF and I2C assess. 5.6.1 Data protection registers Table 44. RFA1SS access I2C RF Command Read Configuration (cmd code A0h) @04h Write Configuration (cmd code A1h) @04h DS13519 - Rev 4 Type R always, W if RF configuration security session is open and configuration not locked Address Type E2=1, E1=1, 0004h R always, W if I2C security session is open page 51/203 ST25DV04KC ST25DV16KC ST25DV64KC Data protection Table 45. RFA1SS Bit Name Function Factory value 00: Area 1 RF user security session can’t be open by password b1-b0 PWD_CTRL_A1 01: Area 1 RF user security session is open by RF_PWD_1 00b 10: Area 1 RF user security session is open by RF_PWD_2 11: Area 1 RF user security session is open by RF_PWD_3 00: Area 1 RF access: Read always allowed / Write always allowed b3-b2 RW_PROTECTION_A1 01: Area 1 RF access: Read always allowed, Write allowed if RF user security session is open 10: Area 1 RF access: Read always allowed, Write allowed if RF user security session is open 00b 11: Area 1 RF access: Read always allowed, Write always forbidden b7-b4 RFU Note: - 0000b Refer to Table 13. System configuration memory map for the RFA1SS register. Table 46. RFA2SS access I2C RF Command Type R always, W if RF configuration security session is open and configuration not locked Read Configuration (cmd code A0h) @06h Write Configuration (cmd code A1h) @06h Address Type E2=1, E1=1, 0006h R always, W if I2C security session is open Table 47. RFA2SS Bit Name Function Factory value 00: Area 2 RF user security session can’t be open by password b1-b0 PWD_CTRL_A2 01: Area 2 RF user security session is open by RF_PWD_1 00b 10: Area 2 RF user security session is open by RF_PWD_2 11: Area 2 RF user security session is open by RF_PWD_3 00: Area 2 RF access: Read always allowed, Write always allowed 01: Area 2 RF access: Read always allowed, Write allowed if RF user security session is open b3-b2 RW_PROTECTION_A2 10: Area 2 RF access: Read allowed if RF user security session is open, Write allowed if RF user security session is open 00b 11: Area 2 RF access: Read allowed if RF user security session is open, Write always forbidden Note: Refer to Table 13. System configuration memory map for the RFA2SS register. Table 48. RFA3SS access I2C RF Command Read Configuration (cmd code A0h) @08h Write Configuration (cmd code A1h) @08h DS13519 - Rev 4 Type R always, W if RF configuration security session is open and configuration not locked Address Type E2=1, E1=1, 0008h R always, W if I2C security session is open page 52/203 ST25DV04KC ST25DV16KC ST25DV64KC Data protection Table 49. RFA3SS Bit Name Function Factory value 00: Area 3 RF user security session can’t be open by password b1-b0 PWD_CTRL_A3 01: Area 3 RF user security session is open by RF_PWD_1 00b 10: Area 3 RF user security session is open by RF_PWD_2 11: Area 3 RF user security session is open by RF_PWD_3 00: Area 3 RF access: Read always allowed / Write always allowed 01: Area 3 RF access: Read always allowed, Write allowed if RF user security session is open b3-b2 RW_PROTECTION_A3 10: Area 3 RF access: Read allowed if RF user security session is open, Write allowed if RF user security session is open 00b 11: Area 3 RF access: Read allowed if RF user security session is open, Write always forbidden b7-b4 RFU Note: - 0000b Refer to Table 13. System configuration memory map for the RFA3SS register. Table 50. RFA4SS access I2C RF Command Type Read Configuration (cmd code A0h) @0Ah Write Configuration (cmd code A1h) @0Ah R always, W if RF configuration security session is open and configuration not locked Address Type E2=1, E1=1, 000Ah R always, W if I2C security session is open Table 51. RFA4SS Bit Name Function Factory value 00: Area 4RF user security session can’t be open by password b1-b0 PWD_CTRL_A4 01: Area 4 RF user security session is open by RF_PWD_1 10: Area 4 RF user security session is open by RF_PWD_2 00b 11: Area 4 RF user security session is open by RF_PWD_3 00: Area 4 RF access: Read always allowed, Write always allowed 01: Area 4 RF access: Read always allowed, Write allowed if RF user security session is open b3-b2 RW_PROTECTION_A4 10: Area 4 RF access: Read allowed if RF user security session is open, Write allowed if RF user security session is open 00b 11: Area 4 RF access: Read allowed if RF user security session is open, Write always forbidden b7-b4 Note: DS13519 - Rev 4 RFU - 0000b Refer to Table 13. System configuration memory map for the RFA4SS register. page 53/203 ST25DV04KC ST25DV16KC ST25DV64KC Data protection Table 52. I2CSS access I2C RF Command Type No access Address Type E2=1, E1=1, 000Bh R always, W if I2C security session is open Table 53. I2CSS Bit Name Function Factory value 00: Area 1 I2C access: Read always allowed, Write always allowed b1-b0 RW_PROTECTION_A1 01: Area 1 I2C access: Read always allowed, Write allowed if I2C user security session is open 10: Area 1 I2C access: Read always allowed, Write always allowed 00b 11: Area 1 I2C access: Read always allowed, Write allowed if I2C user security session is open 00: Area 2 I2C access: Read always allowed, Write always allowed 01: Area 2 I2C access: Read always allowed, Write allowed if I2C user security session is open b3-b2 RW_PROTECTION_A2 10: Area 2 I2C access: Read allowed if I2C user security session is open, Write always allowed 00b 11: Area 2 I2C access: Read allowed if I2C security session is open, Write allowed if I2C security session is open 00: Area 3 I2C access: Read always allowed, Write always allowed 01: Area 3 I2C access: Read always allowed, Write allowed if I2C user security session is open b5-b4 RW_PROTECTION_A3 10: Area 3 I2C access: Read allowed if I2C user security session is open, Write always allowed 00b 11: Area 3 I2C access: Read allowed if I2C security session is open, Write allowed if I2C security session is open 00: Area 4 I2C access: Read always allowed, Write always allowed 01: Area 4 I2C access: Read always allowed, Write allowed if I2C user security session is open b7-b6 RW_PROTECTION_A4 10: Area 4 I2C access: Read allowed if I2C user security session is open, Write always allowed 00b 11: Area 4 I2C access: Read allowed if I2C security session is open, Write allowed if I2C security session is open Note: DS13519 - Rev 4 Refer to Table 13. System configuration memory map for the I2CSS register. page 54/203 ST25DV04KC ST25DV16KC ST25DV64KC Data protection Table 54. LOCK_CCFILE access I2C RF Command Type Lock Block (cmd code 22h) @00h/01h Address Type E2=1, E1=1, 000Ch R always, W if I2C security session is open (1) Ext Lock Block (cmd code 32h) @00h/01h Read Block (cmd code 20h) @00h/01h Fast Read Block(1) (cmd code C0h) @00h/01h Ext Read Block(1) (cmd code 30h) @00h/01h Fast Ext Read Block(1) (cmd code C4h) @00h/01h R always Read Multi Block(1) (cmd code 23h) @00h/01h b0: W if Block 00h is not already locked, Ext Read Multi Block(1) (cmd code 33h) @00h/01h b1: W if Block 01h is not already locked. Fast Read Multi Block(1) (cmd code C3h) @00h/01h Fast Ext Read Multi Block(1) (cmd code C5h) @00h/01h Get Multi Block SS (cmd code 2Ch) @00h/01h Ext Get Multi Block SS (cmd code 3Ch) @00h/01h 1. With option flag set to 1. Table 55. LOCK_CCFILE Bit Name b0 LCKBCK0 b1 LCKBCK1 b7-b2 RFU Note: Function Factory value 0: Block @ 00h is not Write locked 0b 1: Block @ 00h is Write locked 0: Block @ 01h is not Write locked 0b 1: Block @ 01h is Write locked - 000000b Refer to Table 13. System configuration memory map for the LOCK_CCFILE register. Table 56. LOCK_CFG access I2C RF Command Type Read Configuration (cmd code A0h) @0Fh Write Configuration (cmd code A1h) @0Fh R always, W if RF configuration security session is open and configuration not locked Address Type E2=1, E1=1, 000Fh R always, W if I2C security session is open Table 57. LOCK_CFG Bit Name b0 LCK_CFG b7-b1 RFU Note: DS13519 - Rev 4 Function 0: Configuration is unlocked Factory value 0b 1: Configuration is locked - 0000000b Refer to Table 13. System configuration memory map for the LOCK_CFG register. page 55/203 ST25DV04KC ST25DV16KC ST25DV64KC Data protection Table 58. I2C_PWD access I2C RF Command Type Address No access Type E2=1, E1=1, 0900h to 0907h, Present/Write password command format. R if I2C security session is open, W if I2C security session is open Table 59. I2C_PWD Factory value I2C address Bit 0900h b7-b0 Byte 7 (MSB) of password for I2C security session 00h 0901h b7-b0 Byte 6 of password for I2C security session 00h Name 0902h b7-b0 0903h b7-b0 0904h b7-b0 Function security session 00h Byte 4 of password for I2C security session 00h Byte 3 of password for I2C security session 00h Byte 5 of password for I2C_PWD I2C I2C 0905h b7-b0 Byte 2 of password for security session 00h 0906h b7-b0 Byte 1 of password for I2C security session 00h 0907h b7-b0 Byte 0 (LSB) of password for I2C security session 00h Note: Refer to Table 13. System configuration memory map for the I2C_PWD register. Table 60. RF_PWD_0 access I2C RF Command Present Password (cmd code B3h) Write Password (cmd code B1h) Type Address WO if RF configuration security session is open Type No access Table 61. RF_PWD_0 Bit b7-b0 Note: DS13519 - Rev 4 Name RF_PWD_0 Function Factory value Byte 0 (LSB) of password for RF configuration security session 00h Byte 1 of password for RF configuration security session 00h Byte 2 of password for RF configuration security session 00h Byte 3 of password for RF configuration security session 00h Byte 4 of password for RF configuration security session 00h Byte 5 of password for RF configuration security session 00h Byte 6 of password for RF configuration security session 00h Byte 7 (MSB) of password for RF configuration security session 00h Refer to Table 13. System configuration memory map for the RF_PWD_0 register. page 56/203 ST25DV04KC ST25DV16KC ST25DV64KC Data protection Table 62. RF_PWD_1 access I2C RF Command Type Present Password (cmd code B3h) Address WO if RF configuration security session is open with RF password 1 Write Password (cmd code B1h) Type No access Table 63. RF_PWD_1 Bit b7-b0 Note: Name Function RF_PWD_1 Factory value Byte 0 (LSB) of password 1 for RF user security session 00h Byte 1 of password 1 for RF user security session 00h Byte 2 of password 1 for RF user security session 00h Byte 3 of password 1 for RF user security session 00h Byte 4 of password 1 for RF user security session 00h Byte 5 of password 1 for RF user security session 00h Byte 6 of password 1 for RF user security session 00h Byte 7 (MSB) of password 1 for RF user security session 00h Refer to Table 13. System configuration memory map for the RF_PWD_1 register. Table 64. RF_PWD_2 access I2C RF Command Present Password (cmd code B3h) Write Password (cmd code B1h) Type Address WO if RF user security session is open with RF password 2 Type No access Table 65. RF_PWD_2 Bit b7-b0 Note: DS13519 - Rev 4 Name RF_PWD_2 Function Factory value Byte 0 (LSB) of password 2 for RF user security session 00h Byte 1 of password 2 for RF user security session 00h Byte 2 of password 2 for RF user security session 00h Byte 3 of password 2 for RF user security session 00h Byte 4 of password 2 for RF user security session 00h Byte 5 of password 2 for RF user security session 00h Byte 6 of password 2 for RF user security session 00h Byte 7 (MSB) of password 2 for RF user security session 00h Refer to Table 13. System configuration memory map for the RF_PWD_2 register. page 57/203 ST25DV04KC ST25DV16KC ST25DV64KC Data protection Table 66. RF_PWD_3 access I2C RF Command Type Present Password (cmd code B3h) Address WO if RF user security session is open with RF password 3 Write Password (cmd code B1h) Type No access Table 67. RF_PWD_3 Bit b7-b0 Note: Name Function RF_PWD_3 Factory value Byte 0 (LSB) of password 3for RF user security session 00h Byte 1 of password 3 for RF user security session 00h Byte 2 of password 3 for RF user security session 00h Byte 3 of password 3 for RF user security session 00h Byte 4 of password 3 for RF user security session 00h Byte 5 of password 3 for RF user security session 00h Byte 6 of password 3 for RF user security session 00h Byte 7 (MSB) of password 3 for RF user security session 00h Refer to Table 13. System configuration memory map for the RF_PWD_3 register. Table 68. I2C_SSO_Dyn access I2C RF Command Type Address No access Type E2=0, E1=1, 2004h RO Table 69. I2C_SSO_Dyn Bit Name b7-b1 RFU Function - Factory value 0b 0: I2C security session close b0 I2C_SSO 1: I2C security session open 0b (Set or reset via I2C Present password command) Note: Refer to Table 13. System configuration memory map for the I2C_SSO_Dyn register. 5.6.2 Passwords and security sessions ST25DVxxKC provides protection of user memory and system configuration static registers. RF user and I2C host can access those protected data by opening security sessions with the help of passwords. Access rights is more restricted when security sessions are closed, and less restricted when security sessions are open. Dynamic registers and fast transfer mode mailbox are not protected by any security session. There is three type of security sessions, as shown in the table below: DS13519 - Rev 4 page 58/203 ST25DV04KC ST25DV16KC ST25DV64KC Data protection Table 70. Security session type Security session Open by presenting Right granted when security session is open, and until it is closed RF password 1, 2 or 3 (1) RF user RF configuration I2C RF user access to protected user memory as defined in RFAiSS registers (RF_PWD_1, RF_PWD_2, RF user write access to RF password 1, 2 or 3(2) RF_PWD_3) RF password 0 (RF_PWD_0) I2C password (I2C_PWD) RF user write access to configuration static registers RF user write access to RF password 0 I2C host access to protected user memory as defined in I2CSS register I2C host write access to configuration static registers I2C host write access to I2C password 1. Password number must be the same as the one selected for protection. 2. Write access to the password number corresponding to the password number presented. All passwords are 64-bit long, and default factory passwords value is 0000000000000000h. The ST25DVxxKC passwords management is organized around RF and I2C dedicated set of commands to access the dedicated registers in system configuration area where password values are stored. The dedicated password commands in RF mode are: • Write Password command (code B1h): see Section 7.6.36 Present Password. • Present Password command (code B3h): see Section 7.6.36 Present Password. RF user possible actions for security sessions are: • Open RF user security session: Present Password command, with password number 1, 2 or 3 and the valid corresponding password • Write RF password: Present Password command, with password number (0, 1, 2 or 3) and the current valid corresponding password. Then Write Password command, with same password number (0, 1, 2 or 3) and the new corresponding password. • Close RF user security session: Present Password command, with a different password number than the one used to open session or any wrong password. Or remove tag from RF field (POR). Presenting a password with an invalid password number doesn't close the session. • Open RF configuration security session: Present Password command, with password number 0 and the valid password 0. • Close RF configuration security session: Present Password command, with a password number different than 0, or password number 0 and wrong password 0. Or remove tag from RF field (POR). Presenting a password with an invalid password number doesn't close the session. Opening any new RF security session (user or configuration) automatically close the previously open one (even if it fails). There is no interaction between I2C and RF security sessions. Both are independent, and can run in parallel. Caution: DS13519 - Rev 4 If ST25DVxxKC is powered through VCC, removing VCC during an RF command can abort the command. As a consequence, before writing a new password, RF user should check if VCC is ON, by reading EH_CTRL_Dyn register bit 3 (VCC_ON), and eventually ask host to maintain or to shut down VCC, before issuing the Write Password command in order to avoid password corruption. To make the application more robust, it is recommended to use addressed or selected mode during write password operations to get the traceability of which tags/UID have been programmed. page 59/203 ST25DV04KC ST25DV16KC ST25DV64KC Data protection Figure 28. RF security sessions management ST25DV out of RF field RF field ON RF field OFF All RF security sessions closed Any other command Present any RF password not OK(1) Present RF_PWD_x OK Any other command RF security session x opened (y closed) Present RF_PWD_x OK Any other command Present RF_PWD_y OK RF security session y opened (x closed) 1. Presenting a password with an invalid password number doesn't close the session. The dedicated password commands in I2C mode are: • I2C Write Password command: see Section 6.6.2 I2C write password command description. • I2C Present Password command: see Section 6.6.1 I2C present password command description. I2C host possible actions for security sessions are: • Open I 2 C security session: I2C Present Password command with valid I2C password. • Write I 2 C password: I2C Present Password command with valid I2C password. Then I2C Write Password command with new I2C password. • Close I 2 C security session: I2C Present Password command with wrong I2C password. Or remove tag VCC power supply (POR). • Check if I 2 C security session is open: I2C host can read the current status (open or closed) of I2C security session by reading the I2C_SSO_Dyn register. There is no interaction between I2C and RF security sessions. Both are independent and can run in parallel. DS13519 - Rev 4 page 60/203 ST25DV04KC ST25DV16KC ST25DV64KC Data protection Figure 29. I2C security sessions management VCC OFF VCC ON Any other command I2C security session closed I2C_SSO=00h Present I2C_PWD not OK Any other command 5.6.3 VCC OFF Present I2C_PWD OK I2C security session opened I2C_SSO=01h User memory protection On factory delivery, areas are not protected. Each area can be individually protected in read and/or write access from RF and I2C. Area 1 is always readable (from RF and I2C). Furthermore, RF blocks 0 and 1 (I2C bytes 0000h to 0007h) can be independently write locked. User memory protection from RF access In RF mode, each memory area of the ST25DVxxKC can be individually protected by one out of three available passwords (RF password 1, 2 or 3), and each area can also have individual Read/Write access conditions. For each area, an RFAiSS register is used to: • • Select the RF password that unlock the RF user security session for this area Select the protection against read and write operations for this area (See Table 45. RFA1SS, Table 47. RFA2SS, Table 49. RFA3SS, and Table 51. RFA4SS for details about available read and write protections). Note: DS13519 - Rev 4 Setting 00b in PWD_CTRL_Ai field means that RF user security session cannot be open by any password for the corresponding area. When updating RFAiSS registers, the new protection value is effective immediately after the register write completion. page 61/203 ST25DV04KC ST25DV16KC ST25DV64KC Data protection • Rf blocks 0 and 1 are exceptions to this protection mechanism: – RF blocks 0 and 1 can be individually write locked by issuing a (Ext) Lock Single Block RF command. Once locked, they cannot be unlock through RF. LOCK_CCFILE register is automatically updated when using (Ext) Lock Single Block command. – An RF user needs no password to lock blocks 0 and/or 1. – Locking blocks 0 and/or 1 is possible even if the configuration is locked (LOCK_CFG=1). – Locking blocks 0 and/or 1 is possible even if the area is write locked. – Unlocking area1 (through RFA1SS register) does not unlock blocks 0 and 1 if they have been locked though (Ext) Lock Block command. – Note: Once locked, the RF user cannot unlock blocks 0 and/or 1 (can be done by I2C host). When areas size are modified (ENDAi registers), RFAiSS registers are not modified. User memory protection from I2C access In I2C mode, each area can also have individual Read/Write access conditions, but only one I2C password is used to unlock I2C security session for all areas. The I2CSS register is used to set protection against read and write operation for each area (see Table 53. I2CSS for details about available read and write protections). When updating I2CSS registers, the new protection value is effective immediately after the register write completion. I2C user memory Bytes 0000h to 0003h (RF Block 0) and 0004h to 0007h (RF Block 1) can be individually locked and unlocked by writing in the LOCK_CCFILE register (by group of 4 Bytes), independently of Area 1 protection. Unlocking Area 1 (through I2CSS register) does not unlock those bytes if they have been locked though the LOCK_CCFILE register. Note: When areas size are modified (ENDAi registers), I2CSS register is not modified. Retrieve the security status of a user memory block or byte RF user can read a block security status by issuing following RF commands: • (Ext) Get Multiple Blocks Security Status command. • (Ext) (Fast) Read Single Block with option flag set to 1. • (Ext) (Fast) Read Multiple Blocks with option flag set to 1. ST25DV responds with a Block security status containing a Lock_bit flag as specified in ISO 15693 standard. This lock_bit flag is set to one if block is locked against write. Lock_bit flag value may vary if corresponding RF user security session is open or closed. I2C host can retrieve a block security status by reading the I2CSS register to get security status of the corresponding area and by reading the I2C_SSO_Dyn register to know if I2C security session is open or closed. For blocks 0 and 1 (Bytes 0000h to 0007h in I2C user memory), lock status can also be read in the LOCK_CCFILE register. 5.6.4 System memory protection By default, system memory (static registers) is write protected, both in RF and I2C. I2C host must open the I2C security session (by presenting a valid I2C password) to enable write access to system configuration static registers. I2C host doesn’t have read or write access to RF passwords. By default, I2C host can read all system configuration static registers (except RF passwords) In RF, to enable write access to system configuration static registers, RF user must open the RF configuration security session (by presenting a valid RF password 0) and system configuration must not be locked (LOCK_CFG=00h). RF doesn’t have read or write access to I2C password. By default, RF user can read all system configuration static registers, except all passwords, LOCK_CCFILE, LOCK_DSFID and LOCK_AFI. RF configuration lock: DS13519 - Rev 4 page 62/203 ST25DV04KC ST25DV16KC ST25DV64KC Device parameter registers • • • RF write access to system configuration static registers can be locked by writing 01h in the LOCK_CFG register (by RF or I2C). RF user cannot unlock system configuration if LOCK_CFG=01h, even after opening RF configuration security session (only I2C host can unlock system configuration). When system configuration is locked (LOCK_CFG=01h), it is still possible to change RF passwords (0 to 3). Device identification registers: • AFI and DFSID registers can be independently locked by RF user, issuing respectively a Lock AFI and a Lock DSFID command. Lock is definitive: once locked, AFI and DSFID registers cannot be unlocked (either by RF or I2C). System configuration locking mechanism (LOCK_CFG=01h) does not lock AFI and DSFID registers. • Other device identification registers (MEM_SIZE, BLK_SIZE, IC_REF, UID, IC_REV) are read only registers for both RF and I2C. 5.7 Device parameter registers Table 71. LOCK_DSFID access I2C RF Command Type Address Lock DSFID (cmd code 2Ah) WO if DSFID not locked Type E2=1, E1=1, 0010h RO Table 72. LOCK_DSFID Bit Name b0 LOCK_DSFID b7-b1 RFU Note: Function Factory value 0: DSFID is not locked 0b 1: DSFID is locked - 0000000b Refer to Table 13. System configuration memory map for the LOCK_DSFID register. Table 73. LOCK_AFI access I2C RF Command Type Address Lock AFI (cmd code 28h) WO if AFI not locked E2=1, E1=1, 0011h Type RO Table 74. LOCK_AFI Bit Name b0 LOCK_AFI b7-b1 RFU Note: DS13519 - Rev 4 Function 0: AFI is not locked Factory value 0b 1: AFI is locked - 0000000b Refer to Table 13. System configuration memory map for the LOCK_AFI register. page 63/203 ST25DV04KC ST25DV16KC ST25DV64KC Device parameter registers Table 75. DSFID access I2C RF Command Type Address Type Inventory (cmd code 01h) Get System Info (cmd code 2Bh) R always, W if DSFID not locked Ext Get System Info (cmd code 3Bh) E2=1, E1=1, 0012h RO Write DSFID (cmd code 28h) Table 76. DSFID Bit Name b7-b0 DSFID Note: Function Factory value ISO/IEC 15693 Data Storage Format Identifier 00h Refer to Table 13. System configuration memory map for the DSFID register. Table 77. AFI access I2C RF Command Type Address Type Inventory (cmd code 01h) Get System Info (cmd code 2Bh) R always, W if AFI not locked Ext Get System Info (cmd code 3Bh) E2=1, E1=1, 0013h RO Write AFI (cmd code 27h) Table 78. AFI Bit Name b7-b0 AFI Note: Function Factory value ISO/IEC 15693 Application Family Identifier 00h Refer to Table 13. System configuration memory map for the AFI register. Table 79. MEM_SIZE access I2C RF Command Get System Info (cmd code 2Bh) Type (1) Ext Get System Info (cmd code 3Bh) RO Address E2=1, E1=1, 0014h to 0015h Type RO 1. Only ST25DV04KC DS13519 - Rev 4 page 64/203 ST25DV04KC ST25DV16KC ST25DV64KC Device parameter registers Table 80. MEM_SIZE I2C Address Bit Name Function Factory value ST25DV04KC: 7Fh 0014h Address 0014h: LSB byte of the memory size expressed in RF blocks b7-b0 ST25DV64KC: FFh MEM_SIZE 0015h ST25DV04KC: 00h Address 0015h: MSB byte of the memory size expressed in RF blocks b7-b0 ST25DV16KC: FFh ST25DV16KC: 01h ST25DV64KC: 07h Note: Refer to Table 13. System configuration memory map for the MEM_SIZE register. Table 81. BLK_SIZE access I2C RF Command Get System Info (cmd code 2Bh) Type Address Type (1) RO Ext Get System Info (cmd code 3Bh) E2=1, E1=1, 0016h RO 1. Only ST25DV04KC Table 82. BLK_SIZE Bit Name b7-b0 BLK_SIZE Note: Function Factory value RF user memory block size 03h Refer to Table 13. System configuration memory map for the BLK_SIZE register. Table 83. IC_REF access I2C RF Command Get System Info (cmd code 2Bh) Ext Get System Info (cmd code 3Bh) Type Address RO E2=1, E1=1, 0017h Type RO Table 84. IC_REF Bit Name Function Factory value ST25DV04KC-IE: 50h ST25DV16KC-IE: 51h b7-b0 IC_REF ISO/IEC 15693 IC Reference ST25DV64KC-IE: 51h ST25DV04KC-JF: 50h ST25DV16KC-JF: 51h ST25DV64KC-JF: 51h Note: DS13519 - Rev 4 Refer to Table 13. System configuration memory map for the IC_REF register. page 65/203 ST25DV04KC ST25DV16KC ST25DV64KC Device parameter registers Table 85. UID access I2C RF Command Type Address Type Inventory (cmd code 01h) Get System Info (cmd code 2Bh) E2=1, E1=1, 0018h to 001Fh RO RO Ext Get System Info (cmd code 3Bh) Table 86. UID I2C Address Bit Name Factory 2alue Function 0018h ISO/IEC 15693 UID byte 0 (LSB) 0019h ISO/IEC 15693 UID byte 1 001Ah ISO/IEC 15693 UID byte 2 001Bh ISO/IEC 15693 UID byte 3 001Ch ISO/IEC 15693 UID byte 4 IC manufacturer serial number ST25DV04KC-IE: 50h b7-b0 UID ST25DV16KC-IE: 51h 001Dh ISO/IEC 15693 UID byte 5: ST Product code ST25DV64KC-IE: 51h ST25DV04KC-JF: 52h ST25DV16KC-JF: 53h ST25DV64KC-JF: 53h 001Eh ISO/IEC 15693 UID byte 6: IC Mfg code 02h 001Fh ISO/IEC 15693 UID byte 7 (MSB) E0h Note: Refer to Table 13. System configuration memory map for the UID register. Table 87. IC_REV access I2C RF Command Type Address No access E2=1, E1=1, 0020h Type RO Table 88. IC_REV Bit Name b7-b0 IC_REV Note: DS13519 - Rev 4 Function IC revision Factory value Depending on revision Refer to Table 13. System configuration memory map for the IC_REV register. page 66/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C operation 6 I²C operation 6.1 I²C protocol The device supports the I²C protocol. This is summarized in Figure 30. I²C bus protocol. Any device that sends data to the bus is defined as a transmitter, and any device that reads data is defined as a receiver. The device that controls the data transfer is known as the bus master, and the other as the slave device. A data transfer can only be initiated by the bus master, which also provides the serial clock for synchronization. The ST25DVxxKC device is a slave in all communications. Figure 30. I²C bus protocol STOP Condition 6.1.1 Start condition Start is identified by a falling edge of serial data (SDA) while the serial clock (SCL) is stable in the high state. A Start condition must precede any data transfer command. The device continuously monitors (except during a write cycle) the SDA and the SCL for a Start condition, and does not respond unless one is given. DS13519 - Rev 4 page 67/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C timeout 6.1.2 Stop condition Stop is identified by a rising edge of serial data (SDA) while the serial clock (SCL) is stable and driven high. A Stop condition terminates communication between the device and the bus master. A Read command that is followed by NoAck can be followed by a Stop condition to force the device into the Standby mode. A Stop condition at the end of a Write command triggers the internal write cycle. 6.1.3 Acknowledge bit (ACK) The acknowledge bit is used to indicate a successful byte transfer. The bus transmitter, whether a bus master or a slave device, releases the serial data (SDA) after sending eight bits of data. During the 9th clock pulse period, the receiver pulls the SDA low to acknowledge the receipt of the eight data bits. 6.1.4 Data input During data input, the device samples serial data (SDA) on the rising edge of the serial clock (SCL). For correct device operation, the SDA must be stable during the rising edge of the SCL, and the SDA signal must change only when the SCL is driven low. 6.2 I²C timeout During the execution of an I²C operation, RF communications are not possible. To prevent RF communication freezing due to inadvertent indeterminate instructions sent to the I²C bus, the ST25DVxxKC features a timeout mechanism that automatically resets the I²C logic block. 6.2.1 I2C timeout on Start condition I2C communication with the ST25DVxxx starts with a valid Start condition, followed by a device select code. If the delay between the Start condition and the following rising edge of the serial clock (SCL) that samples the most significant of the device select exceeds the tSTART_OUT time (see Table 249. I²C DC characteristics up to 85 °C and Table 250. I2C DC characteristics up to 125 °C), the I²C logic block is reset and further incoming data transfer is ignored until the next valid Start condition. Figure 31. I²C timeout on Start condition SCL SDA tSTART_OUT Start condition 6.2.2 I2C timeout on clock period During data transfer on the I2C bus, if the serial clock pulse width high (tCHCL) or serial clock pulse width low (tCLCH) exceeds the maximum value specified in Table 251. I2C AC characteristics up to 85 °C and Table 252. I2C AC characteristics up to 125 °C, the I2C logic block is reset and any further incoming data transfer is ignored until the next valid Start condition. DS13519 - Rev 4 page 68/203 ST25DV04KC ST25DV16KC ST25DV64KC Device addressing 6.3 Device addressing To start a communication between the bus master and the slave device, the bus master must initiate a Start condition. Following this, the bus master sends the device select code, shown in Section B.1 Device select codes (on serial data (SDA), the most significant bit first). The device select code consists of a 4-bit device type identifier (I2C_DEVICE_CODE) and a 3-bit Chip Enable “Address” (E2, E1, E0). Chip Enable bits E2 and E1 are used to select ST25DVxxKC memory to address (user or system) and to send special I2C "RFSwitchOff"and I2C "RFSwitchOn" commands. The eighth bit is the Read/Write bit (RW). It is set to 1 for read and to 0 for write operations. Refer to the table below. Table 89. Device select code E2 E1 E0 R/notW Bit 3 Bit 2 Bit 1 Bit 0 0 1 1 1 I2C RFSwitchOn 0 0 I2C RFSwitchOff 1 0 ST25DvxxKC function I2C device type identifier Bit 7 Bit 6 Bit 5 Bit 4 User memory System memory I2C_DEVICE_CODE[3:0] 1/0 I2C_E0 1/0 0 0 The 4-bit device type identifier and the chip enable bit E0 are configurable through the I2C_CFG static register. Table 90. I2C_CFG access RF Command I2C Type No access Address E2=1, E1=1, 000Eh Type R always, W if I2C security session is open Table 91. I2C_CFG Note: Bit Name b3-b0 I2C_DEVICE_CODE b4 I2C_E0 b5 I2C_RF_SWITCHOFF_EN b7-b6 RFU Function Device code (bits [7:4]) of I2C slave address E0 bit (bit 1) of I2C slave address Factory value 1010b 1b 0: I2C cannot switch off/on RF with I2C « RFSwitchOff/On » commands. 1: I2C can switch off/on RF with i2C « RFSwitchOfff/On » commands - 0b 00b Refer to Table 13. System configuration memory map for the UID register. Change in I2C_CFG command is immediate after STOP condition of the I2C write to this register. Next I2C accesses shall use the new value of I2C_DEVICE_CODE and I2C_E0 to address the ST25DVxxKC. If a match occurs on the device select code, the corresponding device gives an acknowledgment on serial data (SDA) during the ninth bit time. If the device does not match the device select code, it deselects itself from the bus, and goes into Standby mode. DS13519 - Rev 4 page 69/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C Write operations Table 92. Operating modes Mode RW bit Current address read Random address read 6.4 1 Bytes Initial sequence 1 0 Start, device select, RW = 1 Start, device select, RW = 0, address 1 1 reStart, device select, RW = 1 Sequential read 1 ≥1 Similar to current or random address read Byte write 0 1 Start, device select, RW = 0 Sequential write 0 ≤ 256 bytes Start, device select, RW = 0 I²C Write operations Following a Start condition, the bus master sends a device select code with the Read/Write bit (RW) reset to 0. The device acknowledges this, and waits for two address bytes. The device responds to each address byte with an acknowledge bit, and then waits for the data byte. Each data byte in the memory has a 16-bit (two-byte wide) address. The most significant byte (see Table 93. Address most significant byte) is sent first, followed by the least significant byte (see Table 94. Address least significant byte). Bits b15 to b0 form the address of the byte in memory. Table 93. Address most significant byte b15 b14 b13 b12 b11 b10 b9 b8 Table 94. Address least significant byte b7 b6 b5 b4 b3 b2 b1 b0 When the bus master generates a Stop condition immediately after the Ack bit (in the tenth-bit time slot), either at the end of a byte write or a sequential write, the internal write cycle is triggered. A Stop condition at any other time slot does not trigger the internal write cycle. After the Stop condition, the delay tW, and the successful completion of a Write operation, the device’s internal address counter is incremented automatically, to point to the next byte address after the last one that was modified. After an unsuccessful write operation, ST25DVxxKC enters in I²C dead state: internal address counter is not incremented, and is waiting for a full new I²C instruction (address counter stops to be incremented after the first NoAck bit). During the internal write cycle, the serial data (SDA) signal is disabled internally, and the device does not respond to any requests. Caution: I²C Writing data in user memory (EEPROM), transit via the 256 bytes fast transfer mode's buffer. Consequently fast transfer mode must be deactivated before starting any write operation in user memory, otherwise the command is NotACK, the programming is not done and device goes in standby mode. 6.4.1 I2C Byte write After the device select code and the address bytes, the bus master sends one data byte. If byte write is not inhibited, the device replies with Ack. If byte write is inhibited, the device replies with NoAck. The bus master terminates the transfer by generating a Stop condition (see Figure 32. Write mode sequences when write is not inhibited). For byte write in EEPROM (user memory or system configuration), internal programming starts after the STOP condition, for a duration of tW (as defined in Table 249. I²C DC characteristics up to 85 °C and Table 250. I2C DC characteristics up to 125 °C). DS13519 - Rev 4 page 70/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C Write operations For writes in fast transfer mode buffer or Dynamic registers, internal programming is immediate at STOP condition. If byte write is inhibited, the device replies with NoAck. The bus master terminates the transfer by generating a Stop condition and byte location not is modified (see Figure 33. Write mode sequences when write is inhibited). Byte write is inhibited if byte complies with one of the following conditions: • Byte is in user memory and is write protected with LOCK_CCFILE register. 6.4.2 • • • Byte is in user memory and is write protected with I2CSS register, and I2C security session is closed. Byte is in user memory and fast transfer mode is activated. Byte is in system memory and is a Read Only register. • • • • • Byte is in system memory and I2C security session is closed. Byte is in fast transfer mode’s mailbox and is not the first Byte of mailbox. Byte is in fast transfer mode’s mailbox and mailbox is busy. Byte is in fast transfer mode’s mailbox and fast transfer mode is not activated. Byte is in dynamic registers area and is a Read Only register. I2C Sequential write The I2C sequential write allows up to 256 bytes to be written in one command, provided they are all located in the same user memory area and are all located in writable addresses. After each byte is transferred, the internal byte address counter is incremented. For each byte sent by the bus master: • If byte write is not inhibited, the device replies with Ack. • If byte write is inhibited, the device replies with NoAck. The transfer is terminated by the bus master generating a Stop condition: • For writes in EEPROM (user memory or system configuration), if all bytes have been Ack'ed, internal programming of all bytes starts after the stop condition, for a duration dependent on the number of bytes to write (see below). • For writes in fast transfer mode buffer or Dynamic registers, if all bytes have been Ack'ed, internal programming is done immediately after the stop condition. • If some bytes have been NotAck’ed, no internal programming is done (0 byte written). Byte write is inhibited if byte complies with conditions described in Section 6.4.1 I2C Byte write, in addition: • Byte is in user memory but does not belong to same area than previous received byte (area border crossing is forbidden). • 256 write occurrence have already been reached in the same sequential write. • More than one byte is trying to be written in system area. Seen from I2C, user memory is internally organized as rows of 16 bytes. Data located in the same row all share the same most significant memory address bits b16-b14. I2C sequential write programming time in the EEPROM memory is dependent on this internal organization: total programming time is the I2C write time tW (as defined in Table 249. I²C DC characteristics up to 85 °C and Table 250. I2C DC characteristics up to 125 °C) multiplied by the number of internal EEPROM pages where the data must be programmed, including incomplete pages. This means an I2C sequential write allows from 1 up to 16 bytes to be programmed in EEPROM in tW, provided that they all share the same most significant memory address bits b16-b4. For example, a successful I2C sequential write of 40 Bytes, starting at address 0010h, has a programming time (starting after STOP condition) of 3 x tW. An I2C sequential write of 40 Bytes, starting at address 0008h, has a programming time of 4 x tW. DS13519 - Rev 4 page 71/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C Write operations Figure 32. Write mode sequences when write is not inhibited ACK Start Dev Select Byte address ACK Data in ACK Byte address ACK ACK Data in N Data in 2 Data in 1 ACK Stop Byte address Dev Select Start Note: Byte address ACK R/W ACK Sequential Write ACK Stop Byte Write ACK R/W N ≤ 256 Figure 33. Write mode sequences when write is inhibited ACK Byte Write Byte address Start Dev select Data in ACK Byte address ACK Byte address NO ACK Data in 1 Data in 2 R/W NO ACK NO ACK Data in N Stop Sequential Write(cont'd) Byte address NO ACK R/W ACK Sequential Write ACK Stop Start Dev select ACK Note: N ≤ 256 6.4.3 Minimizing system delays by polling on ACK During the internal write cycle, the device disconnects itself from the bus, and writes a copy of the data from its internal latches to the memory cells. The maximum I²C write time (tw) is shown in Table 251. I2C AC characteristics up to 85 °C and Table 252. I2C AC characteristics up to 125 °C, but the typical time is shorter. To make use of this, a polling sequence can be used by the bus master. The sequence, as shown in Figure 34. Write cycle polling flowchart using ACK is: • Initial condition: a write cycle is in progress. • Step 1: the bus master issues a Start condition followed by a device select code (the first byte of the new instruction). • Step 2: if the device is busy with the internal write cycle, no Ack is returned and the bus master goes back to Step 1. If the device has terminated the internal write cycle, it responds with an Ack, indicating that the device is ready to receive the second part of the instruction (the first byte of this instruction having been sent during Step 1). DS13519 - Rev 4 page 72/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C read operations Note: There is no need of polling when writing in dynamic registers or in mailbox, since programming time is null. Figure 34. Write cycle polling flowchart using ACK Write cycle in progress Start condition Device select with RW = 0 NO ACK returned YES First byte of instruction with RW = 0 already decoded by the device NO Next Operation is addressing the memory YES Send Address and Receive ACK Stop NO 6.5 StartCondition YES Data for the Write operation Device select with RW = 1 Continue the Write operation Continue the Random Read operation I²C read operations Read operation in user memory is performed successfully only if: • Area to which the byte belongs is not read protected by the I2CSS register. • Area to which the byte belongs is read protected by the I2CSS register, but I²C security session is open. Read operations in system memory and dynamic registers are done independently of any protection mechanism, except I2C_PWD register which needs I²C security session to be open first. Read operation in fast transfer mode’s mailbox is performed successfully only if fast transfer mode is activated. If read is not successful, ST25DVxxKC releases the bus and I²C host reads byte value FFh. After the successful completion of a read operation, the device’s internal address counter is incremented by one, to point to the next byte address. After an unsuccessful read operation, ST25DVxxKC enters in I²C dead state: internal address counter is not incremented, and ST25DVxxKC is waiting for a full new I²C instruction. DS13519 - Rev 4 page 73/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C read operations 6.5.1 Random address read A dummy write is first performed to load the address into this address counter (as shown in Figure 35. Read mode sequences) but without sending a Stop condition. Then, the bus master sends another Start condition (aka reStart), and repeats the device select code, with the Read/Write bit (RW) set to 1. The device acknowledges this, and outputs the contents of the addressed byte. The bus master must not acknowledge the byte, and terminates the transfer with a Stop condition. 6.5.2 Current address read For the Current address read operation, following a Start condition, the bus master only sends a device select code with the Read/Write bit (RW) set to 1. The device acknowledges this, and outputs the byte addressed by the internal address counter. The counter is then incremented. The bus master terminates the transfer with a Stop condition, as shown in the figure below, without acknowledging the byte. Figure 35. Read mode sequences ACK NO ACK Current address read Data out Stop Start Dev sel R/W ACK ACK ACK ACK NO ACK Random address read Byte addr Dev sel * R/W ACK ACK ACK Data out Stop Byte addr Start Start Dev sel * R/W NO ACK Sequential current read Data out 1 Data out N Stop Start Dev sel R/W ACK ACK ACK ACK ACK Sequential random read Byte addr R/W ACK Byte addr Dev sel * Start Start Dev sel * Data out1 R/W NO ACK Stop Data out N 6.5.3 Sequential read access This operation can be used after a Current address read or a Random address read. The bus master does acknowledge the data byte output, and sends additional clock pulses so that the device continues to output the next byte in sequence. To terminate the stream of bytes, the bus master must not acknowledge the last byte, and must generate a Stop condition, as shown in Figure 35. Read mode sequences. DS13519 - Rev 4 page 74/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C password management The output data comes from consecutive addresses, with the internal address counter automatically incremented after each byte output. Sequential read in user memory: • Sequential read can cross area borders. Device continue to output data bytes until the internal address counter is reaching a non readable address (either address that don't exist or if read protected with I2C security session closed). • When internal address counter reach a non readable address, device releases the SDA line and continues to output FFh. • There is no roll over at the end of user memory. When internal address counter reaches end of user memory, device continue to output bytes located in Dynamic registers area, until it reaches a non readable address. Sequential read in system memory: • There is no roll over after reaching end of system memory (ST25DVxxKC returns only FFh after last system memory byte address). Sequential read in dynamic registers: • It is possible to read sequentially dynamic register and fast transfer mode’s mailbox (contiguous I2C addresses). There is no roll over at the end of dynamic registers area. Sequential read in mailbox: • There is no roll over at the end of the mailbox (ST25DVxxKC returns only FFh after last mailbox memory byte address). 6.5.4 Acknowledge in read mode For all Read commands, the device waits, after each byte read, for an acknowledgement during the ninth bit time. If the bus master does not drive serial data (SDA) low during this time, the device terminates the data transfer and switches to its Standby mode. 6.6 I²C password management The controls I²C security session using an I²C 64-bit password. This I²C password is managed with two I²C dedicated commands: I²C present password and I²C write password. 6.6.1 I2C present password command description The I2C present password command is used in I2C mode to present the password to the ST25DVxxKC. This is used to open I2C security session or to allow I2C password modification (see Section 5.6 Data protection for detailed explanation about password usage). Following a Start condition, the bus master sends a device select code with the Read/ Write bit (R W ) reset to 0 and the Chip Enable bit E2 at 1 and E1 at 1. The device acknowledges this, as shown in Figure 36. I2C Present Password Sequence, and waits for two I2C password address bytes, 09h and 00h. The device responds to each address byte with an acknowledge bit, and then waits for the eight password data bytes, the validation code, 09h, and a resend of the eight password data bytes. The most significant byte of the password is sent first, followed by the least significant bytes. It is necessary to send the 64-bit password twice to prevent any data corruption during the sequence. If the two 64-bit passwords sent are not exactly the same, the ST25DVxxKC does not start the internal comparison. When the bus master generates a Stop condition, immediately after the Ack bit (during the tenth bit time slot), the ST25DVxxKC compares the 64 received data bits with the 64 bits of the stored I2C password. If the values match, the I2C security session is open, and the I2C_SSO_Dyn register is set to 01h. If the values do not match, the I2C security session is closed and I2C_SSO_dyn register is set to 00h. I2C_SSO_Dyn is a Dynamic register, it can be checked via I2C host to know If I2C security session is open. DS13519 - Rev 4 page 75/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C password management Figure 36. I2C Present Password Sequence Start Ack Password Address 09h R/W Ack Ack Password [63:56] Validation code 09h Ack Ack Password [63:56] Password Address 00h Ack Ack Password [47:40] Password [55:48] Ack Password [55:48] Ack Password [47:40] Ack Password [39:32] Ack Ack Password [39:32] Password [31:24] Ack Ack Password [23:16] Password [31:24] Ack Password [15:08] Ack Password [7:0] Password [15:8] Ack Password [7:0] Ack generated during 9th bit time slot. 6.6.2 Ack Ack Password [23:16] Stop Ack Device select code I2C write password command description The I2C write password command is used to update the I2C password value (register I2C_PWD). It cannot be used to update any of the RF passwords. After the write cycle, the new I2C password value is automatically activated. The I2C password value can only be modified after issuing a valid I2C present password command. Following a Start condition, the bus master sends a device select code with the Read/Write bit (RW) reset to 0 and the Chip Enable bit E2 at 1 and E1 at 1. The device acknowledges this, as shown in Figure 37. I2C Write Password Sequence, and waits for the two I2C password address bytes, 09h and 00h. The device responds to each address byte with an acknowledge bit, and then waits for the four password data bytes, the validation code, 07h, and a resend of the eight password data bytes. The most significant byte of the password is sent first, followed by the least significant bytes. It is necessary to send twice the 64-bit password to prevent any data corruption during the write sequence. If the two 64-bit passwords sent are not exactly the same, the ST25DVxxKC does not modify the I2C password value. When the bus master generates a Stop condition immediately after the Ack bit (during the tenth bit time slot), the internal write cycle is triggered. A Stop condition at any other time does not trigger the internal write cycle. During the internal write cycle, the serial data (SDA) signal is disabled internally, and the device does not respond to any requests. Caution: I2C write password command data transits via the 256-byte fast transfer mode's buffer. Consequently fast transfer mode must be deactivated before issuing a write password command, otherwise command is NotACK (after address LSB), and programming is not done and device goes in standby mode. Figure 37. I2C Write Password Sequence Ack Validation code 07h Password Address 09h Ack Password [63:56] Password Address 00h Ack Password [55:48] Ack Password [47:40] Ack Ack Ack Password [31:24] Password [39:32] Password [23:16] Password [15:08] Ack Ack Password [7:0] R/W Ack Password [63:56] Ack Ack Password [55:48] Password [47:40] Ack generated during 9th bit time slot. DS13519 - Rev 4 Ack Ack Password [39:32] Ack Password [31:24] Ack Ack Password [23:16] Password [15:08] Ack Ack Password [7:0] Stop Start Device select code Ack page 76/203 ST25DV04KC ST25DV16KC ST25DV64KC RF operations 7 RF operations Contactless exchanges are performed in RF mode as specified by ISO/IEC 15693 or NFC Forum Type 5. The ST25DVxxKC communicates via the 13.56 MHz carrier electromagnetic wave on which incoming data are demodulated from the received signal amplitude modulation (ASK: amplitude shift keying). The received ASK wave is 10% or 100% modulated with a data rate of 1.6 kbit/s using the 1/256 pulse coding mode or a data rate of 26 kbit/s using the 1/4 pulse coding mode. Outgoing data are generated by the ST25DVxxKC load variation using Manchester coding with one or two subcarrier frequencies at 423 kHz and 484 kHz. Data are transferred from the ST25DVxxKC at 6.6 kbit/s in low data rate mode and 26 kbit/s in high data rate mode. The ST25DVxxKC supports the 53 kbit/s in high data rate mode in one subcarrier frequency at 423 kHz. The ST25DVxxKC follows ISO/IEC 15693 or NFC Forum Type 5 recommendation for radio-frequency power and signal interface and for anticollision and transmission protocol. 7.1 RF communication 7.1.1 Access to a ISO/IEC 15693 device The dialog between the “RF reader” and the ST25DVxxKC takes place as follows: These operations use the RF power transfer and communication signal interface described below (see Power transfer, Frequency and Operating field). This technique is called RTF (Reader talk first). • activation of the ST25DVxxKC by the RF operating field of the reader, • transmission of a command by the reader (ST25DVxxKC detects carrier amplitude modulation) • transmission of a response by the ST25DVxxKC (ST25DVxxKC modulates is load clocked at subcarrier rate) Operating field The ST25DVxxKC operates continuously between the minimum and maximum values of the electromagnetic field H defined in Table 256. RF characteristics. The Reader has to generate a field within these limits. Power transfer Power is transferred to the ST25DVxxKC by radio frequency at 13.56 MHz via coupling antennas in the ST25DVxxKC and the Reader. The RF operating field of the reader is transformed on the ST25DVxxKC antenna to an AC voltage which is rectified, filtered and internally regulated. During communications, the amplitude modulation (ASK) on this received signal is demodulated by the ASK demodulator Frequency The ISO 15693 standard defines the carrier frequency (fC) of the operating field as 13.56 MHz ±7 kHz. 7.2 RF communication and energy harvesting As the current consumption can affect the AC signal delivered by the antenna, RF communications with ST25DVxxKC are not guaranteed during voltage delivery on the energy harvesting analog output V_EH. 7.3 Fast transfer mode mailbox access in RF Thanks to dedicated commands, the RF interface has the possibility to check Mailbox availability, and the capability to access it directly to put or get a message from it (see Section 5.1 Fast transfer mode (FTM) for specific features). DS13519 - Rev 4 page 77/203 ST25DV04KC ST25DV16KC ST25DV64KC RF protocol description 7.4 RF protocol description 7.4.1 Protocol description The transmission protocol (or simply “the protocol”) defines the mechanism used to exchange instructions and data between the VCD (Vicinity Coupling Device) and the ST25DVxxKC in both directions. It is based on the concept of “VCD talks first”. This means that a ST25DVxxKC does not start transmitting unless it has received and properly decoded an instruction sent by the VCD. The protocol is based on an exchange of: • a request from the VCD to the ST25DVxxKC, • a response from the ST25DVxxKC to the VCD. Each request and each response are contained in a frame. The frame are delimited by a Start of Frame (SOF) and End of Frame (EOF). The protocol is bit-oriented. The number of bits transmitted in a frame is a multiple of eight (8), that is an integer number of bytes. A single-byte field is transmitted least significant bit (LSBit) first. A multiple-byte field is transmitted least significant byte (LSByte) first and each byte is transmitted least significant bit (LSBit) first. Figure 38. ST25DVxxKC protocol timing VCD Request frame Request frame Response frame ST25DVxxKC Timing 7.4.2 t1 Response frame t2 t1 t2 ST25DVxxKC states referring to RF protocol The ST25DVxxKC can be in one of four states: • Power-off • Ready • Quiet • Selected Transitions between these states are specified in Figure 39. ST25DVxxKC state transition diagram and Table 95. ST25DVxxKC response depending on Request_flags. Power-off state The ST25DVxxKC is in the Power-off state when it does not receive enough energy from the VCD. Ready state The ST25DVxxKC is in the Ready state when it receives enough energy from the VCD. When in the Ready state, the ST25DVxxKC answers any request where the Select_flag is not set. DS13519 - Rev 4 page 78/203 ST25DV04KC ST25DV16KC ST25DV64KC RF protocol description Quiet state When in the Quiet state, the ST25DVxxKC answers any request with the Address_flag set, except for Inventory requests. Selected state In the Selected state, the ST25DVxxKC answers any request in all modes (see Section 7.4.3 Modes): • Request in Select mode with the Select_flag set • Request in Addressed mode if the UID matches • Request in Non-Addressed mode as it is the mode for general requests Table 95. ST25DVxxKC response depending on Request_flags Address_flag Flags Select_flag 1 0 1 0 Addressed Non addressed Selected Non selected ST25DVxxKC in Ready or Selected state (Devices in Quiet state do not answer) - X - X ST25DVxxKC in Selected state - X X - ST25DVxxKC in Ready, Quiet or Selected state (the device which matches the UID) X - - X Error (03h) or no response (command dependent) X - X - Figure 39. ST25DVxxKC state transition diagram Power off Out of field after tRF_OFF Ready Inventory ) ID t(U ad y uie re o tt ay q St Re se 1. Out of RF field after tRF_OFF Select (UID) Stay quiet(UID) Any other command where the Address_Flag is set AND where the Inventory_Flag is not set Any other command where Select_Flag is not set ) e ID er (U wh or ct y et ) le ad s Se re g is UID o t t Fla (# se t_ ith Re elec ct w S ele S Out of RF field after tRF_OFF Quiet In RF field Selected Any other command The ST25DVxxKC returns to the Power Off state if the tag is out of the RF field for at least tRF_OFF. The intention of the state transition method is that only one ST25DVxxKC should be in the Selected state at a time. DS13519 - Rev 4 page 79/203 ST25DV04KC ST25DV16KC ST25DV64KC RF protocol description When the Select_flag is set to 1, the request shall NOT contain a unique ID. When the address_flag is set to 0, the request shall NOT contain a unique ID. 7.4.3 Modes The term “mode” refers to the mechanism used in a request to specify the set of ST25DVxxKC devices that shall execute the request. Addressed mode When the Address_flag is set to 1 (Addressed mode), the request contains the Unique ID (UID) of the addressed ST25DVxxKC. Any ST25DVxxKC that receives a request with the Address_flag set to 1 compares the received Unique ID to its own. If it matches, then the ST25DVxxKC executes the request (if possible) and returns a response to the VCD as specified in the command description. If the UID does not match, then it remains silent. Non-addressed mode (general request) When the Address_flag is cleared to 0 (Non-Addressed mode), the request does not contain a Unique ID. Select mode When the Select_flag is set to 1 (Select mode), the request does not contain a unique ID. The ST25DVxxKC in the Selected state that receives a request with the Select_flag set to 1 executes it and returns a response to the VCD as specified in the command description. Only the ST25DVxxKC in the Selected state answers a request where the Select_flag is set to 1. The system design ensures that only one ST25DVxxKC can be in the Select state at a time. 7.4.4 Request format The request consists of: • an SOF, • flags, • a command code, • parameters and data, • a CRC, • an EOF. Table 96. General request format SOF 7.4.5 Request_flags Command code Parameters Data 2 byte CRC EOF Request flags In a request, the “flags” field specifies the actions to be performed by the ST25DVxxKC and whether corresponding fields are present or not. The flags field consists of eight bits. Bit 3 (Inventory_flag) of the request flag defines the contents of the four MSBs (bits 5 to 8). When bit 3 is reset (0), bits 5 to 8 define the ST25DVxxKC selection criteria. When bit 3 is set (1), bits 5 to 8 define the ST25DVxxKC Inventory parameters. DS13519 - Rev 4 page 80/203 ST25DV04KC ST25DV16KC ST25DV64KC RF protocol description Table 97. Definition of request flags 1 to 4 Bit No Flag Level Description 0 A single subcarrier frequency is used by the ST25DVxxKC 1 Two subcarriers are used by the ST25DVxxKC 0 Low data rate is used 1 High data rate is used 0 The meaning of flags 5 to 8 is described in Table 98 1 The meaning of flags 5 to 8 is described in Table 99 Bit 1 Subcarrier_flag (1) Bit 2 Data_rate_flag (2) Bit 3 Inventory_flag Bit 4 Protocol_extension 0 _flag 1 No Protocol format extension Protocol format extension. Reserved for future use. 1. Subcarrier_flag refers to the ST25DVxxKC-to-VCD communication. 2. Data_rate_flag refers to the ST25DVxxKC-to-VCD communication. Table 98. Request flags 5 to 8 when inventory_flag, Bit 3 = 0 Bit nb Flag Level 0 The request is executed by any ST25DVxxKC according to the setting of Address_flag 1 The request is executed only by the ST25DVxxKC in Selected state 0 The request is not addressed. UID field is not present. The request is executed by all ST25DVxxKCs. 1 The request is addressed. UID field is present. The request is executed only by the ST25DVxxKC whose UID matches the UID specified in the request. 0 Option not activated. 1 Option activated. 0 - Select flag (1) Bit 5 Bit 6 Address flag Bit 7 Option flag Bit 8 RFU Description 1. If the Select_flag is set to 1, the Address_flag is set to 0 and the UID field is not present in the request. Table 99. Request flags 5 to 8 when inventory_flag, Bit 3 = 1 DS13519 - Rev 4 Bit nb Flag Bit 5 AFI flag Bit 6 Nb_slots flag Bit 7 Option flag 0 - Bit 8 RFU 0 - Level Description 0 AFI field is not present 1 AFI field is present 0 16 slots 1 1 slot page 81/203 ST25DV04KC ST25DV16KC ST25DV64KC RF protocol description 7.4.6 Response format The response consists of: • an SOF • flags • parameters and data • a CRC • an EOF Table 100. General response format SOF 7.4.7 Response_flags Parameters Data 2 byte CRC EOF Response flags In a response, the flags indicate how actions have been performed by the ST25DVxxKC and whether corresponding fields are present or not. The response flags consist of eight bits. Table 101. Definitions of response flags 1 to 8 Bit Nb 7.4.8 Flag Level Description 0 No error 1 Error detected. Error code is in the “Error” field. ResponseBuffer Validity_flag 0 Not supported, always set to 0 Bit 3 Final response_flag 0 Not supported, always set to 0 Bit 4 Extension flag 0 Not supported, always set to 0 Bit 6-5 Block security status length_flag 0 Not supported, always set to 0 Bit 7 Waiting time extension request_flag 0 Not supported, always set to 0 Bit 8 RFU 0 - Bit 1 Error_flag Bit 2 Response and error code If the Error_flag is set by the ST25DVxxKC in the response, the Error code field is present and provides information about the error that occurred. Error codes not specified in Table 102 are reserved for future use. DS13519 - Rev 4 page 82/203 ST25DV04KC ST25DV16KC ST25DV64KC Timing definition Table 102. Response error code definition Error code 7.5 Meaning 01h Command is not supported. 02h Command is not recognized (format error). 03h The option is not supported. 0Fh Error with no information given. 10h The specified block is not available. 11h The specified block is already locked and thus cannot be locked again. 12h The specified block is locked and its contents cannot be changed. 13h The specified block was not successfully programmed. 14h The specified block was not successfully locked. 15h The specified block is protected in read. Timing definition t1: ST25DVxxKC response delay Upon detection of the rising edge of the EOF received from the VCD, the ST25DVxxKC waits for a t1nom time before transmitting its response to a VCD request or switching to the next slot during an inventory process. Values of t1 are given in Table 103. Timing values. t2: VCD new request delay t2 is the time after which the VCD may send an EOF to switch to the next slot when one or more ST25DVxxKC responses have been received during an Inventory command. It starts from the reception of the EOF from the ST25DVxxKCs. The EOF sent by the VCD may be either 10% or 100% modulated regardless of the modulation index used for transmitting the VCD request to the ST25DVxxKC. t2 is also the time after which the VCD may send a new request to the ST25DVxxKC, as described in Figure 38. ST25DVxxKC protocol timing. Values of t2 are given in Table 103. t3: VCD new request delay when no response is received from the ST25DVxxKC t3 is the time after which the VCD may send an EOF to switch to the next slot when no ST25DVxxKC response has been received. The EOF sent by the VCD may be either 10% or 100% modulated regardless of the modulation index used for transmitting the VCD request to the ST25DVxxKC. From the time the VCD has generated the rising edge of an EOF: • If this EOF is 100% modulated, the VCD waits for a time at least equal to t3min for 100% modulation before sending a new EOF. • If this EOF is 10% modulated, the VCD waits for a time at least equal to t3min for 10% modulation before sending a new EOF. DS13519 - Rev 4 page 83/203 ST25DV04KC ST25DV16KC ST25DV64KC Timing definition Table 103. Timing values Minimum (min) values 100% modulation 10% modulation Nominal (nom) values Maximum (max) values t1 4320 / fc = 318.6 µs 4352 / fc = 320.9 µs 4384 / fc = 323.3 µs (1) t2 4192 / fc = 309.2 µs No tnom No tmax No tnom No tmax t3 t1max(2) + tSOF (3) t1max(2) + tNRT(4) + t2min 1. VCD request is interpreted during the first milliseconds following the RF field rising. 2. t1max does not apply for write-alike requests. Timing conditions for write-alike requests are defined in the command description. 3. tSOF is the time taken by the ST25DVxxKC to transmit an SOF to the VCD. tSOF depends on the current data rate: High data rate or Low data rate. 4. tNRT is the nominal response time of the ST25DVxxKC. tNRT depends on VICC to ST25DVxxKC data rate and subcarrier modulation mode. Note: DS13519 - Rev 4 The tolerance of specific timings is ± 32/fC. page 84/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands 7.6 RF commands 7.6.1 RF command code list The ST25DVxxKC supports the following legacy and extended RF command set: • Inventory, used to perform the anticollision sequence. • Stay Quiet, used to put the ST25DVxxKC in quiet mode, where it does not respond to any inventory command. • Select, used to select the ST25DVxxKC. After this command, the ST25DVxxKC processes all Read/Write commands with Select_flag set. • Reset To Ready, used to put the ST25DVxxKC in the ready state. • Read Single Block and Extended Read Single Block, used to output the 32 bit of the selected block and its locking status. • Write Single Block and Extended Write Single Block, used to write and verify the new content for an update of a 32 bit block, provided that it is not in a locked memory area. • Read Multiple Blocks and Extended Read Multiple Block, used to read the selected blocks in an unique area, and send back their value. • Write Multiple Blocks and Extended Write Multiple Block, used to write and verify the new content for an update of up to 4 blocks located in the same memory area, which was not previously locked for writing. • Write AFI, used to write the 8-bit value in the AFI register. • Lock AFI, used to lock the AFI register. • Write DSFID, used to write the 8-bit value in the DSFID register. • Lock DSFID, used to lock the DSFID register. • Get System information and Extended Get System Information, used to provide the system information value. • Get System information, used to provide the standard system information values. • Extended Get System Information, used to provide the extended system information values. • Write Password, used to update the 64-bit of the selected areas or configuration password, but only after presenting the current one. • Lock Block and Extended Lock block, used to write the CC file blocks security status bits (Protect the CC File content against writing). • Present Password, enables the user to present a password to open a security session. • Fast Read Single Block and Fast Extended Read Single Block, used to output the 32 bits of the selected block and its locking status at doubled data rate. • Fast Read Multiple Blocks and Fast Extended Read Multiple Blocks, used to read the selected blocks in a single area and send back their value at doubled data rate. • Read Message, used to output up to 256 byte of the Mailbox. • Read Message Length, used to output the Mailbox message length. • Fast Read Message, used to output up to 256 byte of the mailbox, at double data rate. • Write Message, used to write up to 256 byte in the Mailbox. • Fast Read Message Length, used to ouput the mailbox length, at double data rate. • Fast Write Message, used to write up to 256 bytes in the mailbox, with answer at double data rate. • Read Configuration, used to read static configuration registers. • Write Configuration, used to write static configuration registers. • Read Dynamic Configuration, used to read dynamic register. • Write Dynamic Configuration , used to write dynamic register. • Fast Read Dynamic Configuration, used to read dynamic register, at double data rate. • Fast Write Dynamic Configuration, used to write dynamic register, with answer at double data rate. • Manage GPO, used to drive GPO output value when corresponding GPO mode is enabled. 7.6.2 Command codes list The ST25DVxxKC supports the commands described in this section. Their codes are given in Table 104. DS13519 - Rev 4 page 85/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Table 104. Command codes Command code standard Command code custom Function Function 01h Inventory A0h Read Configuration 02h Stay Quiet A1h Write Configuration 20h Read Single Block A9h Manage GPO 21h Write Single Block AAh Write Message 22h Lock Block ABh Read Message Length 23h Read Multiple Blocks ACh Read Message 24h Write Multiple Blocks ADh Read Dynamic Configuration 25h Select AEh Write Dynamic Configuration 26h Reset to Ready B1h Write Password 27h Write AFI B3h Present Password 28h Lock AFI C0h Fast Read Single Block 29h Write DSFID C3h Fast Read Multiple Blocks 2Ah Lock DSFID CDh Fast Read Dynamic configuration 2Bh Get System Info CEh Fast Write Dynamic Configuration 2Ch Get Multiple Block Security Status - - 30h Extended Read Single Block C4h Fast Extended Read Single Block 31h Extended Write Single Block C5h Fast Extended Read Multiple Block 32h Extended Lock block CAh Fast Write Message 33h Extended Read Multiple Blocks CBh Fast Read Message Length 34h Extended Write Multiple Blocks CCh Fast Read Message 3Bh Extended Get System Info - - 3Ch Extended Get Multiple Block Security Status - - 7.6.3 General command rules In case of a valid command, the following paragraphs describe the expected behaviour for each command. But in case of an invalid command, in a general manner, the ST25DVxxKC behaves as follows: 1. If flag usage is incorrect, the error code 03h is issued only if the right UID is used in the command, otherwise no response is issued. 2. The error code 02h is issued if the custom command is used with the manufacturer code different from the ST one. Another case is if I2C is busy. In this case, any RF command (except Inventory, Select, Stay quiet and Reset to ready) gets 0Fh error code as response only: • If select flag and address flags are not set at the same time (except if ST25DVxxKC is in quiet state) • If select flag is set and ST25DVxxKC is in selected state. For all other commands, if I2C is busy, no response is issued by ST25DVxxKC. DS13519 - Rev 4 page 86/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands 7.6.4 Inventory Upon receiving the Inventory request, the ST25DVxxKC runs the anticollision sequence. The Inventory_flag is set to 1. The meaning of flags 5 to 8 is shown in Table 99. Request flags 5 to 8 when inventory_flag, Bit 3 = 1. The request contains: • the flags • the Inventory command code (001) • the AFI if the AFI flag is set • the mask length • the mask value if mask length is different from 0 • the CRC The ST25DVxxKC does not generate any answer in case of error. Table 105. Inventory request format Request SOF Request_flags Inventory Optional AFI Mask length Mask value CRC16 Request EOF - 8 bits 01h 8 bits 8 bits 0 - 64 bits 16 bits - The response contains: • the flags • the Unique ID Table 106. Inventory response format Response SOF - Response_flags 8 bits DSFID 8 bits UID 64 bits CRC16 16 bits Response EOF - During an Inventory process, if the VCD does not receive an RF ST25DVxxKC response, it waits for a time t3 before sending an EOF to switch to the next slot. t3 starts from the rising edge of the request EOF sent by the VCD. • If the VCD sends a 100% modulated EOF, the minimum value of t3 is: t3min = 4384/fC (323.3µs) + tSOF • If the VCD sends a 10% modulated EOF, the minimum value of t3 is: t3min = 4384/fC (323.3µs) + tNRT + t2min where: • tSOF is the time required by the ST25DVxxKC to transmit an SOF to the VCD, • tNRT is the nominal response time of the ST25DVxxKC. tNRT and tSOF are dependent on the ST25DVxxKC-to-VCD data rate and subcarrier modulation mode. Note: In case of error, no response is sent by ST25DVxxKC. 7.6.5 Stay Quiet On receiving the Stay Quiet command, the ST25DVxxKC enters the Quiet state if no error occurs, and does NOT send back a response. There is NO response to the Stay Quiet command even if an error occurs. The Option_flag is not supported. The Inventory_flag must be set to 0. When in the Quiet state: • the ST25DVxxKC does not process any request if the Inventory_flag is set, • the ST25DVxxKC processes any Addressed request. The ST25DVxxKC exits the Quiet state when: • it is reset (power off), DS13519 - Rev 4 page 87/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands • • receiving a Select request. It then goes to the Selected state, receiving a Reset to Ready request. It then goes to the Ready state. Table 107. Stay Quiet request format Request SOF Request flags - Stay Quiet 8 bits 02h UID 64 bits CRC16 Request EOF 16 bits - The Stay Quiet command must always be executed in Addressed mode (Select_flag is reset to 0 and Address_flag is set to 1). Figure 40. Stay Quiet frame exchange between VCD and ST25DVxxKC Stay Quiet request SOF VCD EOF ST25DVxxKC 7.6.6 Read Single Block On receiving the Read Single Block command, the ST25DVxxKC reads the requested block and sends back its 32-bit value in the response. The Option_flag is supported, when set response include the Block Security Status. The Inventory_flag must be set to 0. Block number is coded on 1 Byte and only first 256 blocks of ST25DV16KC and ST25DV64KC can be addressed using this command. Table 108. Read Single Block request format Request SOF - Request_flags 8 bits Read Single Block 20h UID (1) 64 bits Block number 8 bits CRC16 16 bits Request EOF - 1. This the field is optional. Request parameters: • Request flags • UID (optional) • Block number Table 109. Read Single Block response format when Error_flag is NOT set Response SOF - Response_flags 8 bits Block security status (1) 8 bits Data 32 bits CRC16 16 bits Response EOF - 1. This field is optional. Response parameters: • Block security status if Option_flag is set (see Table 110. Block security status • Four bytes of block data DS13519 - Rev 4 page 88/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Table 110. Block security status b7 b6 b5 b4 b3 b2 b1 b0 Reserved for future use. 0: Current block not locked All at 0. 1: Current block locked Table 111. Read Single Block response format when Error_flag is set Response SOF Response_flags - Error code 8 bits 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set – 03h: command option not supported – 0Fh: error with no information – 10h: the specified block is not available – 15h: the specified block is read-protected Figure 41. Read Single Block frame exchange between VCD and ST25DVxxKC VCD SOF Read Single Block request ST25DVxxKC 7.6.7 EOF t1 SOF Read Single Block response EOF Extended Read Single Block On receiving the Extended Read Single Block command, the ST25DVxxKC reads the requested block and sends back its 32-bit value in the response. When the Option_flag is set, the response includes the Block Security Status. Block number is coded on 2 Bytes so all memory blocks of ST25DV16KC and ST25DV64KC can be addressed using this command. Table 112. Extended Read Single Block request format Request SOF - Request_flags 8 bits Extended Read Single Block 30h UID (1) 64 bits Block number 16 bits CRC16 16 bits Request EOF - 1. This field is optional. Request parameters: • Request flags • UID (optional) • Block number (from LSB byte to MSB byte) DS13519 - Rev 4 page 89/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Table 113. Extended Read Single Block response format when Error_flag is NOT set Response SOF - Block security status (1) Response_flags 8 bits Data 8 bits 32 bits CRC16 Response EOF 16 bits - 1. This field is optional. Response parameters: • Block security status if Option_flag is set (see Table 114) • Four bytes of block data Table 114. Block security status b7 b6 b5 b4 b3 b2 b1 b0 Reserved for future use. 0: Current block not locked All at 0. 1: Current block locked Table 115. Extended Read Single Block response format when Error_flag is set Response SOF Response_flags - Error code 8 bits 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set – 03h: command option not supported or no response – 0Fh: error with no information – 10h: the specified block is not available – 15h: the specified block is read-protected Figure 42. Extended Read Single Block frame exchange between VCD and ST25DVxxKC VCD SOF ST25DVxxKC 7.6.8 Extended Read Single Block request EOF t1 SOF Extended Read Single Block response EOF Write Single Block On receiving the Write Single Block command, the ST25DVxxKC writes the data contained in the request to the targeted block and reports whether the write operation was successful in the response. When the Option_flag is set, wait for EOF to respond. The Inventory_flag must be set to 0. During the RF write cycle Wt, there should be no modulation (neither 100% nor 10%), otherwise the ST25DVxxKC may not program correctly the data into the memory. The Wt time is equal to t1nom + N × 302 µs (N is an integer). Block number is coded on 1 Byte and only first 256 blocks of ST25DV16KC and ST25DV64KC can be addressed using this command. DS13519 - Rev 4 page 90/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Table 116. Write Single Block request format Request SOF - Request_flags 8 bits Write Single Block 21h UID (1) 64 bits Block number 8 bits Data CRC16 32 bits 16 bits Request EOF - 1. This field is optional. Request parameters: • Request flags • UID (optional) • Block number • Data Table 117. Write Single Block response format when Error_flag is NOT set Response SOF Response_flags - CRC16 8 bits Response EOF 16 bits - Response parameter: • No parameter. The response is sent back after the writing cycle. Table 118. Write Single Block response format when Error_flag is set Response SOF Response_flags - Error code 8 bits 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set – 03h: command option not supported – 0Fh: error with no information given – 10h: the specified block is not available – 12h: the specified block is locked or protected and its contents cannot be changed – 13h: the specified block was not successfully programmed Note: For more details, see Figure 9. Memory organization. Figure 43. Write Single Block frame exchange between VCD and ST25DVxxKC VCD ST25DVxxKC ST25DVxxKC DS13519 - Rev 4 SOF Write Single Block request EOF t1 SOF Write Single Block response Wt EOF SOF Write sequence when error Write Single Block response EOF page 91/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands 7.6.9 Extended Write Single Block On receiving the Extended Write Single command, the ST25DVxxKC writes the data contained in the request to the targeted block and reports whether the write operation was successful in the response. When the Option_flag is set, wait for EOF to respond. The Inventory_flag must be set to 0. During the RF write cycle Wt, there should be no modulation (neither 100% nor 10%), otherwise the ST25DVxxKC may not program correctly the data into the memory. The Wt time is equal to t1nom + N × 302 µs (N is an integer). Block number is coded on 1 Byte and only first 256 blocks of ST25DV16KC and ST25DV64KC can be addressed using this command. Table 119. Extended Write Single request format Request SOF Request_flags Extended Write Single Block UID (1) Block number - 8 bits 31h 64 bits 16 bits Data CRC16 Request EOF 32 bits 16 bits - 1. This field is optional. Request parameters: • Request flags • UID (optional) • Block number (from LSB byte to MSB byte) • Data (from LSB byte to MSB byte) Table 120. Extended Write Single response format when Error_flag is NOT set Response SOF Response_flags - CRC16 8 bits Response EOF 16 bits - Response parameter: • No parameter. The response is sent back after the writing cycle. Table 121. Extended Write Single response format when Error_flag is set Response SOF - Response_flags 8 bits Error code 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set: – 03h: command option not supported – 0Fh: error with no information given – 10h: the specified block is not available – 12h: the specified block is locked and its contents cannot be changed – 13h: the specified block was not successfully programmed DS13519 - Rev 4 page 92/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Figure 44. Extended Write Single frame exchange between VCD and ST25DVxxKC SOF VCD Extended Write Single request EOF t1 ST25DVxxKC SOF Wt ST25DVxxKC 7.6.10 Extended Write Single response Write sequence when error EOF SOF Extended Write Single response EOF Lock Block On receiving the Lock block request, the ST25DVxxKC locks the single block value permanently and protects its content against new writing. This command is only applicable for the blocks 0 and 1 which may include a CC file. For a global protection of a area, update accordingly the RFAiSS bits in the system area. The Option_flag is supported, when set wait for EOF to respond. The Inventory_flag must be set to 0. During the RF write cycle Wt, there should be no modulation (neither 100% nor 10%), otherwise the ST25DVxxKC may not lock correctly the single block value in memory. The Wt time is equal to t1nom + N × 302 µs (N is an integer). Table 122. Lock block request format Request SOF - Request_flags Lock block 8 bits 22h UID (1) block number 64 bits CR7C16 8 bits Request EOF 16 bits - 1. This field is optional. Request parameter: • Request Flags • UID (optional) • Only block numbers 0 and 1 are allowed to protect the CCFile in case of NDEF (from LSB byte to MSB byte) Table 123. Lock block response format when Error_flag is NOT set Response SOF Response_flags - CRC16 8 bits Response EOF 16 bits - Response parameter: • No parameter Table 124. Lock block response format when Error_flag is set Response SOF - DS13519 - Rev 4 Response_flags 8 bits Error code 8 bits CRC16 16 bits Response EOF - page 93/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Response parameter: • Error code as Error_flag is set – 03h: command option not supported – 10h: block not available – 11h: the specified block is already locked and thus cannot be locked again – 14h: the specified block was not successfully locked Figure 45. Lock Block frame exchange between VCD and ST25DVxxKC SOF VCD Lock Block request EOF t1 ST25DVxxKC Wt ST25DVxxKC 7.6.11 Lock Block response SOF EOF SOF Lock sequence when error Lock Block response EOF Extended Lock block On receiving the extended Lock block request, the ST25DVxxKC locks the single block value permanently and protects its content against new writing. This command is only applicable for the blocks 0 and 1 which may include a CC file. For a global protection of a area, update accordingly the AiSS bits in the system area. When the Option_flag is set, wait for EOF to respond. The Inventory_flag must be set to 0. During the RF write cycle Wt, there should be no modulation (neither 100% nor 10%), otherwise the ST25DVxxKC may not lock correctly the single block value in memory. The Wt time is equal to t1nom + N × 302 µs (N is an integer). Table 125. Extended Lock block request format Request SOF - Request_flags 8 bits Extended Lock block 32h UID (1) 64 bits block number 16 bits CRC16 16 bits Request EOF - 1. The field is optional. Request parameter: • Request Flags • UID (optional) • Only block numbers 0 and 1 are allowed to protect the CCFile in case of NDEF (from LSB byte to MSB byte) Table 126. Extended Lock block response format when Error_flag is NOT set Response SOF - DS13519 - Rev 4 Response_flags 8 bits CRC16 16 bits Response EOF - page 94/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Response parameter: • No parameter Table 127. Extended Lock block response format when Error_flag is set Response SOF - Response_flags Error code 8 bits CRC16 8 bits 16 bits Response EOF - Response parameter: • Error code as Error_flag is set – 03h: command option not supported – 10h: block not available – 11h: the specified block is already locked and thus cannot be locked again – 14h: the specified block was not successfully locked Figure 46. Extended Lock block frame exchange between VCD and ST25DVxxKC SOF VCD Extended Lock block request EOF t1 ST25DVxxKC Wt ST25DVxxKC 7.6.12 Extended Lock block response SOF EOF SOF Lock sequence when error Extended Lock block response EOF Read Multiple Blocks When receiving the Read Multiple Block command, the ST25DVxxKC reads the selected blocks and sends back their value in multiples of 32 bits in the response. The blocks are numbered from 00h to FFh in the request and the value is minus one (–1) in the field. For example, if the “Number of blocks” field contains the value 06h, seven blocks are read. The maximum number of blocks is fixed at 256. Read Multiple Blocks command can cross areas borders, and returns all blocks until reaching a non readable block (block read protected or out of memory). When the Option_flag is set, the response returns the Block Security Status. The Inventory_flag must be set to 0. Block number is coded on 1 Byte and only first 256 blocks of ST25DV16KC and ST25DV64KC can be addressed using this command. Table 128. Read Multiple Block request format Request SOF Request_flags - 8 bits Read Multiple Block 23h UID (1) First block number 64 bits 8 bits Number of blocks CRC16 Request EOF 8 bits 16 bits - 1. The field is optional. DS13519 - Rev 4 page 95/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Request parameters: • Request flags • UID (optional) • First block number • Number of blocks Table 129. Read Multiple Block response format when Error_flag is NOT set Response_ Response SOF - flags Block security status (1) 8 bits (2) 8 bits Data CRC16 32 bits(2) Response EOF 16 bits - 1. The field is optional. 2. Repeated as needed. Response parameters: • Block security status if Option_flag is set (see Table 130. Block security status • N blocks of data Table 130. Block security status b7 b6 b5 b4 b3 b2 b1 b0 Reserved for future use. 0: Current block not locked All at 0. 1: Current block locked Table 131. Read Multiple Block response format when Error_flag is set Response SOF Response_flags - Error code 8 bits 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set: – 03h: command option is not supported – 0Fh: error with no information given – 10h: the specified block is not available – 15h: the specified block is read-protected Figure 47. Read Multiple Block frame exchange between VCD and ST25DVxxKC VCD ST25DVxxKC DS13519 - Rev 4 SOF Read Multiple Block request EOF t1 SOF Read Multiple Block response EOF page 96/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands 7.6.13 Extended Read Multiple Blocks When receiving the Extended Read multiple block command, the ST25DVxxKC reads the selected blocks and sends back their value in multiples of 32 bits in the response. The blocks are numbered from 00h to last block of memory in the request and the value is minus one (-1) in the field. For example, if the “Number of blocks” field contains the value 06h, seven blocks are read. The maximum number of blocks is fixed at 2047. Extended Read Multiple Blocks command can cross areas borders, and returns all blocks until reaching a non readable block (block read protected or out of memory). When the Option_flag is set, the response returns the Block Security Status. The Inventory_flag must be set to 0. Block number is coded on 2 Bytes so all memory blocks of ST25DV16KC and ST25DV64KC can be addressed using this command. Table 132. Extended Read Multiple Block request format Request SOF Request_flags Extended Read Multiple Block UID (1) First block number Number of blocks CRC16 Request EOF - 8 bits 33h 64 bits 16 bits 16 bits 16 bits - 1. This field is optional. Request parameters: • Request flags • UID (optional) • First block number (from LSB byte to MSB byte) • Number of blocks (from LSB byte to MSB byte) Table 133. Extended Read Multiple Block response format when Error_flag is NOT set Response_ Response SOF - flags Block security status (1) Data CRC16 Response EOF 8 bits 8 bits (2) 32 bits (2) 16 bits - 1. This field is optional. 2. Repeated as needed. Response parameters: • Block security status if Option_flag is set (see Table 130) • N blocks of data Table 134. Block security status b7 b6 b5 b4 b3 b2 b1 b0 Reserved for future use. 0: Current block not locked All at 0 1: Current block locked Table 135. Extended Read Multiple Block response format when Error_flag is set Response SOF - DS13519 - Rev 4 Response_flags 8 bits Error code 8 bits CRC16 16 bits Response EOF - page 97/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Response parameter: • Error code as Error_flag is set: – 03h: command option is not supported – 0Fh: error with no information given – 10h: the specified block is not available – 15h: the specified block is read-protected Figure 48. Extended Read Multiple Block frame exchange between VCD and ST25DVxxKC VCD SOF Extended Read Multiple Block request EOF ST25DVxxKC 7.6.14 Extended Read Multiple Block response SOF t1 EOF Write Multiple Blocks On receiving the Write Multiple Block command, the ST25DVxxKC writes the data contained in the request to the requested blocks, and reports whether the write operation were successful in the response. ST25DVxxKC supports up to 4 blocks, data field must be coherent with the number of blocks to program. The number of blocks in the request is one less than the number of blocks that the ST25DVxxKC shall write (for instance Number of block = 2 means 3 blocks to be written). If some blocks overlaps areas, or overlap end of user memory, the ST25DVxxKC returns an error code and none of the blocks are programmed. When the Option_flag is set, wait for EOF to respond. During the RF write cycle Wt, there should be no modulation (neither 100% nor 10%), otherwise the ST25DVxxKC may not program correctly the data into the memory. The Wt time is equal to t1nom + m × 302 μs < 20 ms. (m is an integer, it is function of Nb number of blocks to be programmed). The Inventory_flag must be set to 0. Block number is coded on 1 Byte and only first 256 blocks of ST25DV16KC and ST25DV64KC can be addressed using this command. Table 136. Write Multiple Block request format Request SOF Request_flags Write Multiple Block UID (1) First Block number Number of block (2) - 8 bits 24h 64 bits 8 bits 8 bits Data Block length (3) CRC16 Request EOF 16 bits - 1. This field is optional. 2. The number of blocks in the request is one less than the number of blocks that the VICC shall write. 3. Repeated as needed Request parameters: • Request flags • UID (optional) • First Block number • Number of blocks • Data DS13519 - Rev 4 page 98/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Table 137. Write Multiple Block response format when Error_flag is NOT set Response SOF Response_flags - CRC16 8 bits Response EOF 16 bits - Response parameter: • No parameter. The response is sent back after the writing cycle. Table 138. Write Multiple Block response format when Error_flag is set Response SOF - Response_flags Error code 8 bits 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set: – 03h: command option is not supported – 0Fh: error with no information given – 10h: the specified block is not available – 12h: the specified block is locked and its contents cannot be changed – 13h: the specified block was not successfully programmed Figure 49. Write Multiple Block frame exchange between VCD and ST25DVxxKC VCD SOF Write Multiple block request ST25DVxxKC ST25DVxxKC 7.6.15 EOF t1 SOF Write Multiple block response Wt EOF SOF Write sequence when error Write Multiple block response EOF Extended Write Multiple Blocks On receiving the Extended Write multiple block command, the writes the data contained in the request to the targeted blocks and reports whether the write operation were successful in the response. ST25DVxxKC supports up to 4 blocks, data field must be coherent with number of blocks to program. If some blocks overlaps areas, or overlap end of user memory the ST25DVxxKC returns an error code and none of the blocks are programmed. The number of blocks in the request is one less than the number of blocks that the ST25DVxxKC shall write (for instance Number of block = 2 means 3 blocks to be written). When the Option_flag is set, wait for EOF to respond. During the RF write cycle Wt, there should be no modulation (neither 100% nor 10%), otherwise the ST25DVxxKC may not program correctly the data into the memory. The Wt time is equal to t1nom + m × 302 μs < 20 ms (m is an integer function of Nb number of blocks to be programmed). The inventory_flag must be set to 0. Block number is coded on 2 Bytes so all memory blocks of ST25DV16KC and ST25DV64KC can be addressed using this command. DS13519 - Rev 4 page 99/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Table 139. Extended Write Multiple Block request format Request SOF - Request_flags Extended Write multiple block UID (1) 8 bits 34h 64 bits 16 bits First Block number Number of block (2) Data Block length (3) 16 bits Request EOF CRC16 16 bits - 1. This field is optional. 2. The number of blocks in the request is one less than the number of blocks that the VICC shall write. 3. Repeated as needed Request parameters: • Request flags • UID (optional) • First block number (from LSB byte to MSB byte) • Number of block (from LSB byte to MSB byte) • Data (from first to last blocks, from LSB bytes to MSB bytes) Table 140. Extended Write Multiple Block response format when Error_flag is NOT set Response SOF Response_flags - CRC16 8 bits Response EOF 16 bits - Response parameter: • No parameter. The response is sent back after the writing cycle. Table 141. Extended Write Multiple Block response format when Error_flag is set Response SOF - Response_flags 8 bits Error code 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set: – 03h: command option is not supported – 0Fh: error with no information given – 10h: the specified block is not available – 12h: the specified block is locked and its contents cannot be changed – 13h: the specified block was not successfully programmed DS13519 - Rev 4 page 100/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Figure 50. Extended Write Multiple Block frame exchange between VCD and SOF VCD Extended Write Multiple Block request EOF t1 ST25DVxxKC SOF Wt ST25DVxxKC 7.6.16 Extended Write Multiple Block response Write sequence when error EOF SOF Extended Write Multiple Block response EOF Select When receiving the Select command: • If the UID is equal to its own UID, the ST25DVxxKC enters or stays in the Selected state and sends a response. • If the UID does not match its own UID, the selected ST25DVxxKC returns to the Ready state and does not send a response. The ST25DVxxKC answers an error code only if the UID is equal to its own UID. If not, no response is generated. If an error occurs, the ST25DVxxKC remains in its current state. The Option_flag is not supported, and the Inventory_flag must be set to 0. Table 142. Select request format Request SOF Request_flags - 8 bits Select 25h UID 64 bits CRC16 Request EOF 16 bits - Request parameter: • UID Table 143. Select Block response format when Error_flag is NOT set Response SOF Response_flags - CRC16 8 bits Response EOF 16 bits - Response parameter: • No parameter Table 144. Select response format when Error_flag is set Response SOF - Response_flags 8 bits Error code 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set: – 03h: the option is not supported – 0Fh: error with no information given DS13519 - Rev 4 page 101/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Figure 51. Select frame exchange between VCD and ST25DVxxKC VCD SOF Select request EOF t1 ST25DVxxKC 7.6.17 SOF Select response EOF Reset to Ready On receiving a Reset to Ready command, the ST25DVxxKC returns to the Ready state if no error occurs. In the Addressed mode, the ST25DVxxKC answers an error code only if the UID is equal to its own UID. If not, no response is generated. The Option_flag is not supported, and the Inventory_flag must be set to 0. Table 145. Reset to Ready request format Request SOF Request_flags - 8 bits UID (1) Reset to Ready 26h CRC16 64 bits Request EOF 16 bits - 1. This field is optional. Request parameter: • UID (optional) Table 146. Reset to Ready response format when Error_flag is NOT set Response SOF Response_flags - CRC16 8 bits Response EOF 16 bits - Response parameter: • No parameter Table 147. Reset to ready response format when Error_flag is set Response SOF - Response_flags 8 bits Error code 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set: – 03h: the option is not supported – 0Fh: error with no information given DS13519 - Rev 4 page 102/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Figure 52. Reset to Ready frame exchange between VCD and ST25DVxxKC VCD SOF Reset to Ready request EOF t1 ST25DVxxKC 7.6.18 Reset to Ready response SOF EOF Write AFI On receiving the Write AFI request, the ST25DVxxKC programs the 8-bit AFI value to its memory. When the Option_flag is set, wait for EOF to respond. The Inventory_flag must be set to 0. During the RF write cycle Wt, there should be no modulation (neither 100% nor 10%), otherwise the ST25DVxxKC may not write correctly the AFI value into the memory. The Wt time is equal to t1nom + N × 302 µs (N is an integer). Table 148. Write AFI request format Request SOF - Request_flags 8 bits Write AFI 27h UID (1) 64 bits AFI CRC16 8 bits 16 bits Request EOF - 1. This field is optional. Request parameter: • Request flags • UID (optional) • AFI Table 149. Write AFI response format when Error_flag is NOT set Response SOF - Response_flags 8 bits CRC16 16 bits Response EOF - Response parameter: • No parameter Table 150. Write AFI response format when Error_flag is set Response_ Response SOF - DS13519 - Rev 4 flags 8 bits Error code 8 bits CRC16 16 bits Response EOF - page 103/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Response parameter: • Error code as Error_flag is set – 03h: command option is not supported – 0Fh: error with no information given – 12h: the specified block is locked and its contents cannot be changed – 13h: the specified block was not successfully programmed Figure 53. Write AFI frame exchange between VCD and ST25DVxxKC VCD SOF Write AFI request EOF t1 ST25DVxxKC Wt ST25DVxxKC 7.6.19 Write AFI response SOF Write sequence when error EOF SOF Write AFI response EOF Lock AFI On receiving the Lock AFI request, the ST25DVxxKC locks the AFI value permanently. When the Option_flag is set, wait for EOF to respond. The Inventory_flag must be set to 0. During the RF write cycle Wt, there should be no modulation (neither 100% nor 10%), otherwise the ST25DVxxKC may not lock correctly the AFI value in memory. The Wt time is equal to t1nom + N × 302 µs (N is an integer). Table 151. Lock AFI request format Request SOF Request_flags - 8 bits Lock AFI 28h UID (1) 64 bits CRC16 16 bits Request EOF - 1. This field is optional. Request parameter: • Request Flags • UID (optional) Table 152. Lock AFI response format when Error_flag is NOT set Response SOF - Response_flags 8 bits CRC16 16 bits Response EOF - Response parameter: • No parameter DS13519 - Rev 4 page 104/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Table 153. Lock AFI response format when Error_flag is set Response SOF Response_flags - Error code 8 bits CRC16 8 bits Response EOF 16 bits - Response parameter: • Error code as Error_flag is set – 03h: command option is not supported – 0Fh: error with no information given – 11h: the specified block is already locked and thus cannot be locked again – 14h: the specified block was not successfully locked Figure 54. Lock AFI frame exchange between VCD and ST25DVxxKC VCD SOF Lock AFI request EOF t1 ST25DVxxKC Wt ST25DVxxKC 7.6.20 Lock AFI response SOF Lock sequence when error EOF SOF Lock AFI response EOF Write DSFID On receiving the Write DSFID request, the ST25DVxxKC programs the 8-bit DSFID value to its memory. When the Option_flag is set, wait for EOF to respond. The Inventory_flag must be set to 0. During the RF write cycle Wt, there should be no modulation (neither 100% nor 10%), otherwise the ST25DVxxKC may not write correctly the DSFID value in memory. The Wt time is equal to t1nom + N × 302 µs (N is an integer). Table 154. Write DSFID request format Request SOF - Request_flags 8 bits Write DSFID 29h UID (1) 64 bits DSFID 8 bits CRC16 16 bits Request EOF - 1. This field is optional. Request parameter: • Request flags • UID (optional) • DSFID Table 155. Write DSFID response format when Error_flag is NOT set Response SOF - DS13519 - Rev 4 Response_flags 8 bits CRC16 16 bits Response EOF - page 105/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Response parameter: • No parameter Table 156. Write DSFID response format when Error_flag is set Response SOF Response_flags - Error code 8 bits CRC16 8 bits 16 bits Response EOF - Response parameter: • Error code as Error_flag is set – 03h: command option is not supported – 0Fh: error with no information given – 12h: the specified block is locked and its contents cannot be changed – 13h: the specified block was not successfully programmed Figure 55. Write DSFID frame exchange between VCD and ST25DVxxKC VCD Write DSFID request SOF EOF t1 ST25DVxxKC Wt ST25DVxxKC 7.6.21 Write DSFID response SOF Write sequence when error EOF SOF Write DSFID response EOF Lock DSFID On receiving the Lock DSFID request, the ST25DVxxKC locks the DSFID value permanently. When the Option_flag is set, wait for EOF to respond. The Inventory_flag must be set to 0. During the RF write cycle Wt, there should be no modulation (neither 100% nor 10%), otherwise the ST25DVxxKC may not lock correctly the DSFID value in memory. The Wt time is equal to t1nom + N × 302 µs (N is an integer). Table 157. Lock DSFID request format Request SOF - Request_flags 8 bits Lock DSFID 2Ah UID (1) 64 bits CRC16 16 bits Request EOF - 1. This field is optional. Request parameter: • Request flags • UID (optional) DS13519 - Rev 4 page 106/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Table 158. Lock DSFID response format when Error_flag is NOT set Response SOF Response_flags - CRC16 8 bits Response EOF 16 bits - Response parameter: • No parameter. Table 159. Lock DSFID response format when Error_flag is set Response SOF Response_flags - Error code 8 bits 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set: – 03h: command option is not supported – 0Fh: error with no information given – 11h: the specified block is already locked and thus cannot be locked again – 14h: the specified block was not successfully locked Figure 56. Lock DSFID frame exchange between VCD and ST25DVxxKC VCD ST25DVxxKC ST25DVxxKC DS13519 - Rev 4 SOF Lock DSFID request EOF t1 Lock DSFID response SOF Wt EOF SOF Lock sequence when error Lock DSFID response EOF page 107/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands 7.6.22 Get System Info When receiving the Get System Info command, the ST25DVxxKC sends back its information data in the response. The Option_flag is not supported. The Inventory_flag must be set to 0. The Get System Info can be issued in both Addressed and Non Addressed modes. Table 160. Get System Info request format Request SOF - Request_flags 8 bits UID (1) Get System Info 2Bh CRC16 64 bits Request EOF 16 bits - 1. This field is optional. Request parameter: • Request flags • UID (optional) Table 161. Get System Info response format Error_flag is NOT set Device Response SOF Response flags ST25DV16KC ST25DV64KC - Information flags 0Bh 00h ST25DV04KC 0Fh UID DSFID AFI 64 8 8 bits bits bits Mem. Size Response EOF IC ref. CRC16 NA (1) 51h 037Fh 50h 16 bits - 1. Field not present in this configuration Response parameters: • Information flags set to 0Bh/0Fh. DSFID, AFI and IC reference fields are present. • UID code on 64 bits • DSFID value • AFI value • MemSize: Block size in bytes and memory size in number of blocks (only present for ST25DV04KC configurations) Table 162. Memory size MSB LSB 16 14 13 9 8 1 RFU Block size in byte Number of blocks 0h 03h 7Fh • ST25DVxxKC IC reference: the 8 bits are significant. Table 163. Get System Info response format when Error_flag is set Response SOF - DS13519 - Rev 4 Response_flags 01h Error code 8 bits CRC16 16 bits Response EOF - page 108/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Response parameter: • Error code as Error_flag is set: – 03h: Option not supported – 0Fh: error with no information given Figure 57. Get System Info frame exchange between VCD and ST25DVxxKC VCD Get System info request SOF EOF t1 ST25DVxxKC 7.6.23 SOF Get System info response EOF Extended Get System Info When receiving the Extended Get System Info command, the ST25DVxxKC sends back its information data in the response. The Option_flag is not supported. The Inventory_flag must be set to 0. The Extended Get System Info can be issued in both Addressed and Non Addressed modes. Table 164. Extended Get System Info request format Request SOF Request_flags Extended Get System Info Parameter request field UID (1) CRC16 Request EOF - 8 bits 0xx1xxxxb 8 bits 64 bits 16 bits - 1. This field is optional. • • • DS13519 - Rev 4 Request flags Request parameters UID (optional) page 109/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Table 165. Parameter request list Bit Flag name b1 DSFID b2 AFI b3 VICC memory size b4 IC reference b5 MOI b6 VICC Command list b7 CSI Information Extended Get System b8 Info parameter Field Value Description 0 No request of DSFID 1 Request of DSFID 0 No request of AFI 1 Request of AFI 0 No request of data field on VICC memory size 1 Request of data field on VICC memory size 0 No request of Information on IC reference 1 Request of Information on IC reference 1 Information on MOI always returned in response flag 0 No request of Data field of all supported commands 1 Request of Data field of all supported commands 0 No request of CSI list 1 Request of CSI list One byte length of Extended Get System 0 Info parameter field Table 166. Extended Get System Info response format when Error_flag is NOT set Response SOF - Response_flags 00h Information flags 8 bits(1) UID DSFID (1) (2) AFI (1) (2) 64 bits 8 bits 8 bits Other Field (1) (2) up to 64 bits (3) Response EOF CRC16 16 bits - 1. See Table 167. Response Information Flag . 2. This field is optional. 3. Number of bytes is function of parameter list selected. Response parameters: • Information flag defining which fields are present • UID code on 64 bits • DSFID value (if requested in Parameters request field) • AFI value (if requested in Parameters request field) • Other fields: – VICC Memory size (if requested in Parameters request field) – ICRef(if requested in Parameters request field) – DS13519 - Rev 4 VICC Command list (if requested in Parameters request field) page 110/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Table 167. Response Information Flag Bit Meaning if bit is set b1 DSFID b2 AFI b3 VICC memory size b4 IC reference b5 MOI b6 VICC Command list b7 b8 Comment 0 DSFID field is not present 1 DSFID field is present 0 AFI field is not present 1 AFI field is present 0 Data field on VICC memory size is not present. 1 Data field on VICC memory size is present. 0 Information on IC reference field is not present. 1 Information on IC reference field is present 0 1 byte addressing 1 2 byte addressing 0 Data field of all supported commands is not present 1 Data field of all supported commands is present CSI Information 0 CSI list is not present Info flag filed 0 One byte length of Info flag field Table 168. Response other field: ST25DVxxKC VICC memory size MSB LSB 24 22 21 RFU 17 16 01 Block size in byte Number of blocks 007Fh (ST25DV04KC) 0h 03h 01FFh (ST25DV16KC) 07FFh (ST25DV64KC) Table 169. Response other field: ST25DVxxKC IC Ref 1 byte ICRef 50h (ST25DV04KC) 51h (ST25DV16KC) 51h (ST25DV64KC) Table 170. Response other field: ST25DVxxKC VICC command list MSB LSB 32 25 24 Byte 4 00h DS13519 - Rev 4 17 16 Byte3 3Fh 09 08 Byte 2 3Fh 01 Byte 1 FFh page 111/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Table 171. Response other field: ST25DVxxKC VICC command list Byte 1 Bit Meaning if bit is set Comment b1 Read single block is supported - b2 Write single block is supported - b3 Lock single block is supported - b4 Read multiple block is supported - b5 Write multiple block is supported - b6 Select is supported including Select state b7 Reset to Ready is supported - b8 Get multiple block security status is supported - Table 172. Response other field: ST25DVxxKC VICC command list Byte 2 Bit Meaning if bit is set Comment b1 Write AFI is supported - b2 Lock AFI is supported - b3 Write DSFID is supported - b4 Lock DSFID is supported - b5 Get System Information is supported - b6 Custom commands are supported - b7 RFU 0 shall be returned b8 RFU 0 shall be returned Table 173. Response other field: ST25DVxxKC VICC command list Byte 3 Bit DS13519 - Rev 4 Meaning if bit is set Comment b1 Extended read single block is supported - b2 Extended write single block is supported - b3 Extended lock single block is supported - b4 Extended read multiple block is supported - b5 Extended write multiple block is supported - b6 Extended Get Multiple Security Status is supported - b7 RFU 0 shall be returned b8 RFU 0 shall be returned page 112/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Table 174. Response other field: ST25DVxxKC VICC command list Byte 4 Bit Meaning if bit is set Comment b1 Read Buffer is supported It means Response Buffer is supported. b2 Select Secure State is supported It means VCD or Mutual authentication are supported. b3 Final Response always includes crypto result It means that flag b3 is set in the Final response. b4 AuthComm crypto format is supported - b5 SecureComm crypto format is supported - b6 KeyUpdate is supported - b7 Challenge is supported - b8 If set to 1 a further byte is transmitted 0 must be returned. Table 175. Extended Get System Info response format when Error_flag is set Response SOF Response_flags - Error code 01h 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set: – 03h: Option not supported – 0Fh: error with no information given Figure 58. Extended Get System Info frame exchange between VCD and ST25DVxxKC VCD SOF Extended Get System Info request ST25DVxxKC 7.6.24 EOF t1 SOF Extended Get System Info response EOF Get Multiple Block Security Status When receiving the Get Multiple Block Security Status command, the sends back its security status for each address block: 0 when block is writable else 1 when block is locked for writing. The blocks security status are defined by the area security status (and by LCK_CCFILE register for blocks 0 and 1). The blocks are numbered from 00h up to the maximum memory block number in the request, and the value is minus one (–1) in the field. For example, a value of “06”, in the “Number of blocks” field requests, returns the security status of seven blocks. This command does not respond an error if number of blocks overlap areas or overlap the end of the user memory. The number of blocks is coded on 1 Byte and only first 256 blocks of ST25DV16KC and ST25DV64KC can be addressed using this command. The Option_flag is not supported. The Inventory_flag must be set to 0. DS13519 - Rev 4 page 113/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Table 176. Get Multiple Block Security Status request format Request SOF Request_flags Get Multiple Block UID (1) Security Status - 2Ch 8 bits First block number Number of blocks 64 bits 8 bits CRC16 Request EOF 8 bits 16 bits - 1. This field is optional. Request parameter: • Request flags • UID (optional) • First block number • Number of blocks Table 177. Get Multiple Block Security Status response format when Error_flag is NOT set Response SOF Response_flags - Block security status 8 bits 8 bits (1) CRC16 Response EOF 16 bits - 1. Repeated as needed. Response parameters: • Block security status Table 178. Block security status b7 b6 b5 b4 b3 b2 b1 b0 Reserved for future use 0: Current block not locked All at 0 1: Current block locked Table 179. Get Multiple Block Security Status response format when Error_flag is set Response SOF Response_flags - Error code 8 bits 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set: – 03h: the option is not supported – 0Fh: error with no information given – 10h: the specified block is not available Figure 59. Get Multiple Block Security Status frame exchange between VCD and VCD ST25DVxxKC DS13519 - Rev 4 SOF Get Multiple Block Security request status EOF t1 SOF Get Multiple Block Security response status EOF page 114/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands 7.6.25 Extended Get Multiple Block Security Status When receiving the Extended Get Multiple Block Security Status command, the ST25DVxxKC sends back the security status for each address block: 0 when the block is writable else 1 when block is locked for writing. The block security statuses are defined by the area security status. The blocks are numbered from 00h up to the maximum memory block number in the request, and the value is minus one (–1) in the field. For example, a value of '06' in the “Number of blocks” field requests to return the security status of seven blocks. This command does not respond an error if number of blocks overlap areas or overlap the end of the user memory. The number of blocks is coded on 2 Bytes so all memory blocks of ST25DV16KC and ST25DV64KC can be addressed using this command. The Option_flag is not supported. The Inventory_flag must be set to 0. Table 180. Extended Get Multiple Block Security Status request format Request SOF Request_flags Extended Get Multiple Block Security Status - 8 bits 3Ch UID(1) First block number Number of blocks CRC16 Request EOF 64 bits 16 bits 16 bits 16 bits - 1. This field is optional. Request parameter: • Request flags • UID (optional) • First block number (from LSB byte to MSB byte) • Number of blocks (from LSB byte to MSB byte) Table 181. Extended Get Multiple Block Security Status response format when Error_flags NOT set Response SOF - Response_flags Block security status CRC16 8 bits (1) 8 bits Response EOF 16 bits - 1. Repeated as needed. Response parameters: • Block security status Table 182. Block security status b7 b6 b5 b4 b3 b2 Reserved for future use b1 b0 0: Current block not locked All at 0 1: Current block locked Table 183. Extended Get Multiple Block Security Status response format when Error_flag is set Response SOF - DS13519 - Rev 4 Response_flags 8 bits Error code 8 bits CRC16 16 bits Response EOF - page 115/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Response parameter: • Error code as Error_flag is set: – 03h: the option is not supported – 0Fh: error with no information given – 10h: the specified block is not available Figure 60. Extended Get Multiple Block Security Status frame exchange between VCD and ST25DVxxKC VCD ST25DVxxKC DS13519 - Rev 4 SOF Extended Get Multiple Block Security request status EOF t1 SOF Extended Get Multiple Block Security response status EOF page 116/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands 7.6.26 Read Configuration On receiving the Read Configuration command, the ST25DVxxKC reads the static system configuration register at the Pointer address and sends back its 8-bit value in the response. The Option_flag is not supported. The Inventory_flag must be set to 0. Table 184. Read Configuration request format Request SOF Request_flags - 8 bits Read Configuration A0h IC Mfg code 02h UID (1) Pointer CRC16 64 bits 8 bits 16 bits Request EOF - 1. This field is optional. Note: Please refer to Table 13. System configuration memory map for details on register addresses. Request parameters: • System configuration register pointer • UID (optional) Table 185. Read Configuration response format when Error_flag is NOT set Response SOF Response_flags - Register value 8 bits 8 bits CRC16 Response EOF 16 bits - Response parameters: • One byte of data: system configuration register Table 186. Read Configuration response format when Error_flag is set Response SOF Response_flags - Error code 8 bits 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set – 02h: command not recognized – 03h: the option is not supported – 10h: block not available – 0Fh: error with no information given Figure 61. Read Configuration frame exchange between VCD and ST25DVxxKC VCD ST25DVxxKC DS13519 - Rev 4 SOF Read Configuration request EOF t1 SOF Read Configuration response EOF page 117/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands 7.6.27 Write Configuration The Write Configuration command is used to write static system configuration register. The Write Configuration must be preceded by a valid presentation of the RF configuration password (00) to open the RF configuration security session. On receiving the Write Configuration command, the ST25DVxxKC writes the data contained in the request to the system configuration register at the Pointer address and reports whether the write operation was successful in the response or not. When the Option_flag is set, wait for EOF to respond. The Inventory_flag is not supported. During the RF write cycle Wt, there should be no modulation (neither 100% nor 10%), otherwise the ST25DVxxKC may not program correctly the data into the Configuration byte. The Wt time is equal to t1nom + N × 302 µs (N is an integer). Table 187. Write Configuration request format Request SOF - Request_flags 8 bits Write Configuration A1h IC Mfg code 02h Register value(2) UID (1) Pointer 64 bits 8 bits Request EOF CRC16 8 bits 16 bits - 1. This field is optional. 2. Before updating the register value, check the meaning of each bit in previous sections. Request parameters: • Request flags • Register pointer • Register value • UID (optional) Table 188. Write Configuration response format when Error_flag is NOT set Response SOF Response_flags - Note: 8 bits CRC16 16 bits Response EOF - Please refer to Table 13. System configuration memory map for details on register addresses. Response parameter: • No parameter. The response is sent back after the writing cycle. Table 189. Write configuration response format when Error_flag is set Response SOF - Response_flags 8 bits Error code 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set: – 02h: command not recognized – 03h: command option is not supported – 0Fh: error with no information given – 10h: block not available – 12h: block already locked, content can't change – 13h: the specified block was not successfully programmed DS13519 - Rev 4 page 118/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Figure 62. Write Configuration exchange between VCD and ST25DVxxKC SOF VCD Write Configuration request EOF t1 ST25DVxxKC Write Configuration sequence when error EOF Write Configuration response SOF Wt ST25DVxxKC 7.6.28 Write Configuration response SOF EOF Read Dynamic Configuration On receiving the Read Dynamic Configuration command, the ST25DVxxKC reads the Dynamic register address indicated by the pointer and sends back its 8-bit value in the response. The Option_flag is not supported. The Inventory_flag must be set to 0. Table 190. Read Dynamic Configuration request format Read Dynamic Configuration Request SOF Request_flags - 8 bits ADh IC Mfg code UID (1) Pointer address CRC16 Request EOF 02h 64 bits 8 bits 16 bits - 1. This field is optional. Request parameters: • UID (Optional) Table 191. Read Dynamic Configuration response format when Error_flag is NOT set Response SOF - Response_flags 8 bits Data 8 bits CRC16 16 bits Response EOF - Response parameters: • One byte of data Note: Please refer to Table 13. System configuration memory mapfor details on register addresses. Table 192. Read Dynamic Configuration response format when Error_flag is set Response SOF - Response_flags 8 bits error code 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set: – 02h: command not recognized – 03h: command option not supported – 0Fh: error given with no information – 10h: block not available DS13519 - Rev 4 page 119/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Figure 63. Read Dynamic Configuration frame exchange between VCD and ST25DVxxKC VCD Read Dynamic Configuration request SOF EOF ST25DVxxKC 7.6.29 t1 Read Dynamic Configuration response SOF EOF Write Dynamic Configuration On receiving the Write Dynamic Configuration command, the ST25DVxxKC updates the Dynamic register addressed by the pointer. The Option_flag is not supported. The Inventory_flag must be set to 0. Table 193. Write Dynamic Configuration request format Request SOF - Request_flags 8 bits Write Dynamic Configuration AEh IC Mfg code 02h UID (1) Pointer address 64 bits 8 bits Register value 8 bits Request EOF CRC16 16 bits - 1. This field is optional. Request parameters: • Request flags • UID (Optional) • Pointer address • Register value Table 194. Write Dynamic Configuration response format when Error_flag is NOT set Response SOF Response_flags - CRC16 8 bits Response EOF 16 bits - Response parameters: • No parameter. The response is sent back after t1. Table 195. Write Dynamic Configuration response format when Error_flag is set Response SOF - Response_flags 8 bits error code 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set: – 02h: command not recognized – 03h: command option not supported – 0Fh: error with no information given – 10h: block not available DS13519 - Rev 4 page 120/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Figure 64. Write Dynamic Configuration frame exchange between VCD and ST25DVxxKC VCD 7.6.30 Write Dynamic Configuration request SOF EOF ST25DVxxKC t1 SOF Write Dynamic Configuration response EOF Write Dynamic Configuration sequence when no error ST25DVxxKC t1 SOF Write Dynamic Configuration response EOF Write Dynamic Configuration sequence when error Manage GPO On receiving the Manage GPO command. Depending on the command argument, the ST25DVxxKC force the GPO output level if RF_USER interrupt is enabled, or send a pulse on GPO output if RF_INTERRUPT is enabled. If neither RF_USER nor RF_INTERRUPT was enabled, the command is not executed and ST25DVxxKC responds an Error code “0F”. The IT duration is defined by IT_TIME bits 4 to 2 of GPO2 static register and occurs just after the command response. For the 12- pin package ST25DVxxKC version (CMOS GPO output): • Set means that the GPO pin is driven to a High level (VDCG). • Reset pulls the GPO pin to a low level (VSS). • The IT corresponds to a transmission of a positive pulse on the GPO pin. For the 12 pin package ST25DVxxKC version (open drain GPO output): • Set means that the GPO pin is driven to a low level (VSS). • Reset releases the GPO (High impedance). Thanks to an external pull-up, the high level is recovered. • IT corresponds to the GPO pin driven to ground during the IT duration, then pin is released. Option_flag is not supported. The Inventory_flag must be set to 0. Table 196. Manage GPO request format Request SOF - Request_ flags 8 bits Manage GPO A9h IC Mfg code 02h UID (1) 64 bits GPO VAL(2) 8 bits CRC16 16 bits Request EOF - 1. This field is optional. 2. See Table 197. GPOVAL Table 197. GPOVAL GPOVAL IT 0xxxxxx0b RF_USER enabled Pin pull to 0 0xxxxxx1b RF_USER enabled Pin released (HZ) 1xxxxxxxb RF_INTERRUPT enabled GPO pin pulled to 0 during IT Time then released (HZ) Any other conditions DS13519 - Rev 4 GPO pin output GPO released (Hz) page 121/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Request parameters: • Request flag • UID (optional) • Data: Define static or dynamic Interrupt Table 198. Manage GPO response format when Error_flag is NOT set Response SOF Response_flags - CRC16 8 bits Response EOF 16 bits - Response parameter: • No parameter. The response is sent back after the write cycle. Table 199. ManageGPO response format when Error_flag is set Response SOF - Response_flags 8 bits Error code CRC16 8 bits 16 bits Response EOF - Response parameter: • Error code as Error_flag is set: – 02h: command not recognized – 13h: the specified block was not successfully programmed (this error is generated if the ManageGPO GPOVAL value is not in line with the GPO interrupts setting as specified in Table 197. GPOVAL) Figure 65. Manage GPO frame exchange between VCD and ST25DVxxKC SOF VCD ManageGPO request t1 ST25DVxxKC 7.6.31 EOF SOF ManageGPO response EOF Write Message On receiving the Write Message command, the ST25DVxxKC puts the data contained in the request into the Mailbox buffer, update the MB_LEN_Dyn register, and set bit RF_PUT_MSG in MB_CTRL_Dyn register. It then reports if the write operation was successful in the response. The ST25DVxxKC Mailbox contains up to 256 data bytes which are filled from the first location '00'. MSGlength parameter of the command is the number of Data bytes minus - 1 (00 for 1 byte of data, FFh for 256 bytes of data). Write Message could be executed only when Mailbox is accessible by RF (fast transfer mode is enabled, previous RF message was read or time-out occurs, no I2C message to be read). User can check it by reading b1 of MB_CTRL_Dyn “HOST_PUT_MSG” which must be reset to “0”. The Option_flag is not supported. (refer to Section 5.1 Fast transfer mode (FTM)). Table 200. Write Message request format Request SOF - Request_ flags 8 bits Write Message AAh IC Mfg code 02h UID (1) MSGLength 64 bits 1 byte Message Data (MSGLength + 1) bytes Request EOF CRC16 16 bits - 1. This field is optional. DS13519 - Rev 4 page 122/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Request parameters: • Request flags • UID (optional) • Message Length • Message Data Table 201. Write Message response format when Error_flag is NOT set Response SOF Response_flags - CRC16 8 bits Response EOF 16 bits - Response parameter: • No parameter. The response is sent back after the write cycle. Table 202. Write Message response format when Error_flag is set Response SOF Response_flags - Error code 8 bits 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set: – 02h: command not recognized – 03h: command option not supported – 0Fh: error with no information given Figure 66. Write Message frame exchange between VCD and ST25DVxxKC VCD 7.6.32 SOF Write Message request EOF ST25DVxxKC t1 SOF Write Message response EOF ST25DVxxKC t1 SOF Write Message response EOF Write sequence when error Read Message Length On receiving the Read Message Length command, the ST25DVxxKC reads the MB_LEN_Dyn register which contains the Mailbox message length and sends back its 8-bit value in the response. The value of MB_LEN_Dyn returned is the (size of the message length in Bytes - 1). The Option_flag is not supported. The Inventory_flag must be set to 0. DS13519 - Rev 4 page 123/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Table 203. Read Message Length request format Request SOF Request_flags - 8 bits Read Message Length IC Mfg code ABh 02h UID (1) CRC16 64 bits 16 bits Request EOF - 1. The field is optional. Request parameters: • UID (Optional) Table 204. Read Message Length response format when Error_flag is NOT set Response SOF - Response_flags 8 bits Data 8 bits CRC16 16 bits Response EOF - Response parameters: • One byte of data: MB_LEN_Dyn register value Table 205. Read Message Length response format when Error_flag is set Response SOF Response_flags - error code 8 bits CRC16 8 bits 16 bits Response EOF - Response parameter: • Error code as Error_flag is set: – 02h: command not recognized – 03h: command option not supported – 0Fh: error given with no information Figure 67. Read Message Length frame exchange between VCD and ST25DVxxKC VCD ST25DVxxKC 7.6.33 SOF Read Message Length request EOF t1 SOF Read Message Length response EOF Read Message On receiving the Read Message command, the ST25DVxxKC reads up to 256 byte in the Mailbox from the location specified by MBpointer and sends back their value in the response. First MailBox location is '00’. When Number of bytes is set to 00h and MBPointer is equals to 00h, the MB_LEN bytes of the full message are returned. Otherwise, Read Message command returns (Number of Bytes + 1) bytes (i.e. 01h returns 2 bytes, FFh returns 256 bytes). An error is reported if (Pointer + Nb of bytes + 1) is greater than the message length. RF Reading of the last byte of the mailbox message automatically clears b1 of MB_CTRL_Dyn “HOST_PUT_MSG”, and allows RF to put a new message. The Option_flag is not supported. The Inventory_flag must be set to 0. DS13519 - Rev 4 page 124/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Table 206. Read Message request format Request SOF - Request_flags 8 bits Read Message ACh IC Mfg code 02h UID (1) MBpointer 64 bits 8 bits Number of Bytes 8 bits Request EOF CRC16 16 bits - 1. This field is optional. Request parameters: • Request flag • UID (Optional) • Pointer (start at 00h) • Number of bytes is one less then the requested data Table 207. Read Message response format when Error_flag is NOT set Response SOF - Response_flags 8 bits Mailbox content (Number of bytes + 1) bytes (1) CRC16 16 bits Response EOF - 1. Number of message Bytes when Number of Bytes is set to 00h. Response parameters: • (number of data + 1 ) data bytes Response parameter: • Error code as Error_flag is set: – 02h: command not recognized – 03h: command option not supported – 0Fh: error with no information given Figure 68. Read Message frame exchange between VCD and ST25DVxxKC VCD SOF ST25DVxxKC 7.6.34 Read Message request EOF t1 SOF Read Message response EOF Fast Read Message On receiving the Fast Read Message command, the ST25DVxxKC reads up to 256 byte in the Mailbox from the location specified by MBpointer and sends back their value in the response. First MailBox location is '00’. When Number of bytes is set to 00h and MBPointer is equals to 00h, the MB_LEN bytes of the full message are returned. Otherwise, Fast Read Message command returns (Number of Bytes + 1) bytes (i.e. 01h returns 2 bytes, FFh returns 256 bytes). An error is reported if (Pointer + Nb of bytes + 1) is greater than the message length.. RF Reading of the last byte of mailbox message automatically clears b1 of MB_CTRL_Dyn “HOST_PUT_MSG” and allows RF to put a new message. The data rate of the response is multiplied by 2 compated to Read Message. DS13519 - Rev 4 page 125/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands The subcarrier_flag should be set to 0, otherwise the ST25DVxxKC answers with an error code. The Option_flag is not supported, and the Inventory_flag must be set to 0. Table 208. Fast Read Message request format Request SOF Request_flags Fast Read Message IC Mfg code - 8 bits CCh 02h UID(1) MBpointer 64 bits 8 bits Number of Bytes CRC16 Request EOF 8 bits 16 bits - 1. This field is optional Request parameters: • Request flag • UID (Optional) • Pointer (start at 00h) • Number of bytes is one less than the requested data Table 209. Fast Read Message response format when Error_flag is NOT set Response SOF Response_flags - 8 bits Mailbox content (Number of bytes + 1) bytes(1) CRC16 Response EOF 16 bits 64 bits 1. Number of message Bytes when Number of Bytes is set to 00h Response parameters: • (number of bytes + 1) data bytes Response parameter: • Error code as Error_flag is set: – 02h: command not recognized – 03h: command option not supported – 0Fh: error with no information given Figure 69. Fast Read Message frame exchange between VCD and ST25DVxxKC VCD ST25DVxxKC 7.6.35 SOF Fast Read Message request EOF t1 SOF Fast Read Message response EOF Write Password On receiving the Write Password command, the ST25DVxxKC uses the data contained in the request to write the password and reports whether the operation was successful in the response. It is possible to modify a Password value only after issuing a valid Present password command (of the same password number). When the Option_flag is set, wait for EOF to respond. Refer to Section 5.6 Data protection for details on password Management. The Inventory_flag must be set to 0. During the RF write cycle time, Wt, there must be no modulation at all (neither 100% nor 10%), otherwise the ST25DVxxKC may not correctly program the data into the memory. DS13519 - Rev 4 page 126/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands The Wt time is equal to t1nom + N × 302 µs (N is an integer). After a successful write, the new value of the selected password is automatically activated. It is not required to present the new password value until the ST25DVxxKC power-down. Caution: If ST25DVxxKC is powered through VCC, removing VCC during Write Password command can abort the command. As a consequence, before writing a new password, RF user should check if VCC is ON, by reading EH_CTRL_Dyn register bit 3 (VCC_ON), and eventually ask host to maintain or to shut down VCC, during the Write Password command in order to avoid password corruption. To make the application more robust, it is recommended to use addressed or selected mode during write password operations to get the traceability of which tags/UID have been programmed Table 210. Write Password request format Request SOF Request_flags Write password IC Mfg code UID (1) Password number Data CRC16 Request EOF - 8 bits B1h 02h 64 bits 8 bits 64 bits 16 bits - 1. This field is optional. Request parameter: • Request flags • UID (optional) • Password number: – 00h = RF configuration password RF_PWD_0, – 01h = RF_PWD_1, – 02h = RF_PWD_2, – 03h = RF_PWD_3, – other = Error • Data Table 211. Write Password response format when Error_flag is NOT set Response SOF Response_flags - CRC16 8 bits Response EOF 16 bits - Response parameter: • no parameter. Table 212. Write Password response format when Error_flag is set Response SOF - Response_flags 8 bits Error code 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set: – 02h: command not recognized – 03h: command option not supported – 10h: the password number is incorrect – 12h: update right not granted, Present Password command not previously executed successfully – 13h: the specified block was not successfully programmed DS13519 - Rev 4 page 127/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Figure 70. Write Password frame exchange between VCD and ST25DVxxKC SOF VCD Write Password request EOF t1 ST25DVxxKC Wt ST25DVxxKC 7.6.36 Write Password response SOF EOF SOF Write sequence when error Write Password response EOF Present Password On receiving the Present Password command, the ST25DVxxKC compares the requested password with the data contained in the request and reports if the operation has been successful in the response. Refer to Section 5.6 Data protection for details on password Management. After a successful command, the security session associate to the password is open as described in Section 5.6 Data protection. The Option_flag is not supported, and the Inventory_flag must be set to 0. Table 213. Present Password request format Request SOF - Request_flags 8 bits Present Password B3h IC Mfg code 02h Password number UID (1) 64 bits 8 bits Request EOF Password CRC16 64 bits 16 bits - 1. This field is optional. Request parameter: • Request flags • UID (optional) • Password Number: – 00h = RF configuration password RF_PWD_0 – 01h = RF_PWD_1 – 02h = RF_PWD_2 – 03h = RF_PWD_3 – other = Error • Password Table 214. Present Password response format when Error_flag is NOT set Response SOF - Response_flags 8 bits CRC16 16 bits Response EOF - Response parameter: • No parameter. The response is sent back after the write cycle. DS13519 - Rev 4 page 128/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Table 215. Present Password response format when Error_flag is set Response SOF Response_flags - Error code 8 bits 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set: – 02h: command not recognized – 03h: command option not supported – 0Fh: the present password is incorrect – 10h: the password number is incorrect Figure 71. Present Password frame exchange between VCD and ST25DVxxKC VCD SOF Present Password request EOF t1 ST25DVxxKC 7.6.37 Present Password response SOF EOF Fast Read Single Block On receiving the Fast Read Single Block command, the ST25DVxxKC reads the requested block and sends back its 32-bit value in the response. When the Option_flag is set, the response includes the Block Security Status. The data rate of the response is multiplied by 2. The subcarrier_flag should be set to 0, otherwise the ST25DVxxKC answers with an error code. The Inventory_flag must be set to 0. Block number is coded on 1 Byte and only first 256 blocks of ST25DV16KC and ST25DV64KC can be addressed using this command. Table 216. Fast Read Single Block request format Request SOF Request_flags Fast Read Single Block IC Mfg code UID (1) Block number CRC16 Request EOF - C0h 02h 8 bits 64 bits 8 bits 16 bits - 1. This field is optional. Request parameters: • Request flags • UID (optional) • Block number Table 217. Fast Read Single Block response format when Error_flag is NOT set Response SOF - Response_flags 8 bits Block security status (1) 8 bits Data 32 bits CRC16 16 bits Response EOF - 1. This field is optional. Response parameters: DS13519 - Rev 4 page 129/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands • • Block security status if Option_flag is set (see Table 218) Four bytes of block data Table 218. Block security status b7 b6 b5 b4 b3 b2 b1 b0 Reserved for future use 0: Current Block not locked All at 0 1: Current Block locked Table 219. Fast Read Single Block response format when Error_flag is set Response SOF Response_flags - Error code 8 bits 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set: – 02h: command not recognized – 03h: command option not supported – 0Fh: error with no information given – 10h: the specified block is not available – 15h: the specified block is read-protected Figure 72. Fast Read Single Block frame exchange between VCD and ST25DVxxKC VCD SOF Fast Read Single Block request EOF t1 ST25DVxxKC 7.6.38 SOF Fast Read Single Block response EOF Fast Extended Read Single Block On receiving the Fast Extended Read Single Block command, the ST25DVxxKC reads the requested block and sends back its 32-bit value in the response. When the Option_flag is set, the response includes the Block Security Status. The data rate of the response is multiplied by 2. The subcarrier_flag should be set to 0, otherwise the ST25DVxxKC answers with an error code. The Inventory_flag must be set to 0. Block number is coded on 2 Bytes so all memory blocks of ST25DV16KC and ST25DV64KC can be addressed using this command Table 220. Fast Extended Read Single Block request format Request SOF - Request_flags Fast Extended Read Single Block IC Mfg code UID (1) Block number CRC16 Request EOF 8 bits C4h 02h 64 bits 16 bits 16 bits - 1. This field is optional. DS13519 - Rev 4 page 130/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Request parameters: • Request flags • UID (optional) • Block number (from LSB byte to MSB byte) Table 221. Fast Extended Read Single Block response format when Error_flag is NOT set Response SOF Block security status (1) Response_flags - 8 bits 8 bits Data 32 bits CRC16 16 bits Response EOF - 1. This field is optional. Response parameters: • Block security status if Option_flag is set (see the table below) • Four bytes of block data Table 222. Block security status b7 b6 b5 b4 b3 b2 b1 b0 Reserved for future use 0: Current Block not locked All at 0 1: Current Block locked Table 223. Fast Extended Read Single Block response format when Error_flag is set Response SOF Response_flags - Error code 8 bits 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set: – 02h: command not recognized – 03h: command option not supported – 0Fh: error with no information given – 10h: the specified block is not available – 15h: the specified block is read-protected Figure 73. Fast Extended Read Single Block frame exchange between VCD and ST25DVxxKC VCD ST25DVxxKC DS13519 - Rev 4 SOF Fast Extended Read Single Block request EOF t1 SOF Fast Extended Read Single Block response EOF page 131/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands 7.6.39 Fast Read Multiple Blocks On receiving the Fast Read Multiple Blocks command, the ST25DVxxKC reads the selected blocks and sends back their value in multiples of 32 bits in the response. The blocks are numbered from 00h up to the last block of user memory in the request, and the value is minus one (–1) in the field. For example, if the “Number of blocks” field contains the value 06h, seven blocks are read. The maximum number of blocks is fixed to 256. Fast Read Multiple Blocks command can cross areas borders, and returns all blocks until reaching a non readable block (block read protected or out of memory). When the Option_flag is set, the response includes the Block Security Status. The data rate of the response is multiplied by 2. The subcarrier_flag should be set to 0, otherwise the ST25DVxxKC answers with an error code. The Inventory_flag must be set to 0. Block number is coded on 1 Byte and only first 256 blocks of ST25DV16KC and ST25DV64KC can be addressed using this command. Table 224. Fast Read Multiple Block request format Request SOF - Request_flags Fast Read Multiple Block 8 bits C3h IC Mfg code UID (1) 02h First block number 64 bits 8 bits Number of blocks 8 bits Request EOF CRC16 16 bits - 1. This field is optional. Request parameters: • Request flag • UID (Optional) • First block number • Number of blocks Table 225. Fast Read Multiple Block response format when Error_flag is NOT set Response SOF - Block security status (1) Response_flags 8 bits (2) 8 bits Data 32 bits(2) CRC16 16 bits Response EOF - 1. This field is optional. 2. Repeated as needed. Response parameters: • Block security status if Option_flag is set (see Table 226) • N block of data Table 226. Block security status if Option_flag is set b7 b6 b5 b4 b3 b2 b1 b0 Reserved for future use 0: Current not locked All at 0 1: Current locked Table 227. Fast Read Multiple Block response format when Error_flag is set Response SOF - DS13519 - Rev 4 Response_flags 8 bits Error code 8 bits CRC16 16 bits Response EOF - page 132/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Response parameter: • Error code as Error_flag is set: – 02h: command not recognized – 0Fh: error with no information given – 03h: the option is not supported – 10h: block address not available – 15h: block read-protected Figure 74. Fast Read Multiple Block frame exchange between VCD and ST25DVxxKC VCD SOF Fast Read Multiple block request EOF t1 ST25DVxxKC 7.6.40 SOF Fast Read Multiple block response EOF Fast Extended Read Multiple Block On receiving the Fast Extended Read Multiple Block command, the ST25DVxxKC reads the selected blocks and sends back their value in multiples of 32 bits in the response. The blocks are numbered from 00h to up to the last block of memory in the request and the value is minus one (–1) in the field. For example, if the “Number of blocks” field contains the value 06h, seven blocks are read. The maximum number of blocks is fixed to 2047. Fast Extended Read Multiple Blocks command can cross areas borders, and returns all blocks until reaching a non readable block (block read protected or out of memory). When the Option_flag is set, the response includes the Block Security Status. The data rate of the response is multiplied by 2. The subcarrier_flag should be set to 0, otherwise the ST25DVxxKC answers with an error code. The Inventory_flag must be set to 0. Block number is coded on 2 Bytes so all memory blocks of ST25DV16KC and ST25DV64KC can be addressed using this command. Table 228. Fast Extended Read Multiple Block request format Request SOF - Request_flags 8 bits Fast Extended Read Multiple Block C5h IC Mfg code 02h UID (1) First block number 64 bits 16 bits Block Number 16 bits Request EOF CRC16 16 bits - 1. This field is optional. Request parameters: • Request flag • UID (Optional) • First block number (from LSB byte to MSB byte) • Number of blocks (from LSB byte to MSB byte) DS13519 - Rev 4 page 133/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Table 229. Fast Extended Read Multiple Block response format when Error_flag is NOT set Response SOF Block security status (1) Response_flags - 8 bits 8 Data bits(2) 32 bits(2) CRC16 16 bits Response EOF - 1. This field is optional. 2. Repeated as needed Response parameters: • Block security status if Option_flag is set (see Table 230) • N block of data Table 230. Block security status if Option_flag is set b7 b6 b5 b4 b3 b2 b1 b0 Reserved for future 0: Current not locked use All at 0 1: Current locked Table 231. Fast Read Multiple Block response format when Error_flag is set Response SOF Response_flags - Error code 8 bits 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set: – 02h: command not recognized – 03h: the option is not supported – 0Fh: error with no information given – 10h: block address not available – 15h: block read-protected Figure 75. Fast Extended Read Multiple Block frame exchange between VCD and ST25DVxxKC VCD SOF ST25DVxxKC 7.6.41 Fast Extended Read Multiple Block request EOF t1 SOF Fast Extended Read Multiple Block response EOF Fast Write Message On receiving the Fast Write Message command, the ST25DVxxKC puts the data contained in the request into the mailbox buffer, updates the Message Length register MB_LEN_Dyn, and set Mailbox loaded bit RF_PUT_MSG. It then reports if the write operation was successful in the response. The ST25DVxxKC mailbox contains up to 256 data bytes which are filled from the first location '00'. MSGlength parameter of the command is the number of Data bytes minus - 1 (00 for 1 byte of data, FFh for 256 bytes of data). Fast Write Message can be executed only when Mailbox is accessible by RF (previous RF message was read or time-out occurs, no I2C message to be read). User can check it by reading b1 of MB_CTRL_Dyn “HOST_PUT_MSG”, which must be reset to “0”. (refer to Section 5.1 Fast transfer mode (FTM)). • The data rate of the response is multiplied by 2 compared to Write Message command. DS13519 - Rev 4 page 134/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands • • • The Option_flag is not supported. The Inventory_flag must be set to 0. The subcarrier_flag should be set to 0, otherwise the ST25DVxxKC answers with an error code. Table 232. Fast Write Message request format Request SOF - Request_flags 8 bits Fast Write Message CAh IC Mfg code 02h UID (1) MSGLength Message Data (MsgLenght + 1) bytes 64 bits 1 byte Request EOF CRC16 16 bits - 1. This field is optional. Request parameters: • Request flag • UID (optional) • Message Lenght • Message Data Table 233. Fast Write Message response format when Error_flag is NOT set Response SOF Response_flags - CRC16 8 bits Response EOF 16 bits - Response parameters: • No parameter. The response is sent back after the write cycle. Table 234. Fast Write Message response format when Error_flag is set Response SOF - Response_flags 8 bits Error code 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set: – 02h: command not recognized – 03h: command option not supported – 0Fh: error with no information given DS13519 - Rev 4 page 135/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Figure 76. Fast Write Message frame exchange between VCD and ST25DVxxKC SOF VCD 7.6.42 Fast Write Message request EOF ST25DVxxKC t1 SOF Fast Write Message response EOF Write sequence when error ST25DVxxKC t1 SOF Fast Write Message response EOF Write sequence when no error Fast Read Message Length On receiving the Fast Read Message Length command, the ST25DVxxKC reads the MB_LEN_dyn register which contains the mailbox message length and sends back its 8-bit value in the response. The value of MB_LEN_Dyn returned is the (size of the message length in Bytes - 1). The Option_flag is not supported. The Inventory_flag must be set to 0. The subcarrier_flag should be set to 0, otherwise the ST25DVxxKC answers with an error code. The data rate of the response is multiplied by 2 compared to Read Message Length command. Table 235. Fast Read Message Length request format Request SOF - Request_flags Fast Read Message Length 8 bits UID (1) IC Mfg code CBh 02h CRC16 64 bits 16 bits Request EOF - 1. This field is optional. Request parameters: • Request flag • UID (optional) Table 236. Fast Read Message Length response format when Error_flag is NOT set Response SOF - Response_flags 8 bits Data 8 bits CRC16 16 bits Response EOF - Response parameters: • One byte of data: volatile Control register. Table 237. Fast Read Message Length response format when Error_flag is set Response SOF - DS13519 - Rev 4 Response_flags 8 bits Error code 8 bits CRC16 16 bits Response EOF - page 136/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Response parameter: • Error code as Error_flag is set: – 02h: command option not recognized – 03h: command not supported – 0Fh: error with no information given Figure 77. Fast Read Message Length frame exchange between VCD and ST25DVxxKC VCD Fast Read Message Length request SOF EOF t1 ST25DVxxKC 7.6.43 Fast Read Message Length response SOF EOF Fast Read Dynamic configuration On receiving the Fast Read Dynamic configuration command, the ST25DVxxKC reads the Dynamic register address by the pointer and sends back its 8-bit value in the response. The Option_flag is not supported. The Inventory_flag must be set to 0. The subcarrier_flag should be set to 0, otherwise the ST25DVxxKC answers with an error code. The data rate of the response is multiplied by 2 compared to Read Dynamic configuration command. Table 238. Fast Read Dynamic configuration request format Fast Read Dynamic configuration Request SOF Request_flags - 8 bits CDh IC Mfg code UID (1) Pointer address CRC16 Request EOF 02h 64 bits 8 bits 16 bits - 1. This field is optional. Request parameters: • Request flag • UID (optional) Table 239. Fast Read Dynamic configuration response format when Error_flag is NOT set Response SOF - Response_flags 8 bits Data 8 bits CRC16 16 bits Response EOF - Response parameters: • One byte of data Table 240. Fast Read Dynamic configuration response format when Error_flag is set Response SOF - DS13519 - Rev 4 Response_flags 8 bits Error code 8 bits CRC16 16 bits Response EOF - page 137/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Response parameter: • Error code as Error_flag is set: – 02h: command not recognized – 03h: command option not supported – 0Fh: error with no information given – 10h: block not available Figure 78. Fast Read Dynamic configuration frame exchange between VCD and ST25DVxxKC VCD SOF Fast Read Dynamic configuration request EOF t1 ST25DVxxKC 7.6.44 SOF Fast Read Dynamic configuration request EOF Fast Write Dynamic Configuration On receiving the Fast Write Dynamic Configuration command, the ST25DVxxKC updates the Dynamic register addressed by the pointer. The Option_flag is not supported. The Inventory_flag must be set to 0. The data rate of the response is multiplied by 2 compared to Write Dynamic Configuration command. Table 241. Fast Write Dynamic Configuration request format Request SOF - Request_flags 8 bits Fast Write Dynamic Configuration CEh IC Mfg code 02h UID (1) Pointer address 64 bits 8 bits Register Value 8 bits Request EOF CRC16 16 bits - 1. This field is optional. Request parameters: • Request flag • UID (optional) • Pointer address • Register value Table 242. Fast Write Dynamic Configuration response format when Error_flag is NOT set Response SOF - Response_flags 8 bits CRC16 16 bits Response EOF - Response parameters: • No parameter. The response is sent back after t1. DS13519 - Rev 4 page 138/203 ST25DV04KC ST25DV16KC ST25DV64KC RF commands Table 243. Fast Write Dynamic Configuration response format when Error_flag is set Response SOF - Response_flags 8 bits Error code 8 bits CRC16 16 bits Response EOF - Response parameter: • Error code as Error_flag is set: – 02h: command not recognized – 03h: command option not supported – 0Fh: error with no information given – 10h: block not available Figure 79. Fast Write Dynamic Configuration frame exchange between VCD and ST25DVxxKC VCD DS13519 - Rev 4 SOF Fast Write Dynamic configuration EOF request ST25DVxxKC t1 Fast Write SOF Dynamic configuration EOF request Write sequence when error ST25DVxxKC t1 Fast Write SOF Dynamic configuration EOF request Write sequence when no error page 139/203 ST25DV04KC ST25DV16KC ST25DV64KC Unique identifier (UID) 8 Unique identifier (UID) The ST25DVxxKC is uniquely identified by a 64-bit unique identifier (UID). This UID complies with ISO/IEC 15963 and ISO/IEC 7816-6. The UID is a read-only code and comprises: • eight MSBs with a value of E0h • the IC manufacturer code “ST 02h” on 8 bits (ISO/IEC 7816-6/AM1) • a unique serial number on 48 bits Table 244. UID format MSB 63 56 0xE0 LSB 55 48 0x02 47 40 ST product code (1) 39 0 Unique serial number 1. See Table 86. UID for ST product code value definition. With the UID, each ST25DVxxKC can be addressed uniquely and individually during the anticollision loop and for one-to-one exchanges between a VCD and an ST25DVxxKC. DS13519 - Rev 4 page 140/203 ST25DV04KC ST25DV16KC ST25DV64KC Device parameters 9 Device parameters 9.1 Maximum rating Stressing the device above the rating listed in Table 245 may cause permanent damage to the device. These are stress ratings only and operation of the device, at these or any other conditions above those indicated in the operating sections of this specification, is not implied. Exposure to absolute maximum rating conditions for extended periods may affect the device reliability. Device mission profile (application conditions) is compliant with JEDEC JESD47 qualification standard. Extended mission profiles can be assessed on demand. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 245. Absolute maximum ratings Symbol Parameter Range 6 TA Min. RF and All packages -40 85 °C - 40 105 °C RF interface - 40 105 °C I2C - 40 125 °C - 65 150 °C I2C interfaces UFDFPN8, UFDFPN12 Ambient operating temperature Range 8 SO8N, TSSOP Max. Unit RF and I2C interfaces interface TSTG Storage temperature TLEAD Lead temperature during soldering see note (1) °C VIO I2C input or output range - 0.50 6.5 V VCC I2C supply voltage - 0.50 6.5 V IOL_MAX_SDA DC output current on pin SDA (when equal to 0) - 5 mA IOL_MAX_GPO DC output current on pin GPO (when equal to 0) - 1.5 mA - 11 V UFDFPN8 (MLP8),SO8N, TSSOP8, UFDFPN12, WLCSP10 VMAX_1 RF input voltage amplitude peak to peak between AC0 and AC1, VSS pin left VMAX_2 AC voltage between AC0 and VSS, or AC1 and VSS (2) VESD Electrostatic discharge voltage (human body model) (3) floating(2) VAC0 - VAC1 VAC0 - VSS, or VAC1 - VSS All pins - 0.50 5.5 - V 2000 V 1. Compliant with JEDEC Std J-STD-020C (for small body, Sn-Pb or Pb assembly), the ST ECOPACK 7191395 specification, and the European directive on Restrictions on Hazardous Substances (RoHS) 2002/95/EU. 2. Evaluated By Characterization – Not tested in production. 3. AEC-Q100-002 (compliant with JEDEC Std JESD22-A114, C1 = 100 pF, R1 = 1500 Ω, R2 = 500 Ω) DS13519 - Rev 4 page 141/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C DC and AC parameters 9.2 I²C DC and AC parameters This section summarizes the operating and measurement conditions, and the DC and AC characteristics of the device in I2C mode. The parameters in the DC and AC characteristic tables that follow are derived from tests performed under the measurement conditions summarized in the relevant tables. Designers should check that the operating conditions in their circuit match the measurement conditions when relying on the quoted parameters. Table 246. I²C operating conditions Symbol Parameter Min. Max. Unit VCC Supply voltage 1.8 5.5 V All packages -40 85 °C UFDFPN8, UFDFPN12 -40 105 °C SO8N, TSSOP8 -40 125 °C Range 6 TA Ambient operating temperature Range 8 Table 247. AC test measurement conditions Symbol Parameter Min. Max. Unit CL Load capacitance 100 tr, tf Input rise and fall times - Vhi-lo Input levels 0.2VCC to 0.8VCC V Vref(t) Input and output timing reference levels 0.3VCC to 0.7VCC V pF 50 ns Figure 80. AC test measurement I/O waveform Input and Output Timing Reference Levels Input Levels 0.8VCC 0.7VCC 0.3VCC 0.2VCC Table 248. Input parameters Symbol Parameter Min. Max. Unit CIN Input capacitance (SDA) - 8 pF CIN Input capacitance (other pins) - 6 pF tNS (1) Pulse width ignored (Input filter on SCL and SDA) - 80 ns 1. Evaluated By Characterization – Not tested in production. DS13519 - Rev 4 page 142/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C DC and AC parameters Table 249. I²C DC characteristics up to 85 °C Symbol ILI ILO Parameter Test condition Min. Typ. Max. Unit - 0.03 ±0.1 µA - 0.1 ±0.5 μA - 0.03 ±0.1 µA - 116 160 - 220 240 - 510 550 - 116 160 - 220 240 - 510 550 - 110 210 - 110 220 - 130 250 - 170 200 - 280 300 - 520 600 VCC = 1.8 V - 0.84 1.5 VCC = 3.3 V - 1.3 2 VCC = 5.5 V - 1.7 3 VCC = 1.8 V - 72 100 VCC = 3.3 V - 76 100 VCC = 5.5 V - 87 120 VCC = 1.8 V -0.45 - 0.25 VCC VCC = 3.3 V -0.45 - 0.3 VCC VCC = 5.5 V -0.45 - 0.3 VCC VCC = 3.3 V -0.45 - 0.2 VCC Input leakage current VIN = VSS or VCC (SCL, SDA) device in Standby mode Input leakage current (LPD) VIN = VSS device in Standby mode Output leakage current SDA in Hi-Z, external voltage (SDA) applied on SDA: VSS or VCC VCC = 1.8 V, fC = 1MHz (rise/fall time < 50 ns) ICC_E2 Operating supply current (device select E2 address) read (1) VCC = 3.3 V, fC = 1MHz (rise/fall time < 50 ns) VCC = 5.5 V, fC = 1MHz (rise/fall time < 50 ns) VCC = 1.8 V, fC = 1MHz (rise/fall time < 50 ns) ICC_MB Operating supply current (device select MB address) read(1) VCC = 3.3 V, fC = 1MHz (rise/fall time < 50 ns) VCC = 5.5 V, fC = 1MHz (rise/fall time < 50 ns) VCC = 1.8 V, fC = 1MHz (rise/fall time < 50 ns) ICC0 Operating supply current (device select E2 address) write(1) VCC = 3.3 V, fC = 1MHz (rise/fall time < 50 ns) VCC = 5.5 V, fC = 1MHz (rise/fall time < 50 ns) VCC = 1.8 V, fC = 1MHz (rise/fall time < 50 ns) ICC0_MB Operating supply current (device select MB address) write(1) VCC = 3.3 V, fC = 1MHz (rise/fall time < 50 ns) VCC = 5.5 V, fC = 1MHz (rise/fall time < 50 ns) ICC1 (LPD = 1) ICC1_PON (LPD = 0) VIL VIL_LPD DS13519 - Rev 4 Low power down supply current Static standby supply current after power ON or device select stop or time out Input low voltage (SDA, SCL) Input low voltage (LPD) µA µA µA µA μA µA V V page 143/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C DC and AC parameters Symbol VIH VIH_LPD VOL_SDA Parameter Test condition Input high voltage (SDA, SCL) Input high voltage (LPD) Output low voltage SDA (1 MHz) VCC_Power_up Device select acknowledge Min. Typ. Max. VCC = 1.8 V 0.75 VCC - VCC+ 1 VCC = 3.3 V 0.75 VCC - VCC+ 1 VCC = 5.5 V 0.75 VCC - VCC+ 1 VCC = 1.8 V 0.85 VCC - VCC+ 1 VCC = 3.3 V 0.85 VCC - VCC+ 1 VCC = 5.5 V 0.85 VCC - VCC+ 1 IOL = 1 mA, VCC = 1.8 V - 0.05 0.4 IOL = 2.1 mA, VCC = 3.3 V - 0.075 0.4 IOL = 3 mA, VCC = 5.5 V - 0.09 0.4 kHz(2) - 1.48 1.7 V Min. Typ. Max. Unit - 0.03 ±0.1 - 0.1 ±0.5 - 0.03 ±0.1 - 126 180 - 230 260 - 510 550 - 126 180 - 230 260 - 510 550 - 120 220 - 120 230 - 140 260 - 180 220 fC = 100 Unit V V V 1. SCL, SDA connected to Ground or VCC. SDA connected to VCC through a pull-up resistor. 2. Evaluated by Characterization – Not tested in production. Table 250. I2C DC characteristics up to 125 °C Symbol ILI ILO Parameter Test condition Input leakage current VIN = VSS or VCC (SCL, SDA) device in Standby mode Input leakage current (LPD) VIN = VSS device in Standby mode Output leakage current SDA in Hi-Z, external voltage (SDA) applied on SDA: VSS or VCC VCC = 1.8 V, fC = 1MHz (rise/fall time < 50 ns) ICC_E2 Operating Supply current (Device select E2 Address) Read (1) VCC = 3.3 V, fC = 1MHz (rise/fall time < 50 ns) VCC = 5.5 V, fC = 1MHz (rise/fall time < 50 ns) VCC = 1.8 V, fC = 1MHz (rise/fall time < 50 ns) ICC_MB Operating Supply current (Device select MB Address) Read(1) VCC = 3.3 V, fC = 1MHz (rise/fall time < 50 ns) VCC = 5.5 V, fC = 1MHz (rise/fall time < 50 ns) VCC = 1.8 V, fC = 1MHz (rise/fall time < 50 ns) ICC0 Operating Supply current (Device select E2 Address) Write(1) VCC = 3.3 V, fC = 1MHz (rise/fall time < 50 ns) VCC = 5.5 V, fC = 1MHz (rise/fall time < 50 ns) ICC0_MB DS13519 - Rev 4 Operating Supply current (Device select MB Address) Write(1) VCC = 1.8 V, fC = 1MHz (rise/fall time < 50 ns) µA µA µA µA µA µA page 144/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C DC and AC parameters Symbol Parameter Test condition VCC = 3.3 V, fC = 1MHz ICC0_MB (rise/fall time < 50 ns) Operating Supply current (Device select MB Address) Write(1) VCC = 5.5 V, fC = 1MHz (LPD = 1) ICC1_PON (LPD = 0) VIL VIL_LPD VIH VIH_LPD VOL_SDA VCC_Power_up Max. - 290 320 600 VCC = 1.8 V - 2.5 5 VCC = 3.3 V - 3 6 VCC = 5.5 V - 4 7 VCC = 1.8 V - 78 110 VCC = 3.3 V - 82 110 VCC = 5.5 V - 95 130 VCC = 1.8 V -0.45 - 0.25 VCC VCC = 3.3 V -0.45 - 0.3 VCC VCC = 5.5 V -0.45 - 0.3 VCC VCC = 3.3 V -0.45 - 0.2 VCC VCC = 1.8 V 0.75 VCC - VCC+1 VCC = 3.3 V 0.75 VCC - VCC+1 VCC = 5.5 V 0.75 VCC - VCC+1 VCC = 1.8 V 0.85 VCC+1 - VCC+1 VCC = 3.3 V 0.85 VCC+1 - VCC+1 VCC = 5.5 V 0.85 VCC+1 - VCC+1 IOL = 1 mA, VCC = 1.8 V - 0.05 0.4 IOL = 2.1 mA, VCC = 3.3 V - 0.08 0.4 IOL = 3 mA, VCC = 5.5 V - 0.1 0.4 - 1.48 1.7 Static Standby supply current after power ON or device select stop or time out Input low voltage (SDA, SCL) Input low voltage (LPD) Input high voltage (SDA, SCL) Input high voltage (LPD) Device Select Acknowledge fC = 100 KHz(2) Unit µA 520 Low power down supply current Output low voltage SDA (1 MHz) Typ. - (rise/fall time < 50 ns) ICC1 Min. μA µA V V V V V V 1. SCL, SDA connected to Ground or VCC. SDA connected to VCC through a pull-up resistor. 2. Evaluated by Characterization – Not tested in production. DS13519 - Rev 4 page 145/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C DC and AC parameters Table 251. I2C AC characteristics up to 85 °C Test conditions specified in Table 246. I²C operating conditions Symbol Alt. Parameter Min. Max. Unit fC fSCL Clock frequency 0.05 1000 kHz tCHCL tHIGH Clock pulse width high(1) 0.26 25000(2) µs tCLCH tLOW Clock pulse width low(1) 0.5 25000 (3) µs 35 - ms tSTART_OUT - I²C timeout on Start tXH1XH2 tR Input signal rise time(1) -(4) -(4) ns tXL1XL2 tF Input signal fall time(1) - (4) -(4) ns tDL1DL2 tF SDA (out) fall 20 120 ns tDXCX tSU:DAT Data in set up time(1) 0 - ns tCLDX tHD:DAT Data in hold time 0 - ns tCLQX tDH Data out hold time(5) 100 - ns tCLQV tAA Clock low to next data valid (access - 450 ns tCHDX tSU:STA Start condition set up time(7) 250 - ns tDLCL tHD:STA Start condition hold time 0.25 35000(8) µs tCHDH tSU:STO Stop condition set up time 250 - ns tDHDL tBUF Time between Stop condition and next Start condition 1400 - ns tW - I²C write time (9) - 5 ms tbootDC - RF OFF and LPD = 0(1) - 0.6 ms - 0.6 ms tbootLPD - RF condition(1) time(1) OFF(1) time)(6) 1. Evaluated by Characterization – Not tested in production. 2. tCHCL timeout. 3. tCLCH timeout. 4. There is no min. or max. values for the input signal rise and fall times. It is however recommended by the I2C specification that the input signal rise and fall times be less than 120 ns when fC < 1 MHz. 5. To avoid spurious Start and Stop conditions, a minimum delay is placed between SCL=1 and the falling or rising edge of SDA. 6. tCLQV is the time (from the falling edge of SCL) required by the SDA bus line to reach 0.8VCC in a compatible way with the I2C specification (which specifies tSU:DAT (min) = 100 ns), assuming that the Rbus × Cbus time constant is less than 150 ns (as specified in the Figure 82. I2C Fast mode (fC = 1 MHz): maximum Rbus value versus bus parasitic capacitance (Cbus). 7. For a reStart condition, or following a write cycle. 8. tDLCL timeout 9. I2C write time for 1 Byte, up to 16 Bytes in EEPROM (user memory) provided they are all located in the same memory row, that is the most significant memory address bits (b16-b4) are the same. DS13519 - Rev 4 page 146/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C DC and AC parameters Table 252. I2C AC characteristics up to 125 °C Test conditions specified in Table 246. I²C operating conditions Symbol Alt. fC fSCL tCHCL tCLCH Parameter Min. Max. Unit Clock frequency 0.05 1000 kHz tHIGH Clock pulse width high 0.26 25000 (1) µs tLOW Clock pulse width low 0.5 25000 (2) µs 35 - ms tSTART_OUT - I²C timeout on Start tXH1XH2 tR Input signal rise time(3) -(4) -(4) ns tXL1XL2 tF Input signal fall time(3) - (4) - (4) ns tDL1DL2 tF time(3) 20 120 ns tDXCX tSU:DAT Data in set up time(3) 0 - ns tCLDX tHD:DAT Data in hold time 0 - ns tCLQX tDH 100 - ns tCLQV tAA - 450 ns tCHDX tSU:STA Start condition set up time(7) 250 - ns tDLCL tHD:STA Start condition hold time 0.25 35000 (8) µs tCHDH tSU:STO Stop condition set up time 250 - ns tDHDL tBUF Time between Stop condition and next Start condition 1400 - ns tW - I²C write time (9) - 5.5 ms tbootDC - RF OFF and LPD = 0(3) - - ms - 0.6 ms tboot_LPD - SDA (out) fall condition(3) Data out hold time(5) Clock low to next data valid (access RF OFF(3) time)(6) 1. tCHCL timeout. 2. tCLCH timeout. 3. Evaluated by Characterization – Not tested in production. 4. There is no min. or max. values for the input signal rise and fall times. It is however recommended by the I2C specification that the input signal rise and fall times be less than 120 ns when fC < 1 MHz. 5. To avoid spurious Start and Stop conditions, a minimum delay is placed between SCL=1 and the falling or rising edge of SDA. 6. tCLQV is the time (from the falling edge of SCL) required by the SDA bus line to reach 0.8VCC in a compatible way with the I2C specification (which specifies tSU:DAT (min) = 100 ns), assuming that the Rbus × Cbus time constant is less than 150 ns (as specified in the Figure 82. I2C Fast mode (fC = 1 MHz): maximum Rbus value versus bus parasitic capacitance (Cbus) ). 7. For a restart condition, or following a write cycle. 8. tDLCL timeout. 9. I2 write time for 1 Byte, up to 16 Bytes in EEPROM (user memory) provided they are all located in the same memory row, that is the most significant memory address bits (b16-b4) are the same. DS13519 - Rev 4 page 147/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C DC and AC parameters Figure 81. I2C AC waveforms tXL1XL2 tXH1XH2 tCHCL tCLCH SCL tDLCL tXL1XL2 SDA In tCHDX tXH1XH2 SDA Input Start condition tCLDX tDXCX SDA Change tCHDH tDHDL Stop Start condition condition SCL SDA In tW tCHDH tCHDX Stop condition Write cycle Start condition tCHCL SCL tCLQV tCLQX Data valid Data valid SDA Out tDL1DL2 MS71328 Figure 82 indicates how the value of the pull-up resistor can be calculated. In most applications, though, this method of synchronization is not employed, and so the pull-up resistor is not necessary, provided that the bus master has a push-pull (rather than open drain) output. Figure 82. I2C Fast mode (fC = 1 MHz): maximum Rbus value versus bus parasitic capacitance (Cbus) V CC Bus line pull-up resistor (KW) 100 R bus R 10 4 bu s × C bu s = 1 The Rbus x Cbus time constant must be below 150 ns. The time constant line is represented on the left. 50 n s Here, R bu s × C = 120 ns I²C bus master SCL ST25DV SDA C bus bu s 1 10 30 100 Bus line capacitor (pF) DS13519 - Rev 4 page 148/203 ST25DV04KC ST25DV16KC ST25DV64KC GPO characteristics 9.3 GPO characteristics This section summarizes the operating and measurement conditions of the GPO feature. The parameters in the DC and AC characteristic tables that follow are derived from tests performed under the measurement conditions summarized in the relevant tables. Table 253. GPO DC characteristics up to 85 °C Symbol Parameter VOL_GPO_CMOS Output low voltage (GPO CMOS) VOH_GPO_CMOS VOL_GPO_OD Output high voltage (GPO CMOS) Output low voltage (GPO open drain) Condition Min Typ Max Unit VDCG = 1.8 V, IOL = 0.5 mA - - 0.4 V VDCG = 3.3 V, IOL = 0.5 mA - - 0.4 V VDCG = 5.5 V, IOL = 0.5 mA - - 0.4 V VDCG = 1.8 V, IOL = 0.5 mA VDCG-0.4 - - V VDCG = 3.3 V, IOL = 0.5 mA VDCG-0.4 - - V VDCG = 5.5 V, IOL = 0.5 mA VDCG-0.4 - - V IOL = 1 mA, VCC = 1.8 V - 0.28 0.4 IOL = 1 mA, VCC = 3.3 V - 0.2 0.4 IOL = 1 mA, VCC = 5.5 V - 0.2 0.4 -0.15 0.06 0.15 µA - - 0.1 µA IL_GPO_OD Output leakage current (GPO open drain) GPO in Hi-Z, external voltage applied on: ILI_VDCG Input leakage (VDCG) VDCG = 5.5 V GPO, VSS or VCC V Table 254. GPO DC characteristics up to 125 °C Symbol VOL_GPO_CMOS VOH_GPO_CMOS VOL_GPO_OD Parameter Output low voltage (GPO CMOS) Output high voltage (GPO CMOS) Output low voltage (GPO open drain) Condition Min Typ Max Unit VDCG = 1.8 V, IOL = 0.5 mA - - 0.4 V VDCG = 3.3 V, IOL = 0.5 mA - - 0.4 V VDCG = 5.5 V, IOL = 0.5 mA - - 0.4 V VDCG = 1.8 V, IOL = 0.5 mA VDCG-0.4 - - V VDCG = 3.3 V, IOL = 0.5 mA VDCG-0.4 - - V VDCG = 5.5 V, IOL = 0.5 mA VDCG-0.4 - - V IOL = 1 mA, VCC = 1.8 V - 0.28 0.4 IOL = 1 mA, VCC = 3.3 V - 0.22 0.4 IOL = 1 mA, VCC = 5.5 V - 0.21 0.4 -0.15 0.06 0.15 µA - - 0.1 µA IL_GPO_OD Output leakage current (GPO open drain) GPO in Hi-Z, external voltage applied on: ILI_VDCG Input leakage (VDCG) VDCG = 5.5 V GPO, VSS or VCC V Table 255. GPO AC characteristics Symbol Parameter Test condition Min. Max Unit tr_GPO_CMOS Output rise time(1) CL = 30 pF, VDCG = 1.8 V to 5.5 V - 50 ns tf_GPO_CMOS Output fall time(1) CL = 30 pF, VDCG=1.8 V to 5.5 V - 50 ns 1. Evaluated by Characterization – Not tested in production. DS13519 - Rev 4 page 149/203 ST25DV04KC ST25DV16KC ST25DV64KC RF electrical parameters 9.4 RF electrical parameters This section summarizes the operating and measurement conditions, and the DC and AC characteristics of the device in RF mode. The parameters in the DC and AC characteristics tables that follow are derived from tests performed under the Measurement Conditions summarized in the relevant tables. Designers should check that the operating conditions in their circuit match the measurement conditions when relying on the quoted parameters. Table 256. RF characteristics Symbol Parameter Condition Min Typ Max Unit fCC External RF signal frequency - 13.553 13.56 13.567 MHz H_ISO Operating field according to ISO(1) 150 - 5000 mA/m 10 - 30 95 - 100 10% carrier modulation index MICARRIER MI=(A-B)/(A+B) 100% carrier modulation index Range 6 TA = -40 °C to 85 °C Range 8 TA = -40 °C to 105 °C 150 mA/m > H_ISO > 1000 mA/m MI=(A-B)/(A+B) (2) % tMIN CD Minimum time from carrier generation to first data(1) From H-field min - - 1 ms fSH Subcarrier frequency high(1) FCC/32 - 423.75 - kHz fSL low(1) FCC/28 - 484.28 - kHz Subcarrier frequency t1 Time for ST25DVxxKC response(1) 4352/FC 318.6 320.9 323.3 µs t2 Time between commands(1) 4192/FC 309 311.5 314 µs t3 Time between commands(1) 4384/FC 323.3 - - µs Wt_Block RF User memory write time (including internal Verify) (1)(3) 1 Block - 5.2 - ms 4 Blocks - 19.7 - ms Wt_Byte RF system memory write time including internal Verify)(1)(3) 1 Byte - 4.9 - ms Wt_MB RF Mailbox write time (from VCD request SOF to ST25DVxxKC response EOF)(1)(3) 256 Byte - 80.7 - ms Read_MB RF Mailbox read time (from VCD request SOF to ST25DVxxKC response EOF) (1)(3) 256 Byte - 81 - ms CTUN Internal tuning capacitor(2) f = 13.56 MHz - 28.5 - pF VBACK Backscattered level as defined by ISO test - 10 - - mV RF input voltage amplitude between AC0 and AC1, VSS pin left floating, VAC0-VAC1 peak to peak(1) Inventory and Read operations - 4.8 - V VMIN_1 Write operations - 5.25 - V VMIN_2 AC voltage between AC0 and VSS or between AC1 and VSS (1) Inventory and Read operations - 2.25 - V Write operations - 2.7 - V tBootRF Without DC supply (No VCC)(1) Set up time - 0.6 - ms Chip reset 2 - - ms tRF_OFF RF OFF time(1) 1. Evaluated by Characterization – Not tested in production. 2. Evaluated by Characterization – Tested in production by correlating industrial tester measure with characterization results. 3. For VCD request coded in 1 out of 4 and ST25DVxxKC response in high data rate, single sub carrier. DS13519 - Rev 4 page 150/203 ST25DV04KC ST25DV16KC ST25DV64KC Thermal characteristics Note: All timing characterization where performed on a reference antenna with the following characteristics: • ISO antenna class 1 • Tuning frequency = 13.7 MHz Table 257. Operating conditions Symbol TA Parameter Ambient operating temperature Min. Max. Range 6 -40 85 Range 8 -40 105 Unit °C Figure 83. ASK modulated signal shows an ASK modulated signal from the VCD to the ST25DVxxKC. The test conditions for the AC/DC parameters are: • Close coupling condition with tester antenna (1 mm) • ST25DVxxKC performance measured at the tag antenna • ST25DVxxKC synchronous timing, transmit and receive Figure 83. ASK modulated signal t RFF A B t RFR f CC t RFSBL t M IN CD 9.5 Thermal characteristics Table 258. Thermal characteristics Symbol Parameter Thermal resistance junction-ambient SO8N 4.9 x 6 mm, 1.27 mm pitch package(1) ƟJA Thermal resistance junction-ambient TSSOP8 3 x 6.4 mm, 0.65 mm pitch package(1) Thermal resistance junction-ambient UFDFN8 2 × 3 mm, 0.5 mm pitch package(1)(2) Value Unit 219 255 °C/W 67 1. Jedec JESD51-7 2s2p board 2. Exposed pad soldered to board DS13519 - Rev 4 page 151/203 ST25DV04KC ST25DV16KC ST25DV64KC Package information 10 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 10.1 SO8N package information This SO8N is an 8-lead, 4.9 x 6 mm, plastic small outline, 150 mils body width, package. Figure 84. SO8N – Outline Package SO8N (package code O7) A2 h x 45˚ A c b ccc e D 0.25 mm GAUGE PLANE SEATING PLANE C k 8 E1 1 E A1 L L1 1. DS13519 - Rev 4 Drawing is not to scale. page 152/203 ST25DV04KC ST25DV16KC ST25DV64KC SO8N package information Table 259. SO8N – Mechanical data Symbol inches (1) millimeters Min. Typ. Max. Min. Typ. Max. A - - 1.750 - - 0.0689 A1 0.100 - 0.250 0.0039 - 0.0098 A2 1.250 - - 0.0492 - - b 0.280 - 0.480 0.0110 - 0.0189 c 0.100 - 0.230 0.0039 - 0.0091 D(2) 4.800 4.900 5.000 0.1890 0.1929 0.1969 E 5.800 6.000 6.200 0.2283 0.2362 0.2441 E1(3) 3.800 3.900 4.000 0.1496 0.1535 0.1575 e - 1.270 - - 0.0500 - h 0.250 - 0.500 0.0098 - 0.0197 k 0° - 8° 0° - 8° L 0.400 - 1.270 0.0157 - 0.0500 L1 - 1.040 - - 0.0409 - ccc - - 0.100 - - 0.0039 1. Values in inches are converted from mm and rounded to four decimal digits. 2. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15 mm per side 3. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25 mm per side. Note: The package top may be smaller than the package bottom. Dimensions D and E1 are determinated at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs and interleads flash, but including any mismatch between the top and bottom of plastic body. Measurement side for mold flash, protusions or gate burrs is bottom side. Figure 85. SO8N - Recommended footprint 3.9 6.7 0.6 (x8) 1.27 1. DS13519 - Rev 4 Dimensions are expressed in millimeters. page 153/203 ST25DV04KC ST25DV16KC ST25DV64KC TSSOP8 package information 10.2 TSSOP8 package information This TSSOP is an 8-lead, 3 x 6.4 mm, 0.65 mm pitch, thin shrink small outline package. Figure 86. TSSOP8 – Outline D 8 Package TSSOP8 (package code 6P) 5 k E1 E A1 1 L L1 4 A2 A c 1. 6P_TSSOP8_ME_V3 e b Drawing is not to scale. Table 260. TSSOP8 – Mechanical data Symbol inches (1) millimeters Min. Typ. Max. Min. Typ. Max. A - - 1.200 - - 0.0472 A1 0.050 - 0.150 0.0020 - 0.0059 A2 0.800 1.000 1.050 0.0315 0.0394 0.0413 b 0.190 - 0.300 0.0075 - 0.0118 c 0.090 - 0.200 0.0035 - 0.0079 D 2.900 3.000 3.100 0.1142 0.1181 0.1220 e - 0.650 - - 0.0256 - E 6.200 6.400 6.600 0.2441 0.2520 0.2598 E1 4.300 4.400 4.500 0.1693 0.1732 0.1772 L 0.450 0.600 0.750 0.0177 0.0236 0.0295 L1 - 1.000 - - 0.0394 - k 0° - 8° 0° - 8° aaa - - 0.100 - - 0.0039 1. Values in inches are converted from mm and rounded to four decimal digits. 2. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15 mm per side 3. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25 mm per side. Note: DS13519 - Rev 4 The package top may be smaller than the package bottom. Dimensions D and E1 are determinated at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs and interleads flash, but including any mismatch between the top and bottom of plastic body. Measurement side for mold flash, protusions or gate burrs is bottom side. page 154/203 ST25DV04KC ST25DV16KC ST25DV64KC TSSOP8 package information Figure 87. TSSOP8 – Recommended footprint 1.55 0.65 0.40 2.35 5.80 7.35 1. DS13519 - Rev 4 6P_TSSOP8_FP_V2 Dimensions are expressed in millimeters. page 155/203 ST25DV04KC ST25DV16KC ST25DV64KC UFDFN8 package information 10.3 UFDFN8 package information UFDFPN8 is an 8-lead, 2 × 3 mm, 0.5 mm pitch ultra thin profile fine pitch dual flat package. Figure 88. UFDFN8 - Outline N D A B A ccc C Pin #1 ID marking E A1 C eee C Seating plane A3 Side view 2x aaa C aaa C 2x 1 2 Top view D2 e 1 2 L3 Datum A b L1 L L3 Pin #1 ID marking E2 K L e/2 L1 e Terminal tip Detail “A” Even terminal ND-1 x e Bottom view 1. 2. 3. DS13519 - Rev 4 See Detail “A” Max. package warpage is 0.05 mm. Exposed copper is not systematic and can appear partially or totally according to the cross section. Drawing is not to scale. page 156/203 ST25DV04KC ST25DV16KC ST25DV64KC UFDFN8 package information Table 261. UFDFN8 - Mechanical data inches (1) millimeters Symbol Min Typ Max Min Typ Max A 0.450 0.550 0.600 0.0177 0.0217 0.0236 A1 0.000 0.020 0.050 0.0000 0.0008 0.0020 b(2) 0.200 0.250 0.300 0.0079 0.0098 0.0118 D 1.900 2.000 2.100 0.0748 0.0787 0.0827 D2 1.200 - 1.600 0.0472 - 0.0630 E 2.900 3.000 3.100 0.1142 0.1181 0.1220 E2 1.200 - 1.600 0.0472 - 0.0630 e - 0.500 - 0.0197 K 0.300 - - 0.0118 - - L 0.300 - 0.500 0.0118 - 0.0197 L1 - - 0.150 - - 0.0059 L3 0.300 - - 0.0118 - - aaa - - 0.150 - - 0.0059 bbb - - 0.100 - - 0.0039 ccc - - 0.100 - - 0.0039 ddd - - 0.050 - - 0.0020 eee (3) - - 0.080 - - 0.0031 1. Values in inches are converted from mm and rounded to 4 decimal digits. 2. Dimension b applies to plated terminal and is measured between 0.15 and 0.30 mm from the terminal tip. 3. Applied for exposed die paddle and terminals. Exclude embedding part of exposed die paddle from measuring. DS13519 - Rev 4 page 157/203 ST25DV04KC ST25DV16KC ST25DV64KC WLCSP10 package information 10.4 WLCSP10 package information Figure 89. WLCSP - 10 balls, 1.649x1.483 mm, 0.4 mm pitch, wafer level chip scale package outline bbb Z I DETAIL A Orientation reference X Y D H e J E e1 F A A3 aaa (4X) G A2 SIDE VIEW BOTTOM VIEW TOP VIEW BUMP A1 eee Z DETAIL A ROTATED 90 Z b(10x) SEATING PLANE ccc M Z X Y ddd M Z 1. 2. 3. 4. Drawing is not to scale. Dimension is measured at the maximum bump diameter parallel to primary datum Z. Primary datum Z and seating plane are defined by the spherical crowns of the bump. Bump position designation per JESD 95-1, SPP-010. Table 262. WLCSP - 10 balls, 1.649x1.483 mm, 0.4 mm pitch, wafer level chip scale mechanical data DS13519 - Rev 4 inches (1) millimeters Symbol Min Typ Max Min Typ Max A 0.265 0.295 0.325 0.0104 0.0116 0.0128 A1 - 0.095 - - 0.0037 - A2 - 0.175 - - 0.0069 - A3 - 0.025 - - 0.0010 - b - 0.185 - - 0.0073 - D - 1.649 1.669 - 0.0649 0.0657 E - 1.483 1.503 - 0.0584 0.0592 e - 0.400 - - 0.0157 - e1 - 0.800 - - 0.0315 - H - 0.346 - - 0.0136 - I - 1.039 - - 0.0409 - page 158/203 ST25DV04KC ST25DV16KC ST25DV64KC WLCSP10 package information inches (1) millimeters Symbol Min Typ Max Min Typ Max J - 0.200 - - 0.0079 - F - 0.314 - - 0.0124 - G - 0.342 - - 0.0135 - aaa - 0.110 - - 0.0043 - bbb - 0.110 - - 0.0043 - ccc - 0.110 - - 0.0043 - ddd - 0.060 - - 0.0024 - eee - 0.060 - - 0.0024 - 1. Values in inches are converted from mm and rounded to 4 decimal digits. Figure 90. WLCSP - 10 balls, 1.649x1.483 mm, 0.4 mm pitch, wafer level chip scale recommended footprint Dpad Dsm Table 263. WLCSP10 recommended PCB design rules Dimension DS13519 - Rev 4 Recommended values Pitch 0.4 mm Dpad 0,225 mm Dsm 0.290 mm typ. (depends on soldermask registration tolerance) Stencil opening 0.250 mm Stencil thickness 0.100 mm page 159/203 ST25DV04KC ST25DV16KC ST25DV64KC UFDFPN12 package information 10.5 UFDFPN12 package information UFDFPN12 is an 12-lead, 3 x 3 mm, 0.5 mm pitch ultra thin profile fine pitch dual flat package. Figure 91. UFDFPN12 - Outline Pin #1 ID marking E2 E e D D2 k L b TOP VIEW BOTTOM VIEW A SIDE VIEW 1. Drawing is not to scale. Table 264. UFDFPN12 - Mechanical data Symbol inches (1) millimeters Min Typ Max Min Typ Max A(2) 0.45 0.55 0.60 0.0177 0.0217 0.0236 b 0.20 0.25 0.30 0.0079 0.0098 0.0118 D 2.95 3.00 3.10 0.1161 0.1181 0.1220 D2 1.35 1.40 1.45 0.0531 0.0551 0.0571 e 0.50 0.0197 E 2.95 3.00 3.10 0.1161 0.1181 0.1220 E2 2.50 2.55 2.60 0.0984 0.1004 0.1024 L 0.25 0.30 0.35 0.0098 0.0118 0.0138 k 0.40 0.0157 1. Values in inches are converted from mm and rounded to 4 decimal digits. 2. Package total thickness. DS13519 - Rev 4 page 160/203 ST25DV04KC ST25DV16KC ST25DV64KC Ordering information 11 Ordering information Table 265. Ordering information scheme Example: ST25DV 64K C - IE 6 D 3 Device type ST25DV = Dynamic NFC/RFID tag based on ISO 15693 and NFC T5T Memory size 04K = 4 Kbits 16K = 16 Kbits 64K = 64 Kbits Version C Device Features IE = I2C and GPO open drain, fast transfer mode and energy harvesting JF = I2C and GPO CMOS, fast transfer mode, energy harvesting and low power mode Device grade 6 = industrial: device tested with standard test flow over - 40 to 85 °C 8 = industrial device tested with standard test flow over -40 to 105 °C (UFDFPN8 and UFDFPN12 only) or over -40 to 125 °C (SO8N and TSSOP8 only, 105 °C only for RF interface) Package S = SO8N T = TSSOP8 D = UFDFPN12 C = UFDFPN8 L = WLCSP (thin 10 balls) (Only for 04K version) Capacitance 3 = 28.5 pF Note: DS13519 - Rev 4 Parts marked as “ES” or “E” are not yet qualified and therefore not approved for use in production. ST is not responsible for any consequences resulting from such use. In no event will ST be liable for the customer using any of these engineering samples in production. ST’s Quality department must be contacted prior to any decision to use these engineering samples to run a qualification activity. page 161/203 ST25DV04KC ST25DV16KC ST25DV64KC Bit representation and coding for fast commands Appendix A Bit representation and coding for fast commands Data bits are encoded using Manchester coding, according to the following schemes. For the low data rate, same subcarrier frequency or frequencies is/are used. In this case, the number of pulses is multiplied by 4 and all times increase by this factor. For the Fast commands using one subcarrier, all pulse numbers and times are divided by 2. A.1 Bit coding using one subcarrier A.1.1 High data rate For the fast commands, a logic 0 starts with four pulses at 423.75 kHz (fC/32) followed by an unmodulated time of 9.44 µs, as shown in Figure 92. Figure 92. Logic 0, high data rate, fast commands 18.88 µs For the Fast commands, a logic 1 starts with an unmodulated time of 9.44 µs followed by four pulses of 423.75 kHz (fC/32), as shown in Figure 93. Figure 93. Logic 1, high data rate, fast commands 18.88 µs A.1.2 Low data rate For the Fast commands, a logic 0 starts with 16 pulses at 423.75 kHz (fC/32) followed by an unmodulated time of 37.76 µs, as shown in Figure 94. Figure 94. Logic 0, low data rate, fast commands 75.52 µs For the Fast commands, a logic 1 starts with an unmodulated time of 37.76 µs followed by 16 pulses at 423.75 kHz (fC/32), as shown in Figure 95. DS13519 - Rev 4 page 162/203 ST25DV04KC ST25DV16KC ST25DV64KC ST25DVxxKC to VCD frames Figure 95. Logic 1, low data rate, fast commands 75.52 µs Note: For fast commands, bit coding using two subcarriers is not supported. A.2 ST25DVxxKC to VCD frames Frames are delimited by an SOF and an EOF. They are implemented using code violation. Unused options are reserved for future use. For the low data rate, the same subcarrier frequency or frequencies is/are used. In this case, the number of pulses is multiplied by 4. For the Fast commands using one subcarrier, all pulse numbers and times are divided by 2. A.3 SOF when using one subcarrier A.3.1 High data rate For the Fast commands, the SOF comprises an unmodulated time of 28.32 µs, followed by 12 pulses at 423.75 kHz (fC/32), and a logic 1 that consists of an unmodulated time of 9.44 µs followed by four pulses at 423.75 kHz, as shown in Figure 96. Figure 96. Start of frame, high data rate, one subcarrier, fast commands 56.64 µs A.3.2 18.88 µs Low data rate For the Fast commands, the SOF comprises an unmodulated time of 113.28 µs, followed by 48 pulses at 423.75 kHz (fC/32), and a logic 1 that includes an unmodulated time of 37.76 µs followed by 16 pulses at 423.75 kHz, as shown in Figure 97. Figure 97. Start of frame, low data rate, one subcarrier, fast commands 226.56 µs DS13519 - Rev 4 75.52 µs page 163/203 ST25DV04KC ST25DV16KC ST25DV64KC EOF when using one subcarrier A.4 EOF when using one subcarrier A.4.1 High data rate For the Fast commands, the EOF comprises a logic 0 that includes four pulses at 423.75 kHz and an unmodulated time of 9.44 µs, followed by 12 pulses at 423.75 kHz (fC/32) and an unmodulated time of 37.76 µs, as shown in Figure 98. Figure 98. End of frame, high data rate, one subcarrier, fast commands 18.88 µs A.4.2 56.64 µs Low data rate For the Fast commands, the EOF comprises a logic 0 that includes 16 pulses at 423.75 kHz and an unmodulated time of 37.76 µs, followed by 48 pulses at 423.75 kHz (fC/32) and an unmodulated time of 113.28 µs, as shown in Figure 99. Figure 99. End of frame, low data rate, one subcarrier, fast commands 75.52 µs Note: DS13519 - Rev 4 226.56 µs For SOF and EOF in fast commands, bit coding using two subcarriers is not supported. page 164/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C sequences Appendix B I²C sequences B.1 Device select codes Following table assumes default values for I2C_DEVICE_CODE[3:0] (1010b) and E0 (1b) bits. Device select value should be adapted to I2C_DEVICE_CODE[3:0] and E0 values programmed into the I2C_CFG static register if different from default factory values. Table 266. Device select usage Device select value Hexadecimal Binary Comment Device select generic - 1010 E211 R/W E2 = 0b User memory, Dynamic registers, FTM mailbox E2 = 1b System memory A6h 1010 0110b User memory, Dynamic registers, FTM mailbox writing A7h 1010 0111b User memory, Dynamic registers, FTM mailbox reading AEh 1010 1110b System memory writing AFh 1010 1111b System memory reading B.2 I²C Byte writing and polling B.2.1 I²C byte write in user memory Table 267. Byte Write in user memory when write operation allowed Request/Response Frame DS13519 - Rev 4 Master drives SDA Slave drives SDA Start A6h - - ACK ADDRESS_MSB - - ACK ADDRESS_LSB - - ACK DATA - - ACK Stop - Comment Device select for writing 9th bit Send Address MSB (1 Byte) 9th bit Send Address LSB (1 Byte) 9th bit Send Data (1 Byte) 9th bit Start of Programming page 165/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C Byte writing and polling Table 268. Polling during programming after byte writing in user memory Request/Response Frame Comment Master drives SDA Slave drives SDA Start A6h - Device select for writing - NoACK 9th bit Device Busy Start A6h - Device select for writing - NoACK 9th bit Device Busy ... ... ... Device select for writing ... ... ... 9th bit Device Busy Start A6h - Device select for writing - ACK Stop - 9th bit Device ready Programing completed End of Polling Table 269. Byte Write in user memory when write operation is not allowed Request/Response Frame Master drives SDA DS13519 - Rev 4 Slave drives SDA Comment Start A6h - Device select for writing - ACK 9th bit ADDRESS_MSB - Send Address MSB (1 Byte) - ACK 9th bit ADDRESS_LSB - Send Address LSB (1 Byte) - ACK 9th bit DATA - Send Data - NoACK 9th bit: Write access not granted or FTM activated. Stop - No Programming Device return in Standby page 166/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C Byte writing and polling B.2.2 I²C byte writing in dynamic registers and polling Table 270. Byte Write in Dynamic Register (if not Read Only) Request/Response Frame Master drives SDA Slave drives SDA Comment Start A6h - Device select for writing - ACK 9th bit ADDRESS_MSB - Send Address MSB (1 Byte) - ACK 9th bit Dynamic Register ADDRESS_LSB - Send Address LSB (1 Byte) Dynamic register are located from address 2000h to 2007h , some are only readable - ACK 9th bit DATA - Send Data - ACK 9th bit Stop - Immediate update of Dynamic register Table 271. Polling during programming after byte write in Dynamic Register Request/Response Frame Master drives SDA Slave drives SDA Start A6h - - ACK Stop - Comment Device select for writing 9th bit Device Busy Dynamic register updates is immediate End of Polling Table 272. Byte Write in Dynamic Register if Read Only Request/Response Frame Master drives SDA Slave drives SDA Comment Start A6h - Device select for writing - ACK 9th bit 20h - Send Address MSB (1 Byte) - NoACK 9th bit Send Address LSB (1 Byte) DS13519 - Rev 4 RO Dynamic Register ADDRESS_LSB - Addresses 2001h, 2004h, 2005h and 2007h are Read Only registers. - ACK 9th bit DATA - Send Data - NoACK 9th bit Stop - No Programming Device return in Standby page 167/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C Byte writing and polling B.2.3 I2C byte write in mailbox and polling Table 273. Byte Write in mailbox when mailbox is free from RF message and fast transfer mode is activated Request/Response Frame Comment Master drives SDA Slave drives SDA Start A6h - Device select for writing - ACK 9th bit 20h - Send mailbox address MSB (1 Byte) - ACK 9th bit 08h - - ACK 9th bit DATA - Send Data - ACK 9th bit Stop - Immediate update of mailbox Send Address LSB (1 Byte) Write must be done at first address of mailbox Table 274. Byte Write in mailbox when mailbox is not free from RF message fast transfer mode is not activated Request/Response Frame DS13519 - Rev 4 Comment Master drives SDA Slave drives SDA Start A6h - Device select for writing - ACK 9th bit 20h - Send mailbox address MSB (1 Byte) - ACK 9th bit Send Address LSB (1 Byte) 08h - - ACK 9th bit DATA - Send Data - NoACK Stop - Write must be done at first address of mailbox 9th bit Access Mailbox busy or FTM not activated No Programming Device return in Standby page 168/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C Byte writing and polling B.2.4 I2C byte write and polling in system memory Table 275. Byte Write in System memory if I2C security session is open and register is not RO Request/Response Frame Comment Master drives SDA Slave drives SDA Start AEh - Device select for writing - ACK 9th bit ADDRESS_MSB - Send Address MSB (1 Byte) - ACK 9th bit ADDRESS_LSB - Send Address LSB (1 Byte) - ACK 9th bit DATA - Send Data - ACK 9th bit Stop - Start of Programming Table 276. Polling during programing after byte write in System memory if I2C security session is open and register is not RO Request/Response Frame DS13519 - Rev 4 Comment Master drives SDA Slave drives SDA Start AEh - Device select for writing - NoACK 9th bit Device Busy Start AEh - Device select for writing - NoACK 9th bit Device Busy Start AEh - Device select for writing - ... 9th bit Start AEh - Device select for writing - ACK Stop - 9th bit Device ready Programing completed end of Polling page 169/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C sequential writing and polling Table 277. Byte Write in System memory if I2C security session is closed or register is RO Request/Response Frame Comment Master drives SDA Slave drives SDA Start AEh - Device select for writing - ACK 9th bit ADDRESS_MSB - Send Address MSB (1 Byte) - ACK 9th bit ADDRESS_LSB - Send Address LSB (1 Byte) - ACK 9th bit DATA - Send Data - NoACK 9th bit Stop - B.3 I²C sequential writing and polling B.3.1 I2C sequential write in user memory and polling No Programming Device return in Standby Table 278. Sequential write User memory when write operation allowed and all bytes belong to same area Request/Response Frame DS13519 - Rev 4 Comment Master drives SDA Slave drives SDA Start A6h - Device select for writing - ACK 9th bit ADDRESS_MSB - Send Address MSB (1 Byte) - ACK 9th bit ADDRESS_LSB - Send Address LSB (1 Byte) - ACK 9th bit DATA 0 - Send Data 0 - ACK 9th bit DATA 1 - Send Data 1 - ACK 9th bit ... - ... - ... ... DATA n - - ACK 9th bit Stop - Start of Programming Send Data n n ≤ 256 page 170/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C sequential writing and polling Table 279. Polling during programing after sequential write in User memory when write operation allowed and all bytes belong to same area. Request/Response Frame Comment Master drives SDA Slave drives SDA Start A6h - Device select for writing - NoACK 9th bit Device Busy Start A6h - Device select for writing - NoACK 9th bit Device Busy Start A6h - Device select for writing - ... 9th bit Device Busy Start A6h - Device select for writing - ACK Stop - 9th bit Device ready Programing completed End of Polling Table 280. Sequential write in User memory when write operation allowed and crossing over area border Request/Response Frame DS13519 - Rev 4 Comment Master drives SDA Slave drives SDA Start A6h - Device select for writing - ACK 9th bit ADDRESS_MSB - Send Address MSB (1 Byte) - ACK 9th bit ADDRESS_LSB - Send Address LSB (1 Byte) - ACK 9th bit DATA 0 - Send Data 0 - ACK 9th bit DATA 1 - Send Data 1 - ACK 9th bit ... - ... - ... ... DATA n - - NoACK Stop - Send Data n Address is located in next memory area 9th bit No programming Device return in Standby page 171/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C sequential writing and polling Table 281. Polling during programming after sequential write in User memory when write operation allowed and crossing over area border Master drives SDA Slave drives SDA Comment Request/Response Frame B.3.2 Start A6h - - ACK Stop - Device select for writing 9th bit Device ready No programming End of Polling I2C sequential write in mailbox and polling Table 282. Sequential write in mailbox when mailbox is free from RF message and fast transfer mode is activated Request/Response Frame Comment Master drives SDA Slave drives SDA Start A6h - Device select for writing - ACK 9th bit ADDRESS_MSB - Send mailbox Address MSB (1 Byte) - ACK 9th bit ADDRESS_LSB - Send mailbox Address LSB (1 Byte) - ACK 9th bit DATA 0 - Send Data 0 - ACK 9th bit DATA 1 - Send Data 1 - ACK 9th bit ... - ... - ... ... DATA n - - ACK 9th bit Stop - Immediate mailbox content update Send Data n n ≤ 256 Table 283. Polling during programing after sequential write in mailbox Request/Response Frame DS13519 - Rev 4 Master drives SDA Slave drives SDA Start A6h - - ACK Stop - Comment Device select for writing 9th bit Device ready Mailbox is immediately updated End of Polling page 172/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C Read current address B.4 I²C Read current address B.4.1 I2C current address read in User memory Table 284. Current byte Read in User memory if read operation allowed (depending on area protection and RF user security session) Request/Response Frame Comment Master drives SDA Slave drives SDA Start A7h - Device select for reading - ACK 9th bit DATA Receive Data located on last pointed address+1, or at address 0 after power-up, in user memory NO_ACK - 9th bit Stop - End of Reading Table 285. Current Read in User memory if read operation not allowed (depending on area protection and RF user security session) Request/Response Frame Slave drives SDA Start A7h - Device select for reading - ACK 9th bit FFh NO_ACK Stop DS13519 - Rev 4 Comment Master drives SDA Read of data not allowed ST25DV release SDA 9th bit - End of Reading page 173/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C random address read B.5 I²C random address read B.5.1 I2C random address read in user memory Table 286. Random byte read in User memory if read operation allowed (depending on area protection and RF user security session) Request/Response Frame Comment Master drives SDA Slave drives SDA Start A6h - Device select for writing - ACK 9th bit ADDRESS_MSB - Send Address MSB (1 Byte) - ACK 9th bit ADDRESS_LSB - Send Address LSB (1 Byte) - ACK 9th bit Start A7h - Device select for reading - ACK 9th bit - DATA Receive Data NO_ACK - 9th bit Stop - End of Reading Table 287. Random byte read in User memory if operation not allowed (depending on area protection and RF user security) Request/Response Frame DS13519 - Rev 4 Comment Master drives SDA Slave drives SDA Start A6h - Device select for writing - ACK 9th bit ADDRESS_MSB - Send Address MSB (1 Byte) - ACK 9th bit ADDRESS_LSB - Send Address LSB (1 Byte) - ACK 9th bit Start A7h - Device select for reading - ACK 9th bit - FFh NO_ACK - 9th bit Stop - End of Reading Read of data not allowed release SDA page 174/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C random address read B.5.2 I2C Random address read in system memory Table 288. Byte Read System memory (Static register or I2C Password after a valid Present I2C Password) Request/Response Frame B.5.3 Comment Master drives SDA Slave drives SDA Start AEh - Device select for writing - ACK 9th bit ADDRESS_MSB - Send Address MSB (1 Byte) - ACK 9th bit ADDRESS_LSB - Send Address LSB (1 Byte) - ACK 9th bit Start AFh - Device select for reading - ACK 9th bit - DATA Receive Data NO_ACK - 9th bit Stop - End of reading I2C Random address read in dynamic registers Table 289. Random byte read in Dynamic registers Request/Response Frame DS13519 - Rev 4 Comment Master drives SDA Slave drives SDA Start A6h - Device select for writing - ACK 9th bit 20h - Send Address MSB (1 Byte) - ACK 9th bit ADDRESS_LSB - Send Adress LSB (1 Byte) - ACK 9th bit Start A7h - Device select for reading - ACK 9th bit - DATA Receive Data NO_ACK - 9th bit Stop - End of reading page 175/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C sequential read B.6 I²C sequential read B.6.1 I2C sequential read in user memory Table 290. Sequential Read User memory if read operation allowed (depending on area protection and RF user security session) and all bytes belong to the same area Request/Response Frame DS13519 - Rev 4 Comment Master drives SDA Slave drives SDA Start A6h - Device select for writing - ACK 9th bit ADDRESS_MSB - Send Address MSB (1 Byte) - ACK 9th bit ADDRESS_LSB - Send Address LSB (1 Byte) - ACK 9th bit Start A7h0 - Device select for reading - ACK 9th bit - DATA 0 Receive Data 0 ACK - 9th bit - DATA 1 Receive Data 1 ACK - 9th bit - ... ... ... - ... - DATA n Receive Data n NO_ACK - 9th bit Stop - End of Reading page 176/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C sequential read Table 291. Sequential Read User memory if read operation allowed (depending on area protection and RF user security session) but crossing area border Request/Response Frame DS13519 - Rev 4 Comment Master drives SDA Slave drives SDA Start A6h - Device select for writing - ACK 9th bit ADDRESS_MSB - Send Address MSB (1 Byte) - ACK 9th bit ADDRESS_LSB - Send Address LSB (1 Byte) - ACK 9th bit Start A7h - Device select for reading - ACK 9th bit - DATA 0 Receive Data 0 ACK - 9th bit - DATA 1 Receive Data 1 ACK - 9th bit - ... ... ... - ... - DATA n Receive Data last Address available ACK - 9th bit - FFh ACK - 9th bit - ... ... ... - ... - FFh Stop - Data is located in next memory area ST25DV release SDA Data is located in next memory area ST25DV release SDA End of reading page 177/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C sequential read Table 292. Sequential Read User memory if read operation allowed (depending on area protection and RF user security session) Request/Response Frame DS13519 - Rev 4 Comment Master drives SDA Slave drives SDA Start A6h - Device select for writing - ACK 9th bit ADDRESS_MSB - Send Address MSB (1 Byte) - ACK 9th bit ADDRESS_LSB - Send Address LSB (1 Byte) - ACK 9th bit Start A7h - Device select for reading - ACK 9th bit - FFh ACK - 9th bit - ... ... ... - ... - FFh NO_ACK - 9th bit Stop - End of reading ST25DV release SDA Reading access not granted ST25DV release SDA Reading access not granted page 178/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C sequential read B.6.2 I2C sequential read in system memory Table 293. Sequential in Read System memory (I2C security session open if reading I2C_PWD) Request/Response Frame DS13519 - Rev 4 Comment Master drives SDA Slave drives SDA Start AEh - Device select for writing - ACK 9th bit ADDRESS_MSB - Send Address MSB (1 Byte) - ACK 9th bit ADDRESS_LSB - Send Address LSB (1 Byte) - ACK 9th bit Start AF7h - Device select for reading - ACK 9th bit - DATA Receive Data 0 ACK - 9th bit - DATA Receive Data 1 ACK - 9th bit - ... ... ... - ... - DATA Receive Data n NO_ACK - 9th bit Stop - End of Reading page 179/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C sequential read Table 294. Sequential Read system memory when access is not granted (I2C password I2C_PWD) Request/Response Frame DS13519 - Rev 4 Comment Master drives SDA Slave drives SDA Start AEh - Device select for writing - ACK 9th bit 90h - Send Address MSB (1 Byte) - ACK 9th bit ADDRESS_LSB - Send Address LSB (1 Byte) - ACK 9th bit Start AFh - Device select for reading - ACK 9th bit - DATA Receive Data 0 - FFh ACK - 9th bit - ... ... ... - ... - FFh NO_ACK - 9th bit Stop - End of reading ST25DV release SDA Reading access is not granted ST25DV release SDA Reading access is not granted page 180/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C sequential read B.6.3 I2C sequential read in dynamic registers Table 295. Sequential read in dynamic register Request/Response Frame Comment Master drives SDA Slave drives SDA Start A6h - Device select for writing - ACK 9th bit 20h - Send Address MSB (1 Byte) - ACK 9th bit Send Address LSB (1 Byte) Dynamic register ADDRESS_LSB - Fynamic register are located form address 2000h to 2007 DS13519 - Rev 4 - ACK 9th bit Start A7h - Device select for reading - ACK 9th bit - DATA Receive Data 0 ACK - 9th bit - DATA Receive Data 1 ACK - 9th bit - ... ... ... - ... - Data Receive Data n NO_ACK - 9th bit Stop - End of reading page 181/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C sequential read Table 296. Sequential read in Dynamic register and mailbox continuously if fast transfer mode is activated Request/Response Frame Slave drives SDA Start A6h - Device select for writing - ACK 9th bit 20h - Send Address MSB (1 Byte) - ACK 9th bit Dynamic Register ADDRESS_LSB DS13519 - Rev 4 Comment Master drives SDA Send Address LSB (1 Byte) - Dynamic register are located from address 2000h to 2007h - ACK 9th bit Start A7h - Device select for reading - ACK 9th bit - DATA 0 Receive Data 0 ACK - 9th bit - DATA 1 Receive Data 1 ACK - 9th bit - ... ... ... - ... - DATA n ACK - 9th bit - DATA n + 1 Mailbox byte 0 ACK - 9th bit - DATA n + 2 Mailbox byte 1 ACK - 9th bit - ... ... ... - ... - Data n + i Mailbox byte i (i < 256) NO_ACK - 9th bit Stop - End of reading Receive Data n (n ≤ 8) Last Dynamic register address 2007h page 182/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C sequential read B.6.4 I2C sequential read in mailbox Table 297. Sequential in mailbox if fast transfer mode is activated Request/Response Frame DS13519 - Rev 4 Comment Master drives SDA Slave drives SDA Start A6h - Device select for writing - ACK 9th bit 20h or 21h - - ACK ADDRESS_LSB - - ACK 9th bit Start A7h - Device select for reading - ACK 9th bit - DATA 0 Receive Data 0 ACK - 9th bit - DATA 1 Receive Data 1 ACK - 9th bit - ... ... ... - ... - Data n Receive Data n NO_ACK - 9th bit Stop - End of reading Send Address MSB (1 Byte) 2007h < @ 2108h 9th bit Send Address LSB (1 Byte) 2007h < @ 2108h page 183/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C sequential read Table 298. Sequential read in mailbox if fast transfer mode is not activated Request/Response Frame DS13519 - Rev 4 Comment Master drives SDA Slave drives SDA Start A6h - Device select for writing - ACK 9th bit 20h or 21h - - ACK ADDRESS_LSB - - ACK 9th bit Start A7h - Device select for reading - ACK 9th bit - FFh release SDA ACK - 9th bit - FFh release SDA ACK - 9th bit Send Address MSB (1 Byte) 2007h < @ 2108h 9th bit Send Address LSB (1 Byte) 2007h < @ 2108h - ... ... ... - ... - FFh release SDA NO_ACK - 9th bit Stop - End of reading page 184/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C password relative sequences B.7 I²C password relative sequences B.7.1 I2C write password Table 299. Write Password when I2C security session is already open and fast transfer mode is not activated Request/Response Frame DS13519 - Rev 4 Comment Master drives SDA Slave drives SDA Start AEh - Device select for writing - ACK 9th bit 09h - Send I2C_PWD MSB address - ACK 9th bit 00h - Send I2C_PWD LSB address - ACK 9th bit I2C_PWD_BYTE_7 - Send I2C_PWD MSB - ACK 9th bit I2C_PWD_BYTE_6 DATA 0 Send Data - ACK 9th bit ... - ... - ... ... I2C_PWD_BYTE_0 - Send I2C_PWD LSB - ACK 9th bit 07h - Write password command - ACK 9th bit I2C_PWD_BYTE_7 - Send I2C_PWD MSB - ACK 9th bit I2C_PWD_BYTE_6 DATA 0 Send Data - ACK 9th bit ... - ... - ... ... I2C_PWD_BYTE_0 - Send I2C_PWD LSB - ACK 9th bit Stop - Start of I2C password programming page 185/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C password relative sequences Table 300. Write Password when I2C security session is not open or fast transfer mode activated Request/Response Frame DS13519 - Rev 4 Comment Master drives SDA Slave drives SDA Start AEh - Device select for writing - ACK 9th bit 09h - Send I2C_PWD MSB address - ACK 9th bit 00h - Send I2C_PWD LSB address - NoACK 9th bit Stop - No PWD Programming Device return in Standby page 186/203 ST25DV04KC ST25DV16KC ST25DV64KC I²C password relative sequences B.7.2 I2C present password Table 301. Present Password (whatever status of I2C security session or fast transfer mode) Request/Response Frame DS13519 - Rev 4 Comment Master drives SDA Slave drives SDA Start AEh - Device select for writing - ACK 9th bit 09h - Send I2C_PWD MSB address - ACK 9th bit 00h - Send I2C_PWD LSB address - ACK 9th bit I2C_PWD_BYTE_7 - Send I2C_PWD MSB - ACK 9th bit I2C_PWD_BYTE_6 DATA 0 Send Data - ACK 9th bit ... - ... - ... ... I2C_PWD_BYTE_0 - Send I2C_PWD LSB - ACK 9th bit 09h - Present password command - ACK 9th bit I2C_PWD_BYTE_7 - Send I2C_PWD MSB - ACK 9th bit I2C_PWD_BYTE_6 - Send Data - ACK 9th bit ... - ... - ... ... I2C_PWD_BYTE_0 - Send I2C_PWD LSB - ACK 9th bit Stop - ST25DV with active I2C_PWD. Result is immediate. page 187/203 ST25DV04KC ST25DV16KC ST25DV64KC Revision history Table 302. Document revision history Date Revision Changes 23-Jun-2021 1 Initial release. 22-Jul-2021 2 Modified the title of the document. Added WLCSP10 package Updated: 09-Feb-2022 3 • Features • Section 1.1 ST25DVxxKC block diagram • Section 1.2 ST25DVxxKC packaging • Section 2.2.2 Low power down (LPD) • Section 2.4.1 Driver supply voltage (VDCG) • Section 2.4.2 General purpose output (GPO) Updated: 22-Jul-2022 DS13519 - Rev 4 4 • Features • Figure 15. I²C “RFSwitchOff” command • Figure 16. I²C “RFSwitchOn” commandSection 6.3 Device addressing • Figure 81. I2C AC waveforms • Section 10.1 SO8N package information • Section 10.2 TSSOP8 package information • Table 265. Ordering information scheme page 188/203 ST25DV04KC ST25DV16KC ST25DV64KC Contents Contents 1 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 1.1 ST25DVxxKC block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 ST25DVxxKC packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Signal descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 2.2 2.3 Serial link (SCL, SDA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.1 Serial clock (SCL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.2 Serial data (SDA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Power control (VCC, LPD, VSS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2.1 Supply voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2.2 Low power down (LPD). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2.3 Ground (VSS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 RF link (AC0 AC1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3.1 2.4 2.5 3 4 Process control (VDCG, GPO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4.1 Driver supply voltage (VDCG). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4.2 General purpose output (GPO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Energy harvesting analog output (V_EH). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power management. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 3.1 Wired interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.2 Contactless interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Memory management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 4.1 Memory organization overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.2 User memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.2.1 5 Antenna coil (AC0, AC1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 User memory areas. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.3 System configuration area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.4 Dynamic configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.5 Fast transfer mode mailbox . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 ST25DVxxKC specific features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 5.1 Fast transfer mode (FTM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.1.1 DS13519 - Rev 4 Fast transfer mode registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 page 189/203 ST25DV04KC ST25DV16KC ST25DV64KC Contents 5.1.2 5.2 5.3 RF management feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 5.2.1 RF management registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 5.2.2 RF management feature description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Interface arbitration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.3.1 5.4 5.5 5.6 5.7 6 Fast transfer mode usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Interface Arbitration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 GPO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5.4.1 ST25DVxxKC interrupt capabilities on RF events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5.4.2 ST25DVxxKC interrupt capabilities on I2C events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 5.4.3 GPO and power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 5.4.4 GPO registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 5.4.5 Configuring GPO. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Energy harvesting (EH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 5.5.1 Energy harvesting registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 5.5.2 Energy harvesting feature description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 5.5.3 EH delivery state diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 5.5.4 EH delivery sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Data protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 5.6.1 Data protection registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 5.6.2 Passwords and security sessions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 5.6.3 User memory protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 5.6.4 System memory protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Device parameter registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 I²C operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67 6.1 6.2 DS13519 - Rev 4 I²C protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 6.1.1 Start condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 6.1.2 Stop condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 6.1.3 Acknowledge bit (ACK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 6.1.4 Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 I²C timeout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 6.2.1 I2C timeout on Start condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 6.2.2 I2C timeout on clock period . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 page 190/203 ST25DV04KC ST25DV16KC ST25DV64KC Contents 6.3 Device addressing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 6.4 I²C Write operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 6.5 6.6 7 6.4.1 I2C Byte write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 6.4.2 I2C Sequential write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 6.4.3 Minimizing system delays by polling on ACK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 I²C read operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 6.5.1 Random address read. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 6.5.2 Current address read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 6.5.3 Sequential read access. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 6.5.4 Acknowledge in read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 I²C password management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 6.6.1 I2C present password command description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 6.6.2 I2C write password command description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 RF operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .77 7.1 RF communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 7.1.1 Access to a ISO/IEC 15693 device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 7.2 RF communication and energy harvesting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 7.3 Fast transfer mode mailbox access in RF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 7.4 RF protocol description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 7.4.1 Protocol description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 7.4.2 ST25DVxxKC states referring to RF protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 7.4.3 Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 7.4.4 Request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 7.4.5 Request flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 7.4.6 Response format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 7.4.7 Response flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 7.4.8 Response and error code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 7.5 Timing definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 7.6 RF commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 DS13519 - Rev 4 7.6.1 RF command code list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 7.6.2 Command codes list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 7.6.3 General command rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 page 191/203 ST25DV04KC ST25DV16KC ST25DV64KC Contents DS13519 - Rev 4 7.6.4 Inventory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 7.6.5 Stay Quiet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 7.6.6 Read Single Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 7.6.7 Extended Read Single Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 7.6.8 Write Single Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 7.6.9 Extended Write Single Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 7.6.10 Lock Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 7.6.11 Extended Lock block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 7.6.12 Read Multiple Blocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 7.6.13 Extended Read Multiple Blocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 7.6.14 Write Multiple Blocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 7.6.15 Extended Write Multiple Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 7.6.16 Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 7.6.17 Reset to Ready . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 7.6.18 Write AFI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 7.6.19 Lock AFI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 7.6.20 Write DSFID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 7.6.21 Lock DSFID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 7.6.22 Get System Info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 7.6.23 Extended Get System Info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 7.6.24 Get Multiple Block Security Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113 7.6.25 Extended Get Multiple Block Security Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115 7.6.26 Read Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 7.6.27 Write Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 7.6.28 Read Dynamic Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 7.6.29 Write Dynamic Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 7.6.30 Manage GPO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 7.6.31 Write Message . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122 7.6.32 Read Message Length . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 7.6.33 Read Message . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 7.6.34 Fast Read Message . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 7.6.35 Write Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126 7.6.36 Present Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 page 192/203 ST25DV04KC ST25DV16KC ST25DV64KC Contents 7.6.37 Fast Read Single Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 7.6.38 Fast Extended Read Single Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 7.6.39 Fast Read Multiple Blocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132 7.6.40 Fast Extended Read Multiple Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133 7.6.41 Fast Write Message . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134 7.6.42 Fast Read Message Length . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136 7.6.43 Fast Read Dynamic Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 7.6.44 Fast Write Dynamic Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138 8 Unique identifier (UID) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140 9 Device parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141 10 11 9.1 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141 9.2 I²C DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142 9.3 GPO characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149 9.4 RF electrical parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 9.5 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152 10.1 SO8N package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152 10.2 TSSOP8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154 10.3 UFDFN8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156 10.4 WLCSP10 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158 10.5 UFDFPN12 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161 Appendix A Bit representation and coding for fast commands . . . . . . . . . . . . . . . . . . . . . . 162 A.1 Bit coding using one subcarrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162 A.1.1 High data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162 A.1.2 Low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162 A.2 ST25DVxxKC to VCD frames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163 A.3 SOF when using one subcarrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163 A.4 DS13519 - Rev 4 A.3.1 High data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163 A.3.2 Low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163 EOF when using one subcarrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164 page 193/203 ST25DV04KC ST25DV16KC ST25DV64KC Contents A.4.1 High data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164 A.4.2 Low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164 Appendix B I²C sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 B.1 Device select codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 B.2 I²C Byte writing and polling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 B.3 B.4 B.2.1 I²C byte write in user memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 B.2.2 I²C byte writing in dynamic registers and polling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167 B.2.3 I2C byte write in mailbox and polling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168 B.2.4 I2C byte write and polling in system memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169 I²C sequential writing and polling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170 B.3.1 I2C sequential write in user memory and polling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170 B.3.2 I2C sequential write in mailbox and polling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172 I²C Read current address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173 B.4.1 B.5 B.6 B.7 I2C current address read in User memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173 I²C random address read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174 B.5.1 I2C random address read in user memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174 B.5.2 I2C Random address read in system memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175 B.5.3 I2C Random address read in dynamic registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175 I²C sequential read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176 B.6.1 I2C sequential read in user memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176 B.6.2 I2C sequential read in system memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 179 B.6.3 I2C sequential read in dynamic registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181 B.6.4 I2C sequential read in mailbox . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183 I²C password relative sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185 B.7.1 I2C write password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185 B.7.2 I2C present password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188 DS13519 - Rev 4 page 194/203 ST25DV04KC ST25DV16KC ST25DV64KC List of tables List of tables Table 1. Table 2. Table 3. 8-pin packages signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 10-pin packages signal names. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 12-pin packages signal names. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Table 44. Table 45. Table 46. Table 47. Table 48. Table 49. Table 50. Table 51. Table 52. User memory as seen by RF and by I2C . . . . . . . . . . . . . . . . . . . . Maximum user memory block and byte addresses and ENDAi value. Areas and limit calculation from ENDAi registers . . . . . . . . . . . . . . ENDA1 access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ENDA1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ENDA2 access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ENDA2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ENDA3 access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ENDA3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . System configuration memory map . . . . . . . . . . . . . . . . . . . . . . . Dynamic registers memory map. . . . . . . . . . . . . . . . . . . . . . . . . . Fast transfer mode mailbox memory map . . . . . . . . . . . . . . . . . . . FTM access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . FTM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MB_CTRL_Dyn access. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MB_CTRL_Dyn . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MB_LEN_Dyn access. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MB_LEN_Dyn . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF_MNGT access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF_MNGT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF_MNGT_Dyn access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF_MNGT_Dyn. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF modes summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF modes configuration bits and effect on RF requests. . . . . . . . . . FIELD_CHANGE when RF is disabled or in sleep of off mode . . . . . GPO interrupt capabilities in function of RF field and VCC . . . . . . . . GPO1 access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GPO1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GPO2 access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GPO2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GPO_CTRL_Dyn access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GPO_CTRL_Dyn . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IT_STS_Dyn access. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IT_STS_Dyn . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Enabling or disabling GPO interruptions . . . . . . . . . . . . . . . . . . . . EH_MODE access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EH_MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EH_CTRL_Dyn access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EH_CTRL_Dyn . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Energy harvesting at power-up . . . . . . . . . . . . . . . . . . . . . . . . . . RFA1SS access. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RFA1SS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RFA2SS access. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RFA2SS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RFA3SS access. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RFA3SS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RFA4SS access. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RFA4SS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I2CSS access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DS13519 - Rev 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 15 15 17 17 17 17 17 18 18 20 21 23 23 23 24 24 24 28 28 28 28 30 30 37 43 43 44 44 45 45 45 45 46 47 48 48 48 48 49 51 52 52 52 52 53 53 53 54 page 195/203 ST25DV04KC ST25DV16KC ST25DV64KC List of tables Table 53. Table 54. Table 55. Table 56. Table 57. Table 58. Table 59. Table 60. Table 61. Table 62. Table 63. Table 64. Table 65. Table 66. Table 67. Table 68. Table 69. Table 70. Table 71. Table 72. Table 73. Table 74. Table 75. Table 76. Table 77. Table 78. Table 79. Table 80. Table 81. Table 82. Table 83. Table 84. Table 85. Table 86. Table 87. Table 88. Table 89. Table 90. Table 91. Table 92. Table 93. Table 94. Table 95. Table 96. Table 97. Table 98. Table 99. Table 100. Table 101. Table 102. Table 103. Table 104. Table 105. Table 106. I2CSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . LOCK_CCFILE access . . . . . . . . . . . . . . . . . . . . . . LOCK_CCFILE . . . . . . . . . . . . . . . . . . . . . . . . . . . LOCK_CFG access . . . . . . . . . . . . . . . . . . . . . . . . LOCK_CFG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I2C_PWD access. . . . . . . . . . . . . . . . . . . . . . . . . . I2C_PWD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF_PWD_0 access . . . . . . . . . . . . . . . . . . . . . . . . RF_PWD_0. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF_PWD_1 access . . . . . . . . . . . . . . . . . . . . . . . . RF_PWD_1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF_PWD_2 access . . . . . . . . . . . . . . . . . . . . . . . . RF_PWD_2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF_PWD_3 access . . . . . . . . . . . . . . . . . . . . . . . . RF_PWD_3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I2C_SSO_Dyn access . . . . . . . . . . . . . . . . . . . . . . I2C_SSO_Dyn. . . . . . . . . . . . . . . . . . . . . . . . . . . . Security session type . . . . . . . . . . . . . . . . . . . . . . . LOCK_DSFID access. . . . . . . . . . . . . . . . . . . . . . . LOCK_DSFID . . . . . . . . . . . . . . . . . . . . . . . . . . . . LOCK_AFI access . . . . . . . . . . . . . . . . . . . . . . . . . LOCK_AFI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DSFID access . . . . . . . . . . . . . . . . . . . . . . . . . . . . DSFID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AFI access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AFI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MEM_SIZE access. . . . . . . . . . . . . . . . . . . . . . . . . MEM_SIZE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . BLK_SIZE access . . . . . . . . . . . . . . . . . . . . . . . . . BLK_SIZE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC_REF access . . . . . . . . . . . . . . . . . . . . . . . . . . . IC_REF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UID access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC_REV access . . . . . . . . . . . . . . . . . . . . . . . . . . . IC_REV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Device select code . . . . . . . . . . . . . . . . . . . . . . . . . I2C_CFG access . . . . . . . . . . . . . . . . . . . . . . . . . . I2C_CFG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . Address most significant byte . . . . . . . . . . . . . . . . . Address least significant byte . . . . . . . . . . . . . . . . . ST25DVxxKC response depending on Request_flags. General request format . . . . . . . . . . . . . . . . . . . . . . Definition of request flags 1 to 4 . . . . . . . . . . . . . . . . Request flags 5 to 8 when inventory_flag, Bit 3 = 0. . . Request flags 5 to 8 when inventory_flag, Bit 3 = 1. . . General response format . . . . . . . . . . . . . . . . . . . . Definitions of response flags 1 to 8. . . . . . . . . . . . . . Response error code definition . . . . . . . . . . . . . . . . Timing values . . . . . . . . . . . . . . . . . . . . . . . . . . . . Command codes . . . . . . . . . . . . . . . . . . . . . . . . . . Inventory request format . . . . . . . . . . . . . . . . . . . . . Inventory response format. . . . . . . . . . . . . . . . . . . . DS13519 - Rev 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 55 55 55 55 56 56 56 56 57 57 57 57 58 58 58 58 59 63 63 63 63 64 64 64 64 64 65 65 65 65 65 66 66 66 66 69 69 69 70 70 70 79 80 81 81 81 82 82 83 84 86 87 87 page 196/203 ST25DV04KC ST25DV16KC ST25DV64KC List of tables Table 107. Table 108. Table 109. Table 110. Table 111. Table 112. Table 113. Table 114. Table 115. Table 116. Table 117. Table 118. Table 119. Table 120. Table 121. Table 122. Table 123. Table 124. Table 125. Table 126. Table 127. Table 128. Table 129. Table 130. Table 131. Table 132. Table 133. Table 134. Table 135. Table 136. Table 137. Table 138. Table 139. Table 140. Table 141. Table 142. Table 143. Table 144. Table 145. Table 146. Table 147. Table 148. Table 149. Table 150. Table 151. Table 152. Table 153. Table 154. Table 155. Table 156. Table 157. Table 158. Table 159. Table 160. Stay Quiet request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Read Single Block request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Read Single Block response format when Error_flag is NOT set. . . . . . . . . Block security status. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Read Single Block response format when Error_flag is set . . . . . . . . . . . . Extended Read Single Block request format . . . . . . . . . . . . . . . . . . . . . . Extended Read Single Block response format when Error_flag is NOT set . Block security status. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Extended Read Single Block response format when Error_flag is set . . . . . Write Single Block request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Write Single Block response format when Error_flag is NOT set. . . . . . . . . Write Single Block response format when Error_flag is set . . . . . . . . . . . . Extended Write Single request format. . . . . . . . . . . . . . . . . . . . . . . . . . . Extended Write Single response format when Error_flag is NOT set . . . . . . Extended Write Single response format when Error_flag is set. . . . . . . . . . Lock block request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Lock block response format when Error_flag is NOT set . . . . . . . . . . . . . . Lock block response format when Error_flag is set . . . . . . . . . . . . . . . . . . Extended Lock block request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . Extended Lock block response format when Error_flag is NOT set . . . . . . . Extended Lock block response format when Error_flag is set. . . . . . . . . . . Read Multiple Block request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . Read Multiple Block response format when Error_flag is NOT set . . . . . . . Block security status. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Read Multiple Block response format when Error_flag is set . . . . . . . . . . . Extended Read Multiple Block request format . . . . . . . . . . . . . . . . . . . . . Extended Read Multiple Block response format when Error_flag is NOT set Block security status. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Extended Read Multiple Block response format when Error_flag is set . . . . Write Multiple Block request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . Write Multiple Block response format when Error_flag is NOT set. . . . . . . . Write Multiple Block response format when Error_flag is set . . . . . . . . . . . Extended Write Multiple Block request format . . . . . . . . . . . . . . . . . . . . . Extended Write Multiple Block response format when Error_flag is NOT set Extended Write Multiple Block response format when Error_flag is set . . . . Select request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Select Block response format when Error_flag is NOT set . . . . . . . . . . . . . Select response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . Reset to Ready request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reset to Ready response format when Error_flag is NOT set. . . . . . . . . . . Reset to ready response format when Error_flag is set . . . . . . . . . . . . . . . Write AFI request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Write AFI response format when Error_flag is NOT set . . . . . . . . . . . . . . . Write AFI response format when Error_flag is set . . . . . . . . . . . . . . . . . . . Lock AFI request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Lock AFI response format when Error_flag is NOT set . . . . . . . . . . . . . . . Lock AFI response format when Error_flag is set . . . . . . . . . . . . . . . . . . . Write DSFID request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Write DSFID response format when Error_flag is NOT set. . . . . . . . . . . . . Write DSFID response format when Error_flag is set . . . . . . . . . . . . . . . . Lock DSFID request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Lock DSFID response format when Error_flag is NOT set . . . . . . . . . . . . . Lock DSFID response format when Error_flag is set . . . . . . . . . . . . . . . . . Get System Info request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DS13519 - Rev 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 . 88 . 88 . 89 . 89 . 89 . 90 . 90 . 90 . 91 . 91 . 91 . 92 . 92 . 92 . 93 . 93 . 93 . 94 . 94 . 95 . 95 . 96 . 96 . 96 . 97 . 97 . 97 . 97 . 98 . 99 . 99 100 100 100 101 101 101 102 102 102 103 103 103 104 104 105 105 105 106 106 107 107 108 page 197/203 ST25DV04KC ST25DV16KC ST25DV64KC List of tables Table 161. Table 162. Table 163. Table 164. Table 165. Table 166. Table 167. Table 168. Table 169. Table 170. Table 171. Table 172. Table 173. Table 174. Table 175. Table 176. Table 177. Table 178. Table 179. Table 180. Table 181. Table 182. Table 183. Table 184. Table 185. Table 186. Table 187. Table 188. Table 189. Table 190. Table 191. Table 192. Table 193. Table 194. Table 195. Table 196. Table 197. Table 198. Table 199. Table 200. Table 201. Table 202. Table 203. Table 204. Table 205. Table 206. Table 207. Table 208. Table 209. Table 210. Table 211. Table 212. Table 213. Table 214. Get System Info response format Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . . Memory size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Get System Info response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . Extended Get System Info request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter request list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Extended Get System Info response format when Error_flag is NOT set . . . . . . . . . . . . Response Information Flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Response other field: ST25DVxxKC VICC memory size . . . . . . . . . . . . . . . . . . . . . . . Response other field: ST25DVxxKC IC Ref . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Response other field: ST25DVxxKC VICC command list . . . . . . . . . . . . . . . . . . . . . . . Response other field: ST25DVxxKC VICC command list Byte 1 . . . . . . . . . . . . . . . . . . Response other field: ST25DVxxKC VICC command list Byte 2 . . . . . . . . . . . . . . . . . . Response other field: ST25DVxxKC VICC command list Byte 3 . . . . . . . . . . . . . . . . . . Response other field: ST25DVxxKC VICC command list Byte 4 . . . . . . . . . . . . . . . . . . Extended Get System Info response format when Error_flag is set . . . . . . . . . . . . . . . . Get Multiple Block Security Status request format . . . . . . . . . . . . . . . . . . . . . . . . . . . Get Multiple Block Security Status response format when Error_flag is NOT set. . . . . . . Block security status. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Get Multiple Block Security Status response format when Error_flag is set . . . . . . . . . . Extended Get Multiple Block Security Status request format . . . . . . . . . . . . . . . . . . . . Extended Get Multiple Block Security Status response format when Error_flags NOT set Block security status. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Extended Get Multiple Block Security Status response format when Error_flag is set . . . Read Configuration request format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Read Configuration response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . Read Configuration response format when Error_flag is set. . . . . . . . . . . . . . . . . . . . . Write Configuration request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Write Configuration response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . Write configuration response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . Read Dynamic Configuration request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Read Dynamic Configuration response format when Error_flag is NOT set . . . . . . . . . . Read Dynamic Configuration response format when Error_flag is set . . . . . . . . . . . . . . Write Dynamic Configuration request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Write Dynamic Configuration response format when Error_flag is NOT set . . . . . . . . . . Write Dynamic Configuration response format when Error_flag is set . . . . . . . . . . . . . . Manage GPO request format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GPOVAL. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Manage GPO response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . ManageGPO response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . Write Message request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Write Message response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . Write Message response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . Read Message Length request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Read Message Length response format when Error_flag is NOT set. . . . . . . . . . . . . . . Read Message Length response format when Error_flag is set . . . . . . . . . . . . . . . . . . Read Message request format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Read Message response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . Fast Read Message request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fast Read Message response format when Error_flag is NOT set . . . . . . . . . . . . . . . . Write Password request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Write Password response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . Write Password response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . Present Password request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Present Password response format when Error_flag is NOT set. . . . . . . . . . . . . . . . . . DS13519 - Rev 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 108 108 109 .110 .110 .111 .111 .111 .111 .112 .112 .112 .113 .113 .114 .114 .114 .114 .115 .115 .115 .115 .117 .117 .117 .118 .118 .118 .119 .119 .119 120 120 120 121 121 122 122 122 123 123 124 124 124 125 125 126 126 127 127 127 128 128 page 198/203 ST25DV04KC ST25DV16KC ST25DV64KC List of tables Table 215. Table 216. Table 217. Table 218. Table 219. Table 220. Table 221. Table 222. Table 223. Table 224. Table 225. Table 226. Table 227. Table 228. Table 229. Table 230. Table 231. Table 232. Table 233. Table 234. Table 235. Table 236. Table 237. Table 238. Table 239. Table 240. Table 241. Table 242. Table 243. Table 244. Table 245. Table 246. Table 247. Table 248. Table 249. Present Password response format when Error_flag is set . . . . . . . . . . . . . . . . Fast Read Single Block request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fast Read Single Block response format when Error_flag is NOT set . . . . . . . . . Block security status. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fast Read Single Block response format when Error_flag is set . . . . . . . . . . . . . Fast Extended Read Single Block request format . . . . . . . . . . . . . . . . . . . . . . . Fast Extended Read Single Block response format when Error_flag is NOT set . . Block security status. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fast Extended Read Single Block response format when Error_flag is set. . . . . . Fast Read Multiple Block request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fast Read Multiple Block response format when Error_flag is NOT set . . . . . . . . Block security status if Option_flag is set. . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fast Read Multiple Block response format when Error_flag is set . . . . . . . . . . . . Fast Extended Read Multiple Block request format. . . . . . . . . . . . . . . . . . . . . . Fast Extended Read Multiple Block response format when Error_flag is NOT set . Block security status if Option_flag is set. . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fast Read Multiple Block response format when Error_flag is set . . . . . . . . . . . . Fast Write Message request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fast Write Message response format when Error_flag is NOT set . . . . . . . . . . . Fast Write Message response format when Error_flag is set . . . . . . . . . . . . . . . Fast Read Message Length request format . . . . . . . . . . . . . . . . . . . . . . . . . . . Fast Read Message Length response format when Error_flag is NOT set . . . . . . Fast Read Message Length response format when Error_flag is set . . . . . . . . . . Fast Read Dynamic configuration request format . . . . . . . . . . . . . . . . . . . . . . . Fast Read Dynamic configuration response format when Error_flag is NOT set . . Fast Read Dynamic configuration response format when Error_flag is set . . . . . . Fast Write Dynamic Configuration request format. . . . . . . . . . . . . . . . . . . . . . . Fast Write Dynamic Configuration response format when Error_flag is NOT set . . Fast Write Dynamic Configuration response format when Error_flag is set. . . . . . UID format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I²C operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AC test measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I²C DC characteristics up to 85 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 129 129 130 130 130 131 131 131 132 132 132 132 133 134 134 134 135 135 135 136 136 136 137 137 137 138 138 139 140 141 142 142 142 143 Table 250. I2C DC characteristics up to 125 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144 Table 251. I2C AC characteristics up to 85 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146 Table 252. Table 253. Table 254. Table 255. Table 256. Table 257. Table 258. Table 259. Table 260. Table 261. Table 262. Table 263. Table 264. Table 265. Table 266. Table 267. Table 268. I2C AC characteristics up to 125 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GPO DC characteristics up to 85 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GPO DC characteristics up to 125 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GPO AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SO8N – Mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TSSOP8 – Mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UFDFN8 - Mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . WLCSP - 10 balls, 1.649x1.483 mm, 0.4 mm pitch, wafer level chip scale mechanical data . WLCSP10 recommended PCB design rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UFDFPN12 - Mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ordering information scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Device select usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Byte Write in user memory when write operation allowed . . . . . . . . . . . . . . . . . . . . . . . . Polling during programming after byte writing in user memory . . . . . . . . . . . . . . . . . . . . . DS13519 - Rev 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147 149 149 149 150 151 151 153 154 157 158 159 160 161 165 165 166 page 199/203 ST25DV04KC ST25DV16KC ST25DV64KC List of tables Table 269. Table 270. Table 271. Table 272. Table 273. Table 274. Byte Write in user memory when write operation is not allowed . . . . . . . . . . . . . . . . . . . . . . . . . . Byte Write in Dynamic Register (if not Read Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Polling during programming after byte write in Dynamic Register . . . . . . . . . . . . . . . . . . . . . . . . . Byte Write in Dynamic Register if Read Only . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Byte Write in mailbox when mailbox is free from RF message and fast transfer mode is activated . . Byte Write in mailbox when mailbox is not free from RF message fast transfer mode is not activated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166 167 167 167 168 168 Table 275. Byte Write in System memory if I2C security session is open and register is not RO . . . . . . . . . . . . . . . . . . . . 169 Table 276. Polling during programing after byte write in System memory if I2C security session is open and register is not RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169 Table 277. Byte Write in System memory if I2C security session is closed or register is RO . . . . . . . . . . . . . . . . . . . . . . . 170 Table 278. Sequential write User memory when write operation allowed and all bytes belong to same area. . . . . . . . . . . . 170 Table 279. Polling during programing after sequential write in User memory when write operation allowed and all bytes belong to same area. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171 Table 280. Sequential write in User memory when write operation allowed and crossing over area border. . . . . . . . . . . . . 171 Table 281. Polling during programming after sequential write in User memory when write operation allowed and crossing over area border . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172 Table 282. Sequential write in mailbox when mailbox is free from RF message and fast transfer mode is activated . . . . . . 172 Table 283. Polling during programing after sequential write in mailbox . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172 Table 284. Current byte Read in User memory if read operation allowed (depending on area protection and RF user security session) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173 Table 285. Current Read in User memory if read operation not allowed (depending on area protection and RF user security session) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173 Table 286. Random byte read in User memory if read operation allowed (depending on area protection and RF user security session) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174 Table 287. Random byte read in User memory if operation not allowed (depending on area protection and RF user security)174 Table 288. Byte Read System memory (Static register or I2C Password after a valid Present I2C Password) . . . . . . . . . . Table 289. Random byte read in Dynamic registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 290. Sequential Read User memory if read operation allowed (depending on area protection and RF user security session) and all bytes belong to the same area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 291. Sequential Read User memory if read operation allowed (depending on area protection and RF user security session) but crossing area border . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 292. Sequential Read User memory if read operation allowed (depending on area protection and RF user security session) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175 . 175 . 176 . 177 . 178 Table 293. Sequential in Read System memory (I2C security session open if reading I2C_PWD) . . . . . . . . . . . . . . . . . . . 179 Table 294. Table 295. Table 296. Table 297. Table 298. Sequential Read system memory when access is not granted (I2C password I2C_PWD) . . . . . Sequential read in dynamic register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sequential read in Dynamic register and mailbox continuously if fast transfer mode is activated . Sequential in mailbox if fast transfer mode is activated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sequential read in mailbox if fast transfer mode is not activated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180 181 182 183 184 Table 299. Write Password when I2C security session is already open and fast transfer mode is not activated. . . . . . . . . . 185 Table 300. Write Password when I2C security session is not open or fast transfer mode activated . . . . . . . . . . . . . . . . . . 186 Table 301. Present Password (whatever status of I2C security session or fast transfer mode) . . . . . . . . . . . . . . . . . . . . . 187 Table 302. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188 DS13519 - Rev 4 page 200/203 ST25DV04KC ST25DV16KC ST25DV64KC List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. ST25DVxxKC block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ST25DVxxKC 8-pin SO8N package connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ST25DVxxKC 8-pin TSSOP8 package connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ST25DVxxKC 8-pin UFDFN8 package connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-ball WLCSP package connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ST25DVxxKC 12-pin UFDFPN12 package connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ST25DVxxKC power-up sequence (No RF field, LPD pin tied to VSS or package without LPD pin). ST25DVxxKC RF power-up sequence (No DC supply) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Memory organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ST25DVxxKC user memory areas. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Figure 11. RF to I2C fast transfer mode operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 12. Figure 13. I2C to RF fast transfer mode operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Fast transfer mode mailbox access management. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. ST25DVxxKC, Arbitration between RF and I2C . . . . . I²C “RFSwitchOff” command. . . . . . . . . . . . . . . . . . I²C “RFSwitchOn” command. . . . . . . . . . . . . . . . . . RF_USER chronogram . . . . . . . . . . . . . . . . . . . . . RF_ACTIVITY chronogram . . . . . . . . . . . . . . . . . . RF_INTERRUPT chronogram. . . . . . . . . . . . . . . . . FIELD_CHANGE chronogram . . . . . . . . . . . . . . . . RF_PUT_MSG chronogram . . . . . . . . . . . . . . . . . . RF_GET_MSG chronogram . . . . . . . . . . . . . . . . . . RF_WRITE chronogram . . . . . . . . . . . . . . . . . . . . GPO/I2C_WRITE chronogram . . . . . . . . . . . . . . . . GPO/I2C_RF_OFF chronogram . . . . . . . . . . . . . . . EH delivery state diagram . . . . . . . . . . . . . . . . . . . ST25DVxxKC Energy Harvesting Delivery Sequence RF security sessions management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 32 32 34 35 36 37 38 39 40 41 42 50 51 60 Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. I2C security sessions management . . . . . . . . . . . I²C bus protocol . . . . . . . . . . . . . . . . . . . . . . . . I²C timeout on Start condition . . . . . . . . . . . . . . . Write mode sequences when write is not inhibited . Write mode sequences when write is inhibited . . . Write cycle polling flowchart using ACK . . . . . . . . Read mode sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 67 68 72 72 73 74 Figure 36. I2C Present Password Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42. Figure 43. Figure 44. Figure 45. Figure 46. Figure 47. Figure 48. Figure 49. Figure 50. Figure 51. I2C Write Password Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ST25DVxxKC protocol timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ST25DVxxKC state transition diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Stay Quiet frame exchange between VCD and ST25DVxxKC . . . . . . . . . . . . . . . Read Single Block frame exchange between VCD and ST25DVxxKC . . . . . . . . . Extended Read Single Block frame exchange between VCD and ST25DVxxKC . . Write Single Block frame exchange between VCD and ST25DVxxKC . . . . . . . . . Extended Write Single frame exchange between VCD and ST25DVxxKC . . . . . . Lock Block frame exchange between VCD and ST25DVxxKC . . . . . . . . . . . . . . Extended Lock block frame exchange between VCD and ST25DVxxKC . . . . . . . Read Multiple Block frame exchange between VCD and ST25DVxxKC . . . . . . . . Extended Read Multiple Block frame exchange between VCD and ST25DVxxKC . Write Multiple Block frame exchange between VCD and ST25DVxxKC . . . . . . . . Extended Write Multiple Block frame exchange between VCD and . . . . . . . . . . . Select frame exchange between VCD and ST25DVxxKC . . . . . . . . . . . . . . . . . . DS13519 - Rev 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 . 4 . 4 . 5 . 5 . 6 . 9 10 12 14 . 76 . 78 . 79 . 88 . 89 . 90 . 91 . 93 . 94 . 95 . 96 . 98 . 99 101 102 page 201/203 ST25DV04KC ST25DV16KC ST25DV64KC List of figures Figure 52. Figure 53. Figure 54. Figure 55. Figure 56. Figure 57. Figure 58. Figure 59. Figure 60. Figure 61. Figure 62. Figure 63. Figure 64. Figure 65. Figure 66. Figure 67. Figure 68. Figure 69. Figure 70. Figure 71. Figure 72. Figure 73. Figure 74. Figure 75. Figure 76. Figure 77. Figure 78. Figure 79. Figure 80. Reset to Ready frame exchange between VCD and ST25DVxxKC . . . . . . . . . . . . . . . . . . . . Write AFI frame exchange between VCD and ST25DVxxKC. . . . . . . . . . . . . . . . . . . . . . . . . Lock AFI frame exchange between VCD and ST25DVxxKC . . . . . . . . . . . . . . . . . . . . . . . . . Write DSFID frame exchange between VCD and ST25DVxxKC . . . . . . . . . . . . . . . . . . . . . . Lock DSFID frame exchange between VCD and ST25DVxxKC. . . . . . . . . . . . . . . . . . . . . . . Get System Info frame exchange between VCD and ST25DVxxKC . . . . . . . . . . . . . . . . . . . . Extended Get System Info frame exchange between VCD and ST25DVxxKC. . . . . . . . . . . . . Get Multiple Block Security Status frame exchange between VCD and . . . . . . . . . . . . . . . . . Extended Get Multiple Block Security Status frame exchange between VCD and ST25DVxxKC Read Configuration frame exchange between VCD and ST25DVxxKC . . . . . . . . . . . . . . . . . Write Configuration exchange between VCD and ST25DVxxKC . . . . . . . . . . . . . . . . . . . . . . Read Dynamic Configuration frame exchange between VCD and ST25DVxxKC . . . . . . . . . . . Write Dynamic Configuration frame exchange between VCD and ST25DVxxKC . . . . . . . . . . . Manage GPO frame exchange between VCD and ST25DVxxKC . . . . . . . . . . . . . . . . . . . . . Write Message frame exchange between VCD and ST25DVxxKC. . . . . . . . . . . . . . . . . . . . . Read Message Length frame exchange between VCD and ST25DVxxKC . . . . . . . . . . . . . . . Read Message frame exchange between VCD and ST25DVxxKC . . . . . . . . . . . . . . . . . . . . Fast Read Message frame exchange between VCD and ST25DVxxKC . . . . . . . . . . . . . . . . . Write Password frame exchange between VCD and ST25DVxxKC . . . . . . . . . . . . . . . . . . . . Present Password frame exchange between VCD and ST25DVxxKC . . . . . . . . . . . . . . . . . . Fast Read Single Block frame exchange between VCD and ST25DVxxKC. . . . . . . . . . . . . . . Fast Extended Read Single Block frame exchange between VCD and ST25DVxxKC . . . . . . . Fast Read Multiple Block frame exchange between VCD and ST25DVxxKC. . . . . . . . . . . . . . Fast Extended Read Multiple Block frame exchange between VCD and ST25DVxxKC . . . . . . Fast Write Message frame exchange between VCD and ST25DVxxKC . . . . . . . . . . . . . . . . . Fast Read Message Length frame exchange between VCD and ST25DVxxKC. . . . . . . . . . . . Fast Read Dynamic configuration frame exchange between VCD and ST25DVxxKC. . . . . . . . Fast Write Dynamic Configuration frame exchange between VCD and ST25DVxxKC . . . . . . . AC test measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Figure 81. I2C AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148 Figure 82. Figure 83. Figure 84. Figure 85. Figure 86. Figure 87. Figure 88. Figure 89. Figure 90. Figure 91. Figure 92. Figure 93. Figure 94. Figure 95. Figure 96. Figure 97. Figure 98. Figure 99. I2C Fast mode (fC = 1 MHz): maximum Rbus value versus bus parasitic capacitance (Cbus) . . . . . ASK modulated signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SO8N – Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SO8N - Recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TSSOP8 – Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TSSOP8 – Recommended footprint. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UFDFN8 - Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . WLCSP - 10 balls, 1.649x1.483 mm, 0.4 mm pitch, wafer level chip scale package outline . . . . . . WLCSP - 10 balls, 1.649x1.483 mm, 0.4 mm pitch, wafer level chip scale recommended footprint. UFDFPN12 - Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Logic 0, high data rate, fast commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Logic 1, high data rate, fast commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Logic 0, low data rate, fast commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Logic 1, low data rate, fast commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Start of frame, high data rate, one subcarrier, fast commands . . . . . . . . . . . . . . . . . . . . . . . . . . Start of frame, low data rate, one subcarrier, fast commands . . . . . . . . . . . . . . . . . . . . . . . . . . End of frame, high data rate, one subcarrier, fast commands . . . . . . . . . . . . . . . . . . . . . . . . . . End of frame, low data rate, one subcarrier, fast commands . . . . . . . . . . . . . . . . . . . . . . . . . . . DS13519 - Rev 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 104 105 106 107 109 .113 .114 .116 .117 .119 120 121 122 123 124 125 126 128 129 130 131 133 134 136 137 138 139 142 148 151 152 153 154 155 156 158 159 160 162 162 162 163 163 163 164 164 page 202/203 ST25DV04KC ST25DV16KC ST25DV64KC IMPORTANT NOTICE – READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgment. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2022 STMicroelectronics – All rights reserved DS13519 - Rev 4 page 203/203